{"action":"created","comment":{"url":"https://api.github.com/repos/opensocdebug/osd-hw/pulls/comments/207708496","pull_request_review_id":143381995,"id":207708496,"node_id":"MDI0OlB1bGxSZXF1ZXN0UmV2aWV3Q29tbWVudDIwNzcwODQ5Ng==","diff_hunk":"@@ -156,3 +84,139 @@ def test_dem_uart_activation(dut):\n     dut._log.info(\"Check contents of MOD_CS\")\n     yield access.assert_reg_value(MODULE_DI_ADDRESS, SENDER_DI_ADDRESS,\n                                   DiPacket.BASE_REG.MOD_CS.value, 16, 1)\n+\n+# Mirroring expected transfer through module\n+_fifo = []\n+\n+@cocotb.test()\n+def test_dem_to_dii(dut):\n+    \"\"\"\n+    Verify that no chars are lost when the DII is busy\n+    \"\"\"\n+\n+    yield _init_dut(dut)\n+    yield _activate_module(dut)\n+\n+    write_thread = cocotb.fork(dem_to_dii_tx(dut, num_transfers=1000, random_data=True))\n+    read_thread  = cocotb.fork(dem_to_dii_rx(dut, num_transfers=1000))\n+    \n+    # read_thread implicitly waits for write thread to finish as well\n+    yield read_thread.join()\n+\n+@cocotb.coroutine\n+def dem_to_dii_tx(dut, num_transfers=500, max_delay=5, random_data=False):\n+\n+    for i in range(num_transfers):\n+\n+        delay = random.randint(0, max_delay)\n+\n+        for _ in range(delay):\n+            yield RisingEdge(dut.clk)\n+\n+        data = (random.randint(0, 255) if random_data else 0x42)\n+\n+        _fifo.append(data)\n+\n+        dut.out_valid <= 0x1\n+        dut.out_char <= int(data)\n+\n+        # out_char & out_valid must be set until both out_ready & out_valid\n+        # are asserted at the same rising edge, and for at least one clock cycle \n+        yield RisingEdge(dut.clk)\n+\n+        while not dut.out_ready.value or not dut.out_valid:\n+            yield RisingEdge(dut.clk)\n+\n+        # Negate out_valid after the module has read out_char\n+        dut.out_valid <= 0\n+\n+@cocotb.coroutine\n+def dem_to_dii_rx(dut, num_transfers=500, max_delay=5):\n+\n+    reader    = NocDiReader(dut, dut.clk);\n+    ex_packet = DiPacket();\n+\n+    for i in range(num_transfers):\n+\n+        delay = random.randint(1, max(1, max_delay))\n+\n+        for _ in range(delay):\n+            yield RisingEdge(dut.clk)\n+\n+        rxPacket = yield reader.receive_packet(set_ready=True)\n+\n+        data = _fifo.pop(0)\n+\n+        ex_packet.set_contents(dest=SENDER_DI_ADDRESS, src=MODULE_DI_ADDRESS,\n+                               type=DiPacket.TYPE.EVENT, type_sub=0,\n+                               payload=[int(data)])\n+\n+        if not rxPacket:\n+            raise DebugEventFailedException(\"receive_packet() timed out\")\n+\n+        if not rxPacket.equal_to(dut, ex_packet, mask=None):\n+            raise DebugEventFailedException(\"Unexpected content of \" +\n+                                            rxPacket.__str__() + \"\\n Expected \"\n+                                            + ex_packet.__str__())\n+\n+@cocotb.test()\n+def test_dii_to_dem(dut):\n+    \"\"\"\n+    Verify that no chars are lost when the CPU is busy\n+    \"\"\"\n+\n+    yield _init_dut(dut)\n+    yield _activate_module(dut)\n+\n+    write_thread = cocotb.fork(dii_to_dem_tx(dut, num_transfers=1000, random_data=True))\n+    read_thread  = cocotb.fork(dii_to_dem_rx(dut, num_transfers=1000))\n+\n+    # read_thread implicitly waits for write thread to finish as well\n+    yield read_thread.join()\n+\n+@cocotb.coroutine\n+def dii_to_dem_tx(dut, num_transfers=500, max_delay=5, random_data=False):\n+\n+    writer = NocDiWriter(dut, dut.clk);\n+    tx_packet = DiPacket();\n+\n+    for i in range(num_transfers):\n+\n+        delay = random.randint(1, max(1, max_delay))\n+\n+        for _ in range(delay):\n+            yield RisingEdge(dut.clk)\n+\n+        data = (random.randint(0, 255) if random_data else 0x42)\n+\n+        _fifo.append(data)\n+\n+        tx_packet.set_contents(dest=MODULE_DI_ADDRESS, src=SENDER_DI_ADDRESS,\n+                               type=DiPacket.TYPE.EVENT.value, type_sub=0,\n+                               payload=[int(data)])\n+\n+        yield writer.send_packet(tx_packet)\n+\n+@cocotb.coroutine\n+def dii_to_dem_rx(dut, num_transfers=500, max_delay=5):\n+\n+    for i in range(num_transfers):\n+\n+        delay = random.randint(0, max_delay)\n+\n+        for _ in range(delay):\n+            yield RisingEdge(dut.clk)\n+\n+        dut.in_ready <= 0x1\n+\n+        # Again, make sure in_ready is asserted for at least one clock cycle\n+        yield RisingEdge(dut.clk)\n+\n+        while not dut.in_valid.value or not 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