{"push_id":2838845545,"size":1,"distinct_size":1,"ref":"refs/heads/phb4_Reset_pfir_and_nfir_if_new_errors_reported_during_ETU_reset_mbox_master","head":"570e860f1272e63629f6bbea83b25ad1e343f277","before":"8b480b3c51660635ef72d001691210cdc4d43c2f","commits":[{"sha":"570e860f1272e63629f6bbea83b25ad1e343f277","author":{"name":"Vaibhav Jain","email":"e78384dfaa97bf0f3945c4da4075af8ac33ade0a@linux.ibm.com"},"message":"phb4: Reset pfir and nfir if new errors reported during ETU reset\n\nDuring fast-reboot a PCI device can continue sending requests even\nafter ETU-Reset is asserted. This will cause new errors to be reported\nin ETU fir-registers and will result in values of variables nfir_cache\nand pfir_cache to be out of sync.\n\nPresently during step-2 of CRESET nfir_cache and pfir_cache values are\nused to bring the PHB out of reset state. However if these variables\nare out of date the nfir/pfir registers are never reset completely and\nETU still remains frozen.\n\nHence this patch updates step-2 of phb4_creset to re-read the values of\nnfir/pfir registers to check if any new errors were reported after\nETU-reset was asserted, report these new errors and reset the\nnfir/pfir registers. This should bring the ETU out of reset\nsuccessfully.\n\nSigned-off-by: Vaibhav Jain <vaibhav@linux.ibm.com>","distinct":true,"url":"https://api.github.com/repos/ruscur/skiboot/commits/570e860f1272e63629f6bbea83b25ad1e343f277"}]}
{"actor":{"display_login":"ruscur"}}