{"push_id":2780238026,"size":12,"distinct_size":12,"ref":"refs/heads/master","head":"820b5e4965732e91a161a001a80990cb4682253e","before":"5aa1ad3bfc36e1982d1b605be21f546593e370e4","commits":[{"sha":"3d5d6c96ec5010f9dfe4215de73da3b1dcaf7584","author":{"name":"Jason Chen CJ","email":"f8cc00b4fb081090517cb2a50f235ddc9a440bf5@intel.com"},"message":"vcpu: add get/set register APIs\n\nthere will be 3 types of vcpu runtime contexts:\n- runtime contexts always saved/restored during VM exit/entry, which\n  include general registers rax/rcx/rdx/rbx/rbp/rsi/rdi/r8~r15, cr2 and\n  msr for spectre control (ia32_spec_ctrl)\n- runtime contexts on-demand cached/updated during VM exit/entry, which\n  include frequently used registers rsp, rip, efer, rflags, cr0 and cr4\n- runtime contexts always read/write from/to VMCS, which include left\n  registers not in above\n\nthis patch add get/set register APIs for vcpu runtime contexts, and unified\nthe save/restore method for them according to above description.\n\nv3:\n- update vcpu_get/set_cr0/4 as unified interface to get/set guest cr0/cr4,\n  use on-demand cache for reading, but always write to VMCS for writing.\n\nv2:\n- use reg_cached/reg_updated for on-demand runtime contexts\n- always read/write cr3 from/to VMCS\n\nSigned-off-by: Jason Chen CJ <jason.cj.chen@intel.com>\nAcked-by: Eddie Dong <eddie.dong@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/3d5d6c96ec5010f9dfe4215de73da3b1dcaf7584"},{"sha":"8a95b2abdcee14b0aecd454cd5b36580afd1af83","author":{"name":"Jason Chen CJ","email":"f8cc00b4fb081090517cb2a50f235ddc9a440bf5@intel.com"},"message":"vcpu: add ext context support for world switch\n\nmove most of fields from run_context into ext_context for world switch.\nthese fields do not need doing runtime save/restore during vm exit/entry.\n\nv3:\n- update cr0/cr4 registers switch method\n\nv2:\n- use struct name ext_context instead of saved_context\n- updated according to previous v2 patch\n\nSigned-off-by: Jason Chen CJ <jason.cj.chen@intel.com>\nAcked-by: Eddie Dong <eddie.dong@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/8a95b2abdcee14b0aecd454cd5b36580afd1af83"},{"sha":"72f9c9a26ed107d07d50637b9f0c036281b29ee7","author":{"name":"Jason Chen CJ","email":"f8cc00b4fb081090517cb2a50f235ddc9a440bf5@intel.com"},"message":"pm: use cpu_context for s3 save/restore\n\nuse structure cpu_context and update offsets in wakeup.S\n\nSigned-off-by: Jason Chen CJ <jason.cj.chen@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/72f9c9a26ed107d07d50637b9f0c036281b29ee7"},{"sha":"63ef1236decada0ad05b5c3bef1cee9454b221bf","author":{"name":"Jason Chen CJ","email":"f8cc00b4fb081090517cb2a50f235ddc9a440bf5@intel.com"},"message":"move global x2apic_enabled into arch dir\n\nthe x2apic_enabled should be x86 specific field.\n\nSigned-off-by: Jason Chen CJ <jason.cj.chen@intel.com>\nAcked-by: Xu, Anthony <anthony.xu@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/63ef1236decada0ad05b5c3bef1cee9454b221bf"},{"sha":"fe51acfd8c54329c97e2248a9ececad23648d040","author":{"name":"Mingqiang Chi","email":"e2649823be59b215505761aab39e00608d1c4db2@intel.com"},"message":"Revert \"[REVERT-ME]:handle discontinuous hpa for trusty\"\n\nThe formal solution has merged,revert this patch.\nThis reverts commit a9d04cc5cea328afef2c0d661beea6e8aa1428c5.\n\nSigned-off-by: Mingqiang Chi <mingqiang.chi@intel.com>\nReviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>\nAcked-by: Eddie Dong <eddie.dong@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/fe51acfd8c54329c97e2248a9ececad23648d040"},{"sha":"a5121e95e91a1fb71e60de8d1575c3b8fb5d370e","author":{"name":"Yuan Liu","email":"c5217e964ffc2890960305f57125e8a51ae0c0a4@intel.com"},"message":"dm: uart: add state check of backend tty before uart_closetty\n\nThis patch resolves one arcn-dm crash issue when rebooting UOS.\n\nThe rootcause is that uart releases unopened backend tty.\n\nOne reproduced case is that the board does not support IOC but IOC\nfeature is enabled in the acrn-dm. After rebooting UOS, crash will\nhappen.\n\nNOTE: This issue is not related to IOC, it also can be reproduced\nwith NON-IOC scenario. Just set one invalid PTY to the lpc, then\nthis issue should be reproduced.\nWe need re-visit the whole policy for such scenario in future.\n\nSigned-off-by: Yuan Liu <yuan1.liu@intel.com>\nReviewed-by: Yin Fengwei <fengwei.yin@intel.com>\nAcked-by: Yu Wang <yu1.wang@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/a5121e95e91a1fb71e60de8d1575c3b8fb5d370e"},{"sha":"7109ab45a66390396a170b0d1973a0c855a028e8","author":{"name":"Mingqiang Chi","email":"e2649823be59b215505761aab39e00608d1c4db2@intel.com"},"message":"hv:removed assert in free_ept_mem\n\nRemoved assert since the caller has checked the parameter.\n\nSigned-off-by: Mingqiang Chi <mingqiang.chi@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/7109ab45a66390396a170b0d1973a0c855a028e8"},{"sha":"cebc8d9a01b007984805dce1a6c2d6482339e2a1","author":{"name":"Liang Yang","email":"214e236e3d6ff091a059753f8b300300cfdabb1d@intel.com"},"message":"DM USB: xHCI: Refine drd code to fix a potential NULL pointer issue.\n\nRefine DM DRD code and modify some logical judgement to avoid\npotential NULL pointer issue.\n\nSigned-off-by: Liang Yang <liang3.yang@intel.com>\nReviewed-by: Xiaoguang Wu <xiaoguang.wu@intel.com>\nReviewed-by: Shuo Liu <shuo.a.liu@intel.com>\nAcked-by: Yu Wang <yu1.wang@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/cebc8d9a01b007984805dce1a6c2d6482339e2a1"},{"sha":"8836abef210286eb224821827d41087f435bf12c","author":{"name":"Kaige Fu","email":"32a11c8a81d2da70ef07f2e91a2e5d4e492caebd@intel.com"},"message":"HV: instr_emul: Unify params passing to emulate_xxx\n\nThere are so many __unused prefix spaning the emulate_xxx functions. This patch\nunify the parameters of emulate_xxx to avoid it.\n\n  - All emulate_xxx functions are defined as emulate_xxx(struct vcpu *vcpu, instr_emul_vie *vie)\n    or emulate_xxx(struct vcpu *vcpu, instr_emul_vie *vie, struct vm_guest_paging *paging).\n\n  - Move mmio_read/write to instr_emul.c and call them directly.\n\nSigned-off-by: Kaige Fu <kaige.fu@intel.com>\nReviewed-by: Yin Fengwei <fengwei.yin@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/8836abef210286eb224821827d41087f435bf12c"},{"sha":"ce79d3aa24654418f4dd94d0a1ccb6ffefe13009","author":{"name":"Kaige Fu","email":"32a11c8a81d2da70ef07f2e91a2e5d4e492caebd@intel.com"},"message":"HV: instr_emul: Handle error gracefully\n\nASSERT is too strict for HV when error happens during emulating instruction.\nThis patch remove all ASSERT and return a negative error code when failing to\nemulate instruction.\n\nOriginally, getcc will return -EINVAL when opsize are not one of (1, 2, 4, 8).\nBut theoretically, opsize in current implementation can only be one of (1, 2, 4, 8).\nSo, we will always get valid \"cc\".\n\nThis patch add a pre-assumption and make sure that getcc always return valid value.\n\nFor the current code, #GP will be injected to guest if something goes wrong with\ninstruction emulation.\n\nSigned-off-by: Kaige Fu <kaige.fu@intel.com>\nReviewed-by: Yin Fengwei <fengwei.yin@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/ce79d3aa24654418f4dd94d0a1ccb6ffefe13009"},{"sha":"f03ae8d09cd3a7c31c60bb9da454178cfbdae57e","author":{"name":"Kaige Fu","email":"32a11c8a81d2da70ef07f2e91a2e5d4e492caebd@intel.com"},"message":"HV: instr_emul: Rearrange logic of instr_emul*\n\nOriginally, there is cross-references between instr_emul.h and instr_emul_wrapper.h.\nUser must include both of them when calling instruction emulation functions. This\nwill raise up some confusion and inconvenience.\n\nSo we rearrange the logic of instruction emulation code as following:\n\n  - External API -- defined in instr_emul.h\n     * decode_instruction(struct vcpu *vcpu)\n     * emulate_instruction(struct vcpu *vcpu)\n\n  - Make all other functions as static in instr_emul.c\n\n  - Remove instr_emul_wrapper.c/h\n\nNo functional change.\n\nSigned-off-by: Kaige Fu <kaige.fu@intel.com>\nReviewed-by: Eddie Dong <eddie.dong@intel.com>\nReviewed-by: Yin Fengwei <fengwei.yin@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/f03ae8d09cd3a7c31c60bb9da454178cfbdae57e"},{"sha":"820b5e4965732e91a161a001a80990cb4682253e","author":{"name":"Kaige Fu","email":"32a11c8a81d2da70ef07f2e91a2e5d4e492caebd@intel.com"},"message":"HV: instr_emul: Remove dead code\n\nThis patch just removes some dead codes related to Instruction Emulation.\n\nSigned-off-by: Kaige Fu <kaige.fu@intel.com>\nAcked-by: Eddie Dong <eddie.dong@intel.com>","distinct":true,"url":"https://api.github.com/repos/dbkinder/acrn-hypervisor/commits/820b5e4965732e91a161a001a80990cb4682253e"}]}
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