{"action":"created","comment":{"url":"https://api.github.com/repos/riscv/riscv-debug-spec/pulls/comments/221404263","pull_request_review_id":160052989,"id":221404263,"node_id":"MDI0OlB1bGxSZXF1ZXN0UmV2aWV3Q29tbWVudDIyMTQwNDI2Mw==","diff_hunk":"@@ -84,7 +84,8 @@ \\subsection{Register Definition Format}\n         \\hline\n         W & Write-only. When read this field returns 0. \\\\\n         \\hline\n-        W1 & Write-only. Only writing 1 has an effect. \\\\\n+        W1 & Write-only. Every time that 1 is written an action is taken. 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I think this is the one that makes the\r\nmost sense, and shouldn't cause any problems. (Possibly we don't want\r\nthis for ackhavereset. I sent e-mail about that.)\r\n\r\nThe bits that are defined as W1 are:\r\nDM: ackhavreset, setresethaltreq, clrresethaltreq\r\nJTAG: dmihardreset, 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