{"push_id":2734665667,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"9221bbe5eaa79d276232998756ded71053eb9619","before":"6ae156cfe9fcad19ea9ff6e895571130fac784e7","commits":[{"sha":"9221bbe5eaa79d276232998756ded71053eb9619","author":{"name":"Matthew Naylor","email":"ef84a31f4f37765ca3ba141954bb42c51b4ca95f@gmail.com"},"message":"Generalise floating-point interface\n\nAllow generic parameters to Verilog modules and fix up Verilog\ngeneration for generic parameters.","distinct":true,"url":"https://api.github.com/repos/mn416/blarney/commits/9221bbe5eaa79d276232998756ded71053eb9619"}]}
{"actor":{"display_login":"mn416"}}