{"push_id":2753489270,"size":11,"distinct_size":11,"ref":"refs/heads/integration","head":"eef90a772dc1c3b836c1e9304a22d805db3cf5b1","before":"60e062fb0e33f7d9825267cbfb397d7c7aca1169","commits":[{"sha":"46b69e3de1b7817f4d8ed46fe1975f4bf630f0ec","author":{"name":"Sughosh Ganu","email":"89c5e32bab4ac30865936b46fb918f58cd11fd98@arm.com"},"message":"Include board_arm_def.h through the platform's header\n\nThe board_arm_def.h header file needs to be included via the platform\ndefinition header. Not doing so, results in a redefinition error of\nPLAT_ARM_MAX_BL31_SIZE macro, if defined in the platform definition\nfile.\n\nChange-Id: I1d178f6e8a6a41461e7fbcab9f6813a2faa2d82b\nSigned-off-by: Sughosh Ganu <sughosh.ganu@arm.com>","distinct":true,"url":"https://api.github.com/repos/rockchip-linux/arm-trusted-firmware/commits/46b69e3de1b7817f4d8ed46fe1975f4bf630f0ec"},{"sha":"4576f73caa99c95029b3abe0c2893b83d635ebf6","author":{"name":"Sughosh Ganu","email":"89c5e32bab4ac30865936b46fb918f58cd11fd98@arm.com"},"message":"RAS: ras_common: Add null pointer check for error record probe function\n\nAdd a null pointer check for the error record probe\nfunction -- avoids a panic in case a platform has not defined it.\n\nChange-Id: I1139fa0df33297a12ec16615cacd07540925f991\nSigned-off-by: Sughosh Ganu <sughosh.ganu@arm.com>","distinct":true,"url":"https://api.github.com/repos/rockchip-linux/arm-trusted-firmware/commits/4576f73caa99c95029b3abe0c2893b83d635ebf6"},{"sha":"d9cc9372e12a9a814bb5ec18202f68748bb20fe3","author":{"name":"Sughosh Ganu","email":"89c5e32bab4ac30865936b46fb918f58cd11fd98@arm.com"},"message":"SGI: Include arm_spm_def.h in platform_def.h\n\nInclude arm_spm_def.h in the platform_def.h file. Without this\ninclusion, we get build errors like\n\nIn file included from services/std_svc/spm/sp_setup.c:12:0:\nservices/std_svc/spm/sp_setup.c: In function 'spm_sp_setup':\nservices/std_svc/spm/sp_setup.c:61:57: error: 'PLAT_SPM_BUF_BASE'\n  undeclared (first use in this function)\n  write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0, PLAT_SPM_BUF_BASE);\n\nNow that the platform_def.h includes arm_spm_def.h, remove inclusion\nof platform_def.h in arm_spm_def.h to remove the circular dependency.\n\nChange-Id: I5225c8ca33fd8d288849524395e436c3d56daf17\nSigned-off-by: Sughosh Ganu <sughosh.ganu@arm.com>","distinct":true,"url":"https://api.github.com/repos/rockchip-linux/arm-trusted-firmware/commits/d9cc9372e12a9a814bb5ec18202f68748bb20fe3"},{"sha":"2e4a509ddee2b8f5aa0a5e7a825394bff7fc8a0f","author":{"name":"Sughosh Ganu","email":"89c5e32bab4ac30865936b46fb918f58cd11fd98@arm.com"},"message":"ARM platforms: Allow board specific definition of SP stack base\n\nThe SGI platforms need to allocate memory for CPER buffers. These\nplatform buffers would be placed between the shared reserved memory\nand the per cpu stack memory, thus the need to redefine stack base\npointer for these platforms. This patch allows each board in ARM\nplatform to define the PLAT_SP_IMAGE_STACK_BASE.\n\nChange-Id: Ib5465448b860ab7ab0f645f7cb278a67acce7be9\nSigned-off-by: Sughosh Ganu <sughosh.ganu@arm.com>","distinct":true,"url":"https://api.github.com/repos/rockchip-linux/arm-trusted-firmware/commits/2e4a509ddee2b8f5aa0a5e7a825394bff7fc8a0f"},{"sha":"d952391914be7f28cab2357b471daa304a4d505b","author":{"name":"Sughosh Ganu","email":"89c5e32bab4ac30865936b46fb918f58cd11fd98@arm.com"},"message":"SPM: SGI: Map memory allocated for secure partitions\n\nThe secure partition manager reserves chunks of memory which are used\nfor the S-EL0 StandaloneMM image and the buffers required for\ncommunication between the Non-Secure world with the StandaloneMM\nimage. Add the memory chunks to relevant arrays for mapping the\nregions of memory with corresponding attributes.\n\nChange-Id: If371d1afee0a50ca7cacd55e16aeaca949d5062b\nSigned-off-by: Sughosh Ganu <sughosh.ganu@arm.com>","distinct":true,"url":"https://api.github.com/repos/rockchip-linux/arm-trusted-firmware/commits/d952391914be7f28cab2357b471daa304a4d505b"},{"sha":"485fc95443cff116e5b07ba6bc7d8c1dcb1f3f48","author":{"name":"Sughosh Ganu","email":"89c5e32bab4ac30865936b46fb918f58cd11fd98@arm.com"},"message":"RAS: SGI: Add platform handler for RAS interrupts\n\nAdd a platform specific handler for RAS interrupts and configure the\nplatform RAS interrupts for EL3 handling. The interrupt handler passes\ncontrol to StandaloneMM code executing in S-EL0, which populates the\nCPER buffer with relevant error information. The handler subsequently\ninvokes the SDEI client which processes the information in the error\ninformation in the CPER buffer. The helper functions\nplat_sgi_get_ras_ev_map and plat_sgi_get_ras_ev_map_size would be\ndefined for sgi platforms in the subsequent patch, which adds sgi575\nspecific RAS changes.\n\nChange-Id: I490f16c15d9917ac40bdc0441659b92380108d63\nSigned-off-by: Sughosh Ganu <sughosh.ganu@arm.com>","distinct":true,"url":"https://api.github.com/repos/rockchip-linux/arm-trusted-firmware/commits/485fc95443cff116e5b07ba6bc7d8c1dcb1f3f48"},{"sha":"167dae4dc6f6a82fbaca0c32818f0352fafbe1da","author":{"name":"Sughosh Ganu","email":"89c5e32bab4ac30865936b46fb918f58cd11fd98@arm.com"},"message":"RAS: SGI575: Add platform specific RAS changes\n\nAdd platform specific changes needed to add support for the RAS\nfeature on SGI575 platform, including adding a mapping for the\nCPER buffer being used on SGI575 platform.\n\nChange-Id: I01a982e283609b5c48661307906346fa2738a43b\nSigned-off-by: Sughosh Ganu <sughosh.ganu@arm.com>","distinct":true,"url":"https://api.github.com/repos/rockchip-linux/arm-trusted-firmware/commits/167dae4dc6f6a82fbaca0c32818f0352fafbe1da"},{"sha":"f29d18289a271470190f54933751cb1935c00626","author":{"name":"Sughosh Ganu","email":"89c5e32bab4ac30865936b46fb918f58cd11fd98@arm.com"},"message":"RAS: SGI: Add flags needed to build components for RAS feature\n\nAdd the various flags that are required to build the components needed\nto enable the RAS feature on SGI575 platform. By default, all flags\nare set to 0, disabling building of all corresponding components.\n\nChange-Id: I7f8536fba895043ef6e397cc33ac9126cb572132\nSigned-off-by: Sughosh Ganu <sughosh.ganu@arm.com>","distinct":true,"url":"https://api.github.com/repos/rockchip-linux/arm-trusted-firmware/commits/f29d18289a271470190f54933751cb1935c00626"},{"sha":"16bec9c25bdd37779ea0bc8e5c6ce3ab26e58106","author":{"name":"Kaihua Zhong","email":"950fc418118bbfdf65c5bf4bfcb6e93614795c6d@huawei.com"},"message":"Hikey960: configure pins for PCIe controller\n\nGPIO_089 connects to PCIE_PERST_N. It needs to be configured as\noutput low.\n\nSigned-off-by: Kaihua Zhong <zhongkaihua@huawei.com>\nSigned-off-by: Xiaowei Song <songxiaowei@hisilicon.com>\nSigned-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>","distinct":true,"url":"https://api.github.com/repos/rockchip-linux/arm-trusted-firmware/commits/16bec9c25bdd37779ea0bc8e5c6ce3ab26e58106"},{"sha":"128dad9a20ca9fa93539d748737e28d168f2701c","author":{"name":"Soby Mathew","email":"4d7af7c5c404e07961f9e1e79d6f17409c1d7db7@arm.com"},"message":"Merge pull request #1494 from hzhuang1/pcie_pin\n\nHikey960: configure pins for PCIe controller","distinct":true,"url":"https://api.github.com/repos/rockchip-linux/arm-trusted-firmware/commits/128dad9a20ca9fa93539d748737e28d168f2701c"},{"sha":"eef90a772dc1c3b836c1e9304a22d805db3cf5b1","author":{"name":"Soby Mathew","email":"4d7af7c5c404e07961f9e1e79d6f17409c1d7db7@arm.com"},"message":"Merge pull request #1497 from SNG-ARM/master\n\nRAS changes for SGI575 platform","distinct":true,"url":"https://api.github.com/repos/rockchip-linux/arm-trusted-firmware/commits/eef90a772dc1c3b836c1e9304a22d805db3cf5b1"}]}
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