{"action":"created","comment":{"url":"https://api.github.com/repos/zephyrproject-rtos/zephyr/pulls/comments/200030640","pull_request_review_id":134253630,"id":200030640,"node_id":"MDI0OlB1bGxSZXF1ZXN0UmV2aWV3Q29tbWVudDIwMDAzMDY0MA==","diff_hunk":"@@ -0,0 +1,607 @@\n+/*\n+ * Copyright (c) 2018 Nordic Semiconductor ASA\n+ *\n+ * SPDX-License-Identifier: Apache-2.0\n+ */\n+\n+/**\n+ * @brief Driver for Nordic Semiconductor nRF52 UARTE\n+ */\n+\n+#include <uart.h>\n+#include <gpio.h>\n+#include <hal/nrf_uarte.h>\n+\n+/* Maximum allowed bufer size for Easy DMA transfer */\n+#define UART_MAX_TX_BUFF_SIZE\t\tBIT_MASK(UARTE0_EASYDMA_MAXCNT_SIZE)\n+\n+#if (CONFIG_UART_NRFX_TX_BUFFER_SIZE > UART_MAX_TX_BUFF_SIZE)\n+\t#define UART_FIFO_TX_BUFFER_SIZE\tUART_MAX_TX_BUFF_SIZE\n+#else\n+\t#define UART_FIFO_TX_BUFFER_SIZE\tUART_MAX_TX_BUFF_SIZE\n+#endif /* (CONFIG_UART_NRFX_TX_BUFFER_SIZE > UART_MAX_TX_BUFF_SIZE) */\n+\n+/* Device data structure */\n+struct uarte_nrfx_data {\n+\tu8_t rx_data;\n+\n+#ifdef CONFIG_UART_INTERRUPT_DRIVEN\n+\tuart_irq_callback_t cb;\t/**< Callback function pointer */\n+\tu8_t tx_buffer[UART_FIFO_TX_BUFFER_SIZE];\n+#endif /* CONFIG_UART_INTERRUPT_DRIVEN */\n+};\n+\n+/**\n+ * @brief Structure for UARTE configuration.\n+ */\n+struct uarte_nrfx_config {\n+\tNRF_UARTE_Type *uarte_regs; /* Instance address */\n+};\n+\n+struct uarte_init_config {\n+\tu32_t  pseltxd; /* TXD pin number */\n+\tu32_t  pselrxd; /* RXD pin number. */\n+\tu32_t  pselcts; /* CTS pin number. */\n+\tu32_t  pselrts; /* RTS pin number. */\n+\n+\tnrf_uarte_hwfc_t      hwfc;     /* Flow control configuration. */\n+\tnrf_uarte_parity_t    parity;   /* Parity configuration. */\n+\tnrf_uarte_baudrate_t  baudrate; /* Baudrate. */\n+};\n+\n+\n+static inline struct uarte_nrfx_data *get_dev_data(struct device *dev)\n+{\n+\treturn dev->driver_data;\n+}\n+\n+static inline const struct uarte_nrfx_config *get_dev_config(struct device *dev)\n+{\n+\treturn dev->config->config_info;\n+}\n+\n+static inline NRF_UARTE_Type *get_uarte_instance(struct device *dev)\n+{\n+\tconst struct uarte_nrfx_config *config = get_dev_config(dev);\n+\n+\treturn config->uarte_regs;\n+}\n+\n+#ifdef CONFIG_UART_INTERRUPT_DRIVEN\n+/**\n+ * @brief Interrupt service routine.\n+ *\n+ * This simply calls the callback function, if one exists.\n+ *\n+ * @param arg Argument to ISR.\n+ *\n+ * @return N/A\n+ */\n+static void uarte_nrfx_isr(void *arg)\n+{\n+\tstruct device *dev = arg;\n+\tconst struct uarte_nrfx_data *data = get_dev_data(dev);\n+\n+\tif (data->cb) {\n+\t\tdata->cb(dev);\n+\t}\n+}\n+#endif /* CONFIG_UART_INTERRUPT_DRIVEN */\n+\n+/**\n+ * @brief Set the baud rate\n+ *\n+ * This routine set the given baud rate for the UARTE.\n+ *\n+ * @param dev UARTE device struct\n+ * @param baudrate Baud rate\n+ *\n+ * @return 0 on success or error code\n+ */\n+static int baudrate_set(struct device *dev, u32_t baudrate)\n+{\n+\tnrf_uarte_baudrate_t nrf_baudrate; /* calculated baudrate divisor */\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\tswitch (baudrate) {\n+\tcase 300:\n+\t\t/* value not supported by Nordic HAL */\n+\t\tnrf_baudrate = 0x00014000;\n+\t\tbreak;\n+\tcase 600:\n+\t\t/* value not supported by Nordic HAL */\n+\t\tnrf_baudrate = 0x00027000;\n+\t\tbreak;\n+\tcase 1200:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_1200;\n+\t\tbreak;\n+\tcase 2400:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_2400;\n+\t\tbreak;\n+\tcase 4800:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_4800;\n+\t\tbreak;\n+\tcase 9600:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_9600;\n+\t\tbreak;\n+\tcase 14400:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_14400;\n+\t\tbreak;\n+\tcase 19200:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_19200;\n+\t\tbreak;\n+\tcase 28800:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_28800;\n+\t\tbreak;\n+\tcase 38400:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_38400;\n+\t\tbreak;\n+\tcase 57600:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_57600;\n+\t\tbreak;\n+\tcase 76800:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_76800;\n+\t\tbreak;\n+\tcase 115200:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_115200;\n+\t\tbreak;\n+\tcase 230400:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_230400;\n+\t\tbreak;\n+\tcase 250000:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_250000;\n+\t\tbreak;\n+\tcase 460800:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_460800;\n+\t\tbreak;\n+\tcase 921600:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_921600;\n+\t\tbreak;\n+\tcase 1000000:\n+\t\tnrf_baudrate = NRF_UARTE_BAUDRATE_1000000;\n+\t\tbreak;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tnrf_uarte_baudrate_set(uarte, nrf_baudrate);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * @brief Poll the device for input.\n+ *\n+ * @param dev UARTE device struct\n+ * @param c Pointer to character\n+ *\n+ * @return 0 if a character arrived, -1 if the input buffer if empty.\n+ */\n+static int uarte_nrfx_poll_in(struct device *dev, unsigned char *c)\n+{\n+\tstruct uarte_nrfx_data *data = get_dev_data(dev);\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\tif (!nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX)) {\n+\t\treturn -1;\n+\t}\n+\n+\t/* got a character */\n+\t*c = data->rx_data;\n+\n+\t/* clear the interrupt */\n+\tnrf_uarte_event_clear(uarte, NRF_UARTE_EVENT_ENDRX);\n+\tnrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STARTRX);\n+\n+\treturn 0;\n+}\n+\n+/**\n+ * @brief Output a character in polled mode.\n+ *\n+ * @param dev UARTE device struct\n+ * @param c Character to send\n+ *\n+ * @return Sent character\n+ */\n+static unsigned char uarte_nrfx_poll_out(struct device *dev,\n+\t\t\t\t\t unsigned char c)\n+{\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\t/* The UART API dictates that poll_out should wait for the transmitter\n+\t * to be empty before sending a character. However, without locking,\n+\t * this introduces a rare yet possible race condition if the thread is\n+\t * preempted between sending the byte and checking for completion.\n+\n+\t * Because of this race condition, the while loop has to be placed\n+\t * after the write to TXD, and we can't wait for an empty transmitter\n+\t * before writing. This is a trade-off between losing a byte once in a\n+\t * blue moon against hanging up the whole thread permanently\n+\t */\n+\n+\t/* reset transmitter ready state */\n+\tnrf_uarte_event_clear(uarte, NRF_UARTE_EVENT_ENDTX);\n+\n+\t/* send a character */\n+\tnrf_uarte_tx_buffer_set(uarte, &c, 1);\n+\tnrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STARTTX);\n+\n+\t/* Wait for transmitter to be ready */\n+\twhile (!nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDTX)) {\n+\t}\n+\n+\t/* If there is nothing to send, driver will save an energy\n+\t * when TX is stopped.\n+\t */\n+\tnrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STOPTX);\n+\n+\treturn c;\n+}\n+\n+static int uarte_nrfx_err_check(struct device *dev)\n+{\n+\tu32_t error = 0;\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\tif (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ERROR)) {\n+\t\t/* register bitfields maps to the defines in uart.h */\n+\t\terror = nrf_uarte_errorsrc_get_and_clear(uarte);\n+\t}\n+\n+\treturn error;\n+}\n+\n+#ifdef CONFIG_UART_INTERRUPT_DRIVEN\n+\n+/** Interrupt driven FIFO fill function */\n+static int uarte_nrfx_fifo_fill(struct device *dev,\n+\t\t\t\tconst u8_t *tx_data,\n+\t\t\t\tint len)\n+{\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\tstruct uarte_nrfx_data *data = get_dev_data(dev);\n+\n+\tif (!nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDTX)) {\n+\t\treturn 0;\n+\t}\n+\n+\tif (len > UART_FIFO_TX_BUFFER_SIZE) {\n+\t\tlen = UART_FIFO_TX_BUFFER_SIZE;\n+\t}\n+\n+\tnrf_uarte_event_clear(uarte, NRF_UARTE_EVENT_ENDTX);\n+\n+\t/* Copy data to RAM buffer for EasyDMA transfer */\n+\tfor (int i = 0; i < len; i++) {\n+\t\tdata->tx_buffer[i] = tx_data[i];\n+\t}\n+\n+\tnrf_uarte_tx_buffer_set(uarte, data->tx_buffer, len);\n+\n+\tnrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STARTTX);\n+\n+\treturn len;\n+}\n+\n+/** Interrupt driven FIFO read function */\n+static int uarte_nrfx_fifo_read(struct device *dev,\n+\t\t\t\tu8_t *rx_data,\n+\t\t\t\tconst int size)\n+{\n+\tint num_rx = 0;\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\tconst struct uarte_nrfx_data *data = get_dev_data(dev);\n+\n+\tif (nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX)) {\n+\t\t/* Clear the interrupt */\n+\t\tnrf_uarte_event_clear(uarte, NRF_UARTE_EVENT_ENDRX);\n+\n+\t\t/* Receive a character */\n+\t\trx_data[num_rx++] = (u8_t)data->rx_data;\n+\n+\t\tnrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STARTRX);\n+\t}\n+\n+\treturn num_rx;\n+}\n+\n+/** Interrupt driven transfer enabling function */\n+static void uarte_nrfx_irq_tx_enable(struct device *dev)\n+{\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\tnrf_uarte_int_enable(uarte, NRF_UARTE_INT_ENDTX_MASK);\n+}\n+\n+/** Interrupt driven transfer disabling function */\n+static void uarte_nrfx_irq_tx_disable(struct device *dev)\n+{\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\tnrf_uarte_int_disable(uarte, NRF_UARTE_INT_ENDTX_MASK);\n+\n+\t/* If there is nothing to send, driver will save an energy\n+\t * when TX is stopped.\n+\t */\n+\tnrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STOPTX);\n+}\n+\n+/** Interrupt driven transfer ready function */\n+static int uarte_nrfx_irq_tx_ready_complete(struct device *dev)\n+{\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\treturn nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDTX);\n+}\n+\n+static int uarte_nrfx_irq_rx_ready(struct device *dev)\n+{\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\treturn nrf_uarte_event_check(uarte, NRF_UARTE_EVENT_ENDRX);\n+}\n+\n+/** Interrupt driven receiver enabling function */\n+static void uarte_nrfx_irq_rx_enable(struct device *dev)\n+{\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\tnrf_uarte_int_enable(uarte, NRF_UARTE_INT_ENDRX_MASK);\n+}\n+\n+/** Interrupt driven receiver disabling function */\n+static void uarte_nrfx_irq_rx_disable(struct device *dev)\n+{\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\tnrf_uarte_int_disable(uarte, NRF_UARTE_INT_ENDRX_MASK);\n+}\n+\n+/** Interrupt driven error enabling function */\n+static void uarte_nrfx_irq_err_enable(struct device *dev)\n+{\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\tnrf_uarte_int_enable(uarte, NRF_UARTE_INT_ERROR_MASK);\n+}\n+\n+/** Interrupt driven error disabling function */\n+static void uarte_nrfx_irq_err_disable(struct device *dev)\n+{\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\tnrf_uarte_int_disable(uarte, NRF_UARTE_INT_ERROR_MASK);\n+}\n+\n+/** Interrupt driven pending status function */\n+static int uarte_nrfx_irq_is_pending(struct device *dev)\n+{\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\n+\treturn ((nrf_uarte_int_enable_check(uarte,\n+\t\t\t\t\t    NRF_UARTE_INT_ENDTX_MASK) &&\n+\t\t uarte_nrfx_irq_tx_ready_complete(dev))\n+\t\t||\n+\t\t(nrf_uarte_int_enable_check(uarte,\n+\t\t\t\t\t    NRF_UARTE_INT_ENDRX_MASK) &&\n+\t\t uarte_nrfx_irq_rx_ready(dev)));\n+}\n+\n+/** Interrupt driven interrupt update function */\n+static int uarte_nrx_irq_update(struct device *dev)\n+{\n+\treturn 1;\n+}\n+\n+/** Set the callback function */\n+static void uarte_nrfx_irq_callback_set(struct device *dev,\n+\t\t\t\t\tuart_irq_callback_t cb)\n+{\n+\tstruct uarte_nrfx_data *data = get_dev_data(dev);\n+\n+\tdata->cb = cb;\n+}\n+\n+#endif /* CONFIG_UART_INTERRUPT_DRIVEN */\n+\n+\n+static const struct uart_driver_api uart_nrfx_uarte_driver_api = {\n+\t.poll_in\t\t= uarte_nrfx_poll_in,\n+\t.poll_out\t\t= uarte_nrfx_poll_out,\n+\t.err_check\t\t= uarte_nrfx_err_check,\n+#ifdef CONFIG_UART_INTERRUPT_DRIVEN\n+\t.fifo_fill\t\t= uarte_nrfx_fifo_fill,\n+\t.fifo_read\t\t= uarte_nrfx_fifo_read,\n+\t.irq_tx_enable\t\t= uarte_nrfx_irq_tx_enable,\n+\t.irq_tx_disable\t\t= uarte_nrfx_irq_tx_disable,\n+\t.irq_tx_ready\t\t= uarte_nrfx_irq_tx_ready_complete,\n+\t.irq_rx_enable\t\t= uarte_nrfx_irq_rx_enable,\n+\t.irq_rx_disable\t\t= uarte_nrfx_irq_rx_disable,\n+\t.irq_tx_complete\t= uarte_nrfx_irq_tx_ready_complete,\n+\t.irq_rx_ready\t\t= uarte_nrfx_irq_rx_ready,\n+\t.irq_err_enable\t\t= uarte_nrfx_irq_err_enable,\n+\t.irq_err_disable\t= uarte_nrfx_irq_err_disable,\n+\t.irq_is_pending\t\t= uarte_nrfx_irq_is_pending,\n+\t.irq_update\t\t= uarte_nrx_irq_update,\n+\t.irq_callback_set\t= uarte_nrfx_irq_callback_set,\n+#endif /* CONFIG_UART_INTERRUPT_DRIVEN */\n+};\n+\n+static int uarte_instance_init(struct device *dev,\n+\t\t\t       const struct uarte_init_config *config,\n+\t\t\t       u8_t interrupts_active)\n+{\n+\tint err;\n+\tstruct device *gpio_dev;\n+\tNRF_UARTE_Type *uarte = get_uarte_instance(dev);\n+\tstruct uarte_nrfx_data *data = get_dev_data(dev);\n+\n+\tgpio_dev = device_get_binding(CONFIG_GPIO_NRF5_P0_DEV_NAME);\n+\n+\t__ASSERT(gpio_dev,\n+\t\t \"UART init failed. Cannot find %s\",\n+\t\t CONFIG_GPIO_NRF5_P0_DEV_NAME);\n+\n+\tgpio_pin_write(gpio_dev, config->pseltxd, 1);\n+\tgpio_pin_configure(gpio_dev,\n+\t\t\t   config->pseltxd,\n+\t\t\t   GPIO_DIR_OUT);\n+\tgpio_pin_configure(gpio_dev,\n+\t\t\t   config->pselrxd,\n+\t\t\t   GPIO_DIR_IN);\n+\n+\tnrf_uarte_txrx_pins_set(uarte,\n+\t\t\t\tconfig->pseltxd,\n+\t\t\t\tconfig->pselrxd);\n+\n+\tif (config->hwfc == NRF_UARTE_HWFC_ENABLED) {\n+\t\tgpio_pin_write(gpio_dev, config->pselrts, 1);\n+\t\tgpio_pin_configure(gpio_dev,\n+\t\t\t\t   config->pselrts,\n+\t\t\t\t   GPIO_DIR_OUT);\n+\t\tgpio_pin_configure(gpio_dev,\n+\t\t\t\t   config->pselcts,\n+\t\t\t\t   GPIO_DIR_IN);\n+\t\tnrf_uarte_hwfc_pins_set(uarte,\n+\t\t\t\t\tconfig->pselrts,\n+\t\t\t\t\tconfig->pselcts);\n+\t}\n+\n+\t/* Configure flow control and parity checking */\n+\tnrf_uarte_configure(uarte,\n+\t\t\t    config->parity,\n+\t\t\t    config->hwfc);\n+\n+\terr = baudrate_set(dev, config->baudrate);\n+\tif (err) {\n+\t\treturn err;\n+\t}\n+\n+\t/* Enable receiver and transmitter */\n+\tnrf_uarte_enable(uarte);\n+\n+\tnrf_uarte_event_clear(uarte, NRF_UARTE_EVENT_ENDRX);\n+\n+\tnrf_uarte_rx_buffer_set(uarte, &data->rx_data, 1);\n+\tnrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STARTRX);\n+\n+#if CONFIG_UART_INTERRUPT_DRIVEN\n+\tif (interrupts_active) {\n+\n+\t\tirq_enable(NRFX_IRQ_NUMBER_GET(uarte));\n+\n+\t\t/* Set ENDTX event by requesting fake (zero-length) transfer.\n+\t\t * Pointer to RAM variable (data->tx_buffer) is set because\n+\t\t * otherwise such operation may result in HardFault or RAM\n+\t\t * corruption.\n+\t\t */\n+\t\tnrf_uarte_tx_buffer_set(uarte, data->tx_buffer, 0);\n+\t\tnrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STARTTX);\n+\n+\t\t/* switch off transmitter to save an energy */\n+\t\tnrf_uarte_task_trigger(uarte, NRF_UARTE_TASK_STOPTX);\n+\t}\n+#endif\n+\n+\treturn 0;\n+}\n+\n+#define UART_NRF_UARTE_DEVICE(idx)\t\t\t\t\t      \\\n+\tDEVICE_DECLARE(uart_nrfx_uarte##idx);\t\t\t\t      \\\n+\tstatic struct uarte_nrfx_data uarte_##idx##_data;\t\t      \\\n+\tstatic const struct uarte_nrfx_config uarte_##idx##_config = {\t      \\\n+\t\t.uarte_regs = (NRF_UARTE_Type *)NRF_UARTE##idx\t\t      \\\n+\t};\t\t\t\t\t\t\t\t      \\\n+\tstatic int uarte_##idx##_init(struct device *dev)\t\t      \\\n+\t{\t\t\t\t\t\t\t\t      \\\n+\t\tconst struct uarte_init_config init_config = {\t\t      \\\n+\t\t\t.pseltxd = CONFIG_UART_##idx##_NRF_TX_PIN,\t      \\\n+\t\t\t.pselrxd = CONFIG_UART_##idx##_NRF_RX_PIN,\t      \\\n+\t\t\tUART_##idx##_NRF_HWFC_CONFIG\t\t\t      \\\n+\t\t\t.parity = UART_##idx##_NRF_PARITY_BIT,\t\t      \\\n+\t\t\t.baudrate = CONFIG_UART_##idx##_BAUD_RATE\t      \\\n+\t\t};\t\t\t\t\t\t\t      \\\n+\t\tif (UART_##idx##_INTERRUPT_DRIVEN) {\t\t\t      \\\n+\t\t\tUART_##idx##_INTERRUPTS_INIT();\t\t\t      \\\n+\t\t}\t\t\t\t\t\t\t      \\\n+\t\treturn uarte_instance_init(dev,\t\t\t\t      \\\n+\t\t\t\t&init_config,\t\t\t\t      \\\n+\t\t\t\tUART_##idx##_INTERRUPT_DRIVEN);\t\t      \\\n+\t}\t\t\t\t\t\t\t\t      \\\n+\tDEVICE_AND_API_INIT(uart_nrfx_uarte##idx,\t\t\t      \\\n+\t\t\t    CONFIG_UART_##idx##_NAME,                         \\\n+\t\t\t    uarte_##idx##_init,                               \\\n+\t\t\t    &uarte_##idx##_data,                              \\\n+\t\t\t    &uarte_##idx##_config,                            \\\n+\t\t\t    PRE_KERNEL_1,                                     \\\n+\t\t\t    CONFIG_KERNEL_INIT_PRIORITY_DEVICE,               \\\n+\t\t\t    &uart_nrfx_uarte_driver_api)\n+\n+#define UART_NRF_HWFC_ENABLED(idx)                  \\\n+\t.pselcts = CONFIG_UART_##idx##_NRF_CTS_PIN, \\\n+\t.pselrts = CONFIG_UART_##idx##_NRF_RTS_PIN, \\\n+\t.hwfc = NRF_UARTE_HWFC_ENABLED,\n+#define UART_NRF_HWFC_DISABLED                  \\\n+\t.pselcts = NRF_UARTE_PSEL_DISCONNECTED, \\\n+\t.pselrts = NRF_UARTE_PSEL_DISCONNECTED, \\\n+\t.hwfc = NRF_UARTE_HWFC_DISABLED,\n+\n+#define UART_NRF_IRQ_ENABLED(idx)\t\t\t\\\n+\tIRQ_CONNECT(NRFX_IRQ_NUMBER_GET(NRF_UARTE##idx),\\\n+\t\t    CONFIG_UART_##idx##_IRQ_PRI,        \\\n+\t\t    uarte_nrfx_isr,                     \\\n+\t\t    DEVICE_GET(uart_nrfx_uarte##idx),   \\\n+\t\t    0)\n+#define UART_NRF_IRQ_DISABLED\n+\n+\n+#ifdef CONFIG_UART_0_NRF_UARTE\n+\t#ifdef CONFIG_UART_0_INTERRUPT_DRIVEN\n+\t\t#define UART_0_INTERRUPT_DRIVEN\t\t(1u)\n+\t\t#define UART_0_INTERRUPTS_INIT()\tUART_NRF_IRQ_ENABLED(0)\n+\t#else\n+\t\t#define UART_0_INTERRUPT_DRIVEN\t\t(0u)\n+\t\t#define UART_0_INTERRUPTS_INIT()\tUART_NRF_IRQ_DISABLED\n+\t#endif /* UART_0_INTERRUPT_DRIVEN */","path":"drivers/serial/uart_nrfx_uarte.c","position":566,"original_position":566,"commit_id":"1acfee8b92d99c8c8bdf4802e0f85e59decd637c","original_commit_id":"1acfee8b92d99c8c8bdf4802e0f85e59decd637c","user":{"login":"anangl","id":16913290,"node_id":"MDQ6VXNlcjE2OTEzMjkw","avatar_url":"https://avatars3.githubusercontent.com/u/16913290?v=4","gravatar_id":"","url":"https://api.github.com/users/anangl","html_url":"https://github.com/anangl","followers_url":"https://api.github.com/users/anangl/followers","following_url":"https://api.github.com/users/anangl/following{/other_user}","gists_url":"https://api.github.com/users/anangl/gists{/gist_id}","starred_url":"https://api.github.com/users/anangl/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/anangl/subscriptions","organizations_url":"https://api.github.com/users/anangl/orgs","repos_url":"https://api.github.com/users/anangl/repos","events_url":"https://api.github.com/users/anangl/events{/privacy}","received_events_url":"https://api.github.com/users/anangl/received_events","type":"User","site_admin":false},"body":"`CONFIG_UART_0_...`\r\n Same story with UART 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