{"push_id":2915392105,"size":14,"distinct_size":14,"ref":"refs/heads/_v2,14_33__KVM_PPC_Book3S_HV_Clear_partition_table_entry_on_vm_teardown_mbox_next","head":"11ea8843306393eb10d0d1f5d3d4ac218e2e030e","before":"7d342a7b8143290fe969cc454a34b76a2ec11ca8","commits":[{"sha":"c002e4459c6bc69ecfafafb676bccb398f146451","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"KVM: PPC: Book3S: Simplify external interrupt handling\n\nCurrently we use two bits in the vcpu pending_exceptions bitmap to\nindicate that an external interrupt is pending for the guest, one\nfor \"one-shot\" interrupts that are cleared when delivered, and one\nfor interrupts that persist until cleared by an explicit action of\nthe OS (e.g. an acknowledge to an interrupt controller).  The\nBOOK3S_IRQPRIO_EXTERNAL bit is used for one-shot interrupt requests\nand BOOK3S_IRQPRIO_EXTERNAL_LEVEL is used for persisting interrupts.\n\nIn practice BOOK3S_IRQPRIO_EXTERNAL never gets used, because our\nBook3S platforms generally, and pseries in particular, expect\nexternal interrupt requests to persist until they are acknowledged\nat the interrupt controller.  That combined with the confusion\nintroduced by having two bits for what is essentially the same thing\nmakes it attractive to simplify things by only using one bit.  This\npatch does that.\n\nWith this patch there is only BOOK3S_IRQPRIO_EXTERNAL, and by default\nit has the semantics of a persisting interrupt.  In order to avoid\nbreaking the ABI, we introduce a new \"external_oneshot\" flag which\npreserves the behaviour of the KVM_INTERRUPT ioctl with the\nKVM_INTERRUPT_SET argument.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/c002e4459c6bc69ecfafafb676bccb398f146451"},{"sha":"5a6b1b96bd75c94c584cd96624fedf860054e4be","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Remove left-over code in XICS-on-XIVE emulation\n\nThis removes code that clears the external interrupt pending bit in\nthe pending_exceptions bitmap.  This is left over from an earlier\niteration of the code where this bit was set when an escalation\ninterrupt arrived in order to wake the vcpu from cede.  Currently\nwe set the vcpu->arch.irq_pending flag instead for this purpose.\nTherefore there is no need to do anything with the pending_exceptions\nbitmap.\n\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/5a6b1b96bd75c94c584cd96624fedf860054e4be"},{"sha":"9edfc6cfac0d838b277c08a76ba9be0eb54ae650","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Move interrupt delivery on guest entry to C code\n\nThis is based on a patch by Suraj Jitindar Singh.\n\nThis moves the code in book3s_hv_rmhandlers.S that generates an\nexternal, decrementer or privileged doorbell interrupt just before\nentering the guest to C code in book3s_hv_builtin.c.  This is to\nmake future maintenance and modification easier.  The algorithm\nexpressed in the C code is almost identical to the previous\nalgorithm.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/9edfc6cfac0d838b277c08a76ba9be0eb54ae650"},{"sha":"deb5dac06b4038cb974d562678888560c769a0ac","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Extract PMU save/restore operations as C-callable functions\n\nThis pulls out the assembler code that is responsible for saving and\nrestoring the PMU state for the host and guest into separate functions\nso they can be used from an alternate entry path.  The calling\nconvention is made compatible with C.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/deb5dac06b4038cb974d562678888560c769a0ac"},{"sha":"df0675260caa727ad727ea7d5200311c017e3cf6","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Simplify real-mode interrupt handling\n\nThis streamlines the first part of the code that handles a hypervisor\ninterrupt that occurred in the guest.  With this, all of the real-mode\nhandling that occurs is done before the \"guest_exit_cont\" label; once\nwe get to that label we are committed to exiting to host virtual mode.\nThus the machine check and HMI real-mode handling is moved before that\nlabel.\n\nAlso, the code to handle external interrupts is moved out of line, as\nis the code that calls kvmppc_realmode_hmi_handler().\n\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/df0675260caa727ad727ea7d5200311c017e3cf6"},{"sha":"85562d04f8da0e372d0f6d91977635c9913dece9","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"KVM: PPC: Book3S: Rework TM save/restore code and make it C-callable\n\nThis adds a parameter to __kvmppc_save_tm and __kvmppc_restore_tm\nwhich allows the caller to indicate whether it wants the nonvolatile\nregister state to be preserved across the call, as required by the C\ncalling conventions.  This parameter being non-zero also causes the\nMSR bits that enable TM, FP, VMX and VSX to be preserved.  The\ncondition register and DSCR are now always preserved.\n\nWith this, kvmppc_save_tm_hv and kvmppc_restore_tm_hv can be called\nfrom C code provided the 3rd parameter is non-zero.  So that these\nfunctions can be called from modules, they now include code to set\nthe TOC pointer (r2) on entry, as they can call other built-in C\nfunctions which will assume the TOC to have been set.\n\nAlso, the fake suspend code in kvmppc_save_tm_hv is modified here to\nassume that treclaim in fake-suspend state does not modify any registers,\nwhich is the case on POWER9.  This enables the code to be simplified\nquite a bit.\n\n_kvmppc_save_tm_pr and _kvmppc_restore_tm_pr become much simpler with\nthis change, since they now only need to save and restore TAR and pass\n1 for the 3rd argument to __kvmppc_{save,restore}_tm.\n\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/85562d04f8da0e372d0f6d91977635c9913dece9"},{"sha":"2153d8afcc7931f32b3ddcd4e6cbe9ceac7298ab","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Call kvmppc_handle_exit_hv() with vcore unlocked\n\nCurrently kvmppc_handle_exit_hv() is called with the vcore lock held\nbecause it is called within a for_each_runnable_thread loop.\nHowever, we already unlock the vcore within kvmppc_handle_exit_hv()\nunder certain circumstances, and this is safe because (a) any vcpus\nthat become runnable and are added to the runnable set by\nkvmppc_run_vcpu() have their vcpu->arch.trap == 0 and can't actually\nrun in the guest (because the vcore state is VCORE_EXITING), and\n(b) for_each_runnable_thread is safe against addition or removal\nof vcpus from the runnable set.\n\nTherefore, in order to simplify things for following patches, let's\ndrop the vcore lock in the for_each_runnable_thread loop, so\nkvmppc_handle_exit_hv() gets called without the vcore lock held.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/2153d8afcc7931f32b3ddcd4e6cbe9ceac7298ab"},{"sha":"22f1bde65bd55708001e6670f1a278ad2961fed1","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Streamlined guest entry/exit path on P9 for radix guests\n\nThis creates an alternative guest entry/exit path which is used for\nradix guests on POWER9 systems when we have indep_threads_mode=Y.  In\nthese circumstances there is exactly one vcpu per vcore and there is\nno coordination required between vcpus or vcores; the vcpu can enter\nthe guest without needing to synchronize with anything else.\n\nThe new fast path is implemented almost entirely in C in book3s_hv.c\nand runs with the MMU on until the guest is entered.  On guest exit\nwe use the existing path until the point where we are committed to\nexiting the guest (as distinct from handling an interrupt in the\nlow-level code and returning to the guest) and we have pulled the\nguest context from the XIVE.  At that point we check a flag in the\nstack frame to see whether we came in via the old path and the new\npath; if we came in via the new path then we go back to C code to do\nthe rest of the process of saving the guest context and restoring the\nhost context.\n\nThe C code is split into separate functions for handling the\nOS-accessible state and the hypervisor state, with the idea that the\nlatter can be replaced by a hypercall when we implement nested\nvirtualization.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/22f1bde65bd55708001e6670f1a278ad2961fed1"},{"sha":"510c5e5a453facbec8b2ad2b8290b1c28b359993","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Handle hypervisor instruction faults better\n\nCurrently the code for handling hypervisor instruction page faults\npasses 0 for the flags indicating the type of fault, which is OK in\nthe usual case that the page is not mapped in the partition-scoped\npage tables.  However, there are other causes for hypervisor\ninstruction page faults, such as not being to update a reference\n(R) or change (C) bit.  The cause is indicated in bits in HSRR1,\nincluding a bit which indicates that the fault is due to not being\nable to write to a page (for example to update an R or C bit).\nNot handling these other kinds of faults correctly can lead to a\nloop of continual faults without forward progress in the guest.\n\nIn order to handle these faults better, this patch constructs a\n\"DSISR-like\" value from the bits which DSISR and SRR1 (for a HISI)\nhave in common, and passes it to kvmppc_book3s_hv_page_fault() so\nthat it knows what caused the fault.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/510c5e5a453facbec8b2ad2b8290b1c28b359993"},{"sha":"67fb31a03acedf9291118948b7dc0cde595fa70e","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Add a debugfs file to dump radix mappings\n\nThis adds a file called 'radix' in the debugfs directory for the\nguest, which when read gives all of the valid leaf PTEs in the\npartition-scoped radix tree for a radix guest, in human-readable\nformat.  It is analogous to the existing 'htab' file which dumps\nthe HPT entries for a HPT guest.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/67fb31a03acedf9291118948b7dc0cde595fa70e"},{"sha":"ecc943a478306309ebc5cb7787e9d8d6e3f44a99","author":{"name":"Suraj Jitindar Singh","email":"63001eb0415a706e3ac64f0cfef2d744d291097c@gmail.com"},"message":"powerpc: Add LPCR_EVIRT define\n\nAdd definition of the LPCR EVIRT (enhanced virtualisation) bit.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/ecc943a478306309ebc5cb7787e9d8d6e3f44a99"},{"sha":"d943506c9f343fcd2947c8c1d4eff3015381925e","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"powerpc: Turn off CPU_FTR_P9_TM_HV_ASSIST in non-hypervisor mode\n\nWhen doing nested virtualization, it is only necessary to do the\ntransactional memory hypervisor assist at level 0, that is, when\nwe are in hypervisor mode.  Nested hypervisors can just use the TM\nfacilities as architected.  Therefore we should clear the\nCPU_FTR_P9_TM_HV_ASSIST bit when we are not in hypervisor mode,\nalong with the CPU_FTR_HVMODE bit.\n\nDoing this will not change anything at this stage because the only\ncode that tests CPU_FTR_P9_TM_HV_ASSIST is in HV KVM, which currently\ncan only be used when when CPU_FTR_HVMODE is set.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/d943506c9f343fcd2947c8c1d4eff3015381925e"},{"sha":"e6d4214d80cdbb58a56790b00205a9bfef9a94d5","author":{"name":"Paul Mackerras","email":"19a0ba370c443ba08d20b5061586430ab449ee8c@ozlabs.org"},"message":"KVM: PPC: Use ccr field in pt_regs struct embedded in vcpu struct\n\nWhen the 'regs' field was added to struct kvm_vcpu_arch, the code\nwas changed to use several of the fields inside regs (e.g., gpr, lr,\netc.) but not the ccr field, because the ccr field in struct pt_regs\nis 64 bits on 64-bit platforms, but the cr field in kvm_vcpu_arch is\nonly 32 bits.  This changes the code to use the regs.ccr field\ninstead of cr, and changes the assembly code on 64-bit platforms to\nuse 64-bit loads and stores instead of 32-bit ones.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/e6d4214d80cdbb58a56790b00205a9bfef9a94d5"},{"sha":"11ea8843306393eb10d0d1f5d3d4ac218e2e030e","author":{"name":"Suraj Jitindar Singh","email":"63001eb0415a706e3ac64f0cfef2d744d291097c@gmail.com"},"message":"KVM: PPC: Book3S HV: Clear partition table entry on vm teardown\n\nWhen destroying a VM we return the LPID to the pool, however we never\nzero the partition table entry. This is instead done when we reallocate\nthe LPID.\n\nZero the partition table entry on VM teardown before returning the LPID\nto the pool. This means if we were running as a nested hypervisor the\nreal hypervisor could use this to determine when it can free resources.\n\nReviewed-by: David Gibson <david@gibson.dropbear.id.au>\nSigned-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/ruscur/linux/commits/11ea8843306393eb10d0d1f5d3d4ac218e2e030e"}]}
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