{"push_id":2428791068,"size":17,"distinct_size":8,"ref":"refs/heads/system_allct","head":"90f23bb6a061bf8d66961c3e3088b8168824d49c","before":"d8d4d12f8d1a2818977abdf9e85466028b49e51f","commits":[{"sha":"095ccc1eb07863cf96872c0f236c1119025061ce","author":{"name":"Philipp Wagner","email":"a619d2b71933ed66cf929f875bc6b8fad0c588c5@tum.de"},"message":"Make install-build-deps.sh script workdir agnostic","distinct":false,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/095ccc1eb07863cf96872c0f236c1119025061ce"},{"sha":"f5d9a551207383f06d7748f7623d754760d1d6d6","author":{"name":"Philipp Wagner","email":"a619d2b71933ed66cf929f875bc6b8fad0c588c5@tum.de"},"message":"Squashed 'external/opensocdebug/software/' changes from 3d77b54..583a47e\n\n583a47e Make more of osd_hostmod available in Python\n\ngit-subtree-dir: external/opensocdebug/software\ngit-subtree-split: 583a47e9f89b087185ecd7f5aefdcc00b020e292","distinct":false,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/f5d9a551207383f06d7748f7623d754760d1d6d6"},{"sha":"9a5422c5ce746c4ce8f33a565bca93700ca49059","author":{"name":"Philipp Wagner","email":"a619d2b71933ed66cf929f875bc6b8fad0c588c5@tum.de"},"message":"Update external/opensocdebug/osd-sw","distinct":false,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/9a5422c5ce746c4ce8f33a565bca93700ca49059"},{"sha":"dd2fc99579a544042b1a4ed4555e34ef7677c15f","author":{"name":"Philipp Wagner","email":"a619d2b71933ed66cf929f875bc6b8fad0c588c5@tum.de"},"message":"Squashed 'external/opensocdebug/hardware/' changes from 43c2770..404edd7\n\n404edd7 cocotb_testrunner: make non-interactive runs easier\n\ngit-subtree-dir: external/opensocdebug/hardware\ngit-subtree-split: 404edd78fc0e9d30c5fd6c3f623a15fe976ac1c0","distinct":false,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/dd2fc99579a544042b1a4ed4555e34ef7677c15f"},{"sha":"afd125dfb6fc2ac2293607e8f70716186ae60267","author":{"name":"Philipp Wagner","email":"a619d2b71933ed66cf929f875bc6b8fad0c588c5@tum.de"},"message":"Update external/opensocdebug/osd-hw","distinct":false,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/afd125dfb6fc2ac2293607e8f70716186ae60267"},{"sha":"8fcdc0213d3d0fd85b95dfe6c5d2d4b87abde2c0","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"Makefile: use python3 from path\n\nUse python3 from path instead of /usr/bin. This makes it easier to use other python installations (e.g. in the CI environment)","distinct":false,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/8fcdc0213d3d0fd85b95dfe6c5d2d4b87abde2c0"},{"sha":"a820e746455e973258e7e67c1a1dcd18f3b24b8e","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"Revert \"Makefile: use python3 from path\"\n\nThis reverts commit 8fcdc0213d3d0fd85b95dfe6c5d2d4b87abde2c0.","distinct":false,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/a820e746455e973258e7e67c1a1dcd18f3b24b8e"},{"sha":"675b2c2418b6e33a1de3a3c64f04161248621040","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"build tool: clarify default behavior\n\nThe annotation with [default: True/False] was confusing, fixed and\nmark the one option that is default with [default].","distinct":false,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/675b2c2418b6e33a1de3a3c64f04161248621040"},{"sha":"479594d5e3639be50c46144f9e262cadaaea1e80","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"fpga examples: Add missing config parameter\n\nAdd config parameter for the debug subsystem to some examples where it\nwas missing.","distinct":false,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/479594d5e3639be50c46144f9e262cadaaea1e80"},{"sha":"4abe9d2e96fd15c885704ba0d931a2bd29c6b7aa","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"Systems: Configurable system with compute tiles\n\nThis is a system that generates a mesh of compute tiles based on the\nXDIM and YDIM parameter.","distinct":true,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/4abe9d2e96fd15c885704ba0d931a2bd29c6b7aa"},{"sha":"9bfb77f2ddbb736b847b800c4036a7080ab8313c","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"Replace system_2x2_cccc with system_2x2_allct\n\nThe new system can be used for other dimensions too.","distinct":true,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/9bfb77f2ddbb736b847b800c4036a7080ab8313c"},{"sha":"d8121c103cf9149782e176e7664249dbaba96bad","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"examples: Replace testbench for mesh based systems\n\nThis replaces the 2x2_cccc simulation toplevel and makes it\ngeneric. The size of the mesh is configurable with fusesoc/verilog\nparameters XDIM and YDIM. Compute tiles are connected to all routers\nin the mesh.","distinct":true,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/d8121c103cf9149782e176e7664249dbaba96bad"},{"sha":"37b52114d39c56b0b1f9c5f2c949988dfc9bd128","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"Change compute tile listing in NA\n\nSo far we maintained a list with IDs of compute tiles, which is very\ninefficient. Instead we have a bitmask now of all tiles with the\ncompute tiles having a bit set at their position. They are grouped in\n32 bit groups, and 32 groups are there, which leads to a total of 1024\ntiles supported.\n\nThe software is adopted accordingly. As this procedure is rather slow,\nit is moved to optimsoc_init to fill the same data structure we had\nbefore.","distinct":true,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/37b52114d39c56b0b1f9c5f2c949988dfc9bd128"},{"sha":"a52b2fd43594ebf8b3bd820348f31a79d05af83b","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"Move package imports\n\nWe started moving package imports to the spot between the module\ndeclaration and the parameter declaration as this seems to be the\nactual plac (tm) where they belong. Fix this for a number of modules.","distinct":true,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/a52b2fd43594ebf8b3bd820348f31a79d05af83b"},{"sha":"b8a37a11bc98657f455448e9a35563145203904d","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"systems: Connect debug as meander in allct\n\nThe debug modules are instantiated as before and identifiers are not\nchanging, but the way the ring is connected changes. The ring is\nconnected as meander in the mesh.","distinct":true,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/b8a37a11bc98657f455448e9a35563145203904d"},{"sha":"38f1ac5f831a7aa8ac6bc8663db3af6318ded412","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"Examples: Nexys4 FPGA generalize allct\n\nAs long as you use local memory as BRAM (and not emulated with\nexternal memory) it is now possible to configure arbitrary mesh\ndimensions.\n\nTo be fully flexible (LMEM_EXTERNAL && TILES!=4) the AXI interconnect\nneeds to be fixed.","distinct":true,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/38f1ac5f831a7aa8ac6bc8663db3af6318ded412"},{"sha":"90f23bb6a061bf8d66961c3e3088b8168824d49c","author":{"name":"Stefan Wallentowitz","email":"6fe76ede026e27600863a1ff38da4e776dcaecdf@wallentowitz.de"},"message":"Examples: Migrate VCU108 design to configurable\n\nThe design can now be configured in dimensions and with internal or\nexternal memory.","distinct":true,"url":"https://api.github.com/repos/optimsoc/optimsoc/commits/90f23bb6a061bf8d66961c3e3088b8168824d49c"}]}
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