{"action":"created","issue":{"url":"https://api.github.com/repos/bperez77/xilinx_axidma/issues/68","repository_url":"https://api.github.com/repos/bperez77/xilinx_axidma","labels_url":"https://api.github.com/repos/bperez77/xilinx_axidma/issues/68/labels{/name}","comments_url":"https://api.github.com/repos/bperez77/xilinx_axidma/issues/68/comments","events_url":"https://api.github.com/repos/bperez77/xilinx_axidma/issues/68/events","html_url":"https://github.com/bperez77/xilinx_axidma/issues/68","id":359877231,"node_id":"MDU6SXNzdWUzNTk4NzcyMzE=","number":68,"title":"Issues with the Benchmark","user":{"login":"brianvg","id":7373794,"node_id":"MDQ6VXNlcjczNzM3OTQ=","avatar_url":"https://avatars3.githubusercontent.com/u/7373794?v=4","gravatar_id":"","url":"https://api.github.com/users/brianvg","html_url":"https://github.com/brianvg","followers_url":"https://api.github.com/users/brianvg/followers","following_url":"https://api.github.com/users/brianvg/following{/other_user}","gists_url":"https://api.github.com/users/brianvg/gists{/gist_id}","starred_url":"https://api.github.com/users/brianvg/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/brianvg/subscriptions","organizations_url":"https://api.github.com/users/brianvg/orgs","repos_url":"https://api.github.com/users/brianvg/repos","events_url":"https://api.github.com/users/brianvg/events{/privacy}","received_events_url":"https://api.github.com/users/brianvg/received_events","type":"User","site_admin":false},"labels":[{"id":335086548,"node_id":"MDU6TGFiZWwzMzUwODY1NDg=","url":"https://api.github.com/repos/bperez77/xilinx_axidma/labels/bug","name":"bug","color":"fc2929","default":true}],"state":"open","locked":false,"assignee":null,"assignees":[],"milestone":null,"comments":7,"created_at":"2018-09-13T12:38:13Z","updated_at":"2018-09-21T21:06:22Z","closed_at":null,"author_association":"NONE","body":"Hi!\r\n\r\nAs I understand the benchmark example program should also work for a VDMA engine looped back, correct? I have a design which contains only a VDMA engine with TX and RX looped back. The module loads ok, and both channels seem to be seen:\r\n`[    7.697740] axidma: axidma_dma.c: axidma_dma_init: 718: DMA: Found 0 transmit channels and 0 receive channels.\r\n[    7.707679] axidma: axidma_dma.c: axidma_dma_init: 720: VDMA: Found 1 transmit channels and 1 receive channels.`\r\n\r\nWhen I run the benchmark code as below:\r\n\r\n`sudo ./axidma_benchmark -v -t 0 -r 1 -f 10x10x3 -g 10x10x3 -n 3`\r\n\r\nI get a segmentation fault.\r\n\r\nIn dmesg I see:\r\n`[  170.988718] axidma: axidma_dma.c: axidma_start_transfer: 301: VDMA receive transaction timed out.\r\n`\r\n\r\nAny suggestions as to where I can look for the problem?\r\n\r\nThanks!!\r\n"},"comment":{"url":"https://api.github.com/repos/bperez77/xilinx_axidma/issues/comments/423670655","html_url":"https://github.com/bperez77/xilinx_axidma/issues/68#issuecomment-423670655","issue_url":"https://api.github.com/repos/bperez77/xilinx_axidma/issues/68","id":423670655,"node_id":"MDEyOklzc3VlQ29tbWVudDQyMzY3MDY1NQ==","user":{"login":"EKjeldsen","id":32107430,"node_id":"MDQ6VXNlcjMyMTA3NDMw","avatar_url":"https://avatars3.githubusercontent.com/u/32107430?v=4","gravatar_id":"","url":"https://api.github.com/users/EKjeldsen","html_url":"https://github.com/EKjeldsen","followers_url":"https://api.github.com/users/EKjeldsen/followers","following_url":"https://api.github.com/users/EKjeldsen/following{/other_user}","gists_url":"https://api.github.com/users/EKjeldsen/gists{/gist_id}","starred_url":"https://api.github.com/users/EKjeldsen/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/EKjeldsen/subscriptions","organizations_url":"https://api.github.com/users/EKjeldsen/orgs","repos_url":"https://api.github.com/users/EKjeldsen/repos","events_url":"https://api.github.com/users/EKjeldsen/events{/privacy}","received_events_url":"https://api.github.com/users/EKjeldsen/received_events","type":"User","site_admin":false},"created_at":"2018-09-21T21:06:22Z","updated_at":"2018-09-21T21:06:22Z","author_association":"NONE","body":"Looking deeper into the axidma_callback( ... ) signal handler for the VDMA Tx transaction done signal, there is an assert( ... ) function being called.  An assertion is not considered async-signal-safe.  This could be the root of the problem but won't know for sure until testing on the ZynqMP."}}
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