{"action":"opened","issue":{"url":"https://api.github.com/repos/inducer/pyopencl/issues/236","repository_url":"https://api.github.com/repos/inducer/pyopencl","labels_url":"https://api.github.com/repos/inducer/pyopencl/issues/236/labels{/name}","comments_url":"https://api.github.com/repos/inducer/pyopencl/issues/236/comments","events_url":"https://api.github.com/repos/inducer/pyopencl/issues/236/events","html_url":"https://github.com/inducer/pyopencl/issues/236","id":341183823,"node_id":"MDU6SXNzdWUzNDExODM4MjM=","number":236,"title":"Pyopencl on Xilinx FPGAs","user":{"login":"vishnu856","id":11263861,"node_id":"MDQ6VXNlcjExMjYzODYx","avatar_url":"https://avatars1.githubusercontent.com/u/11263861?v=4","gravatar_id":"","url":"https://api.github.com/users/vishnu856","html_url":"https://github.com/vishnu856","followers_url":"https://api.github.com/users/vishnu856/followers","following_url":"https://api.github.com/users/vishnu856/following{/other_user}","gists_url":"https://api.github.com/users/vishnu856/gists{/gist_id}","starred_url":"https://api.github.com/users/vishnu856/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/vishnu856/subscriptions","organizations_url":"https://api.github.com/users/vishnu856/orgs","repos_url":"https://api.github.com/users/vishnu856/repos","events_url":"https://api.github.com/users/vishnu856/events{/privacy}","received_events_url":"https://api.github.com/users/vishnu856/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":null,"assignees":[],"milestone":null,"comments":0,"created_at":"2018-07-13T23:09:28Z","updated_at":"2018-07-13T23:09:28Z","closed_at":null,"author_association":"NONE","body":"Hello. I am trying to get PyOpenCL to work on my Xilinx FPGA board. I followed all the steps from [nachiket](https://github.com/nachiket) and I got to the part where the environment variables are set, as per his [paper](https://paper.dropbox.com/doc/PyOpenCL-for-Xilinx-FPGAs-tT2KOlxwe2YGWNBdKNyzx). My python program fails to detect the emulation configuration file created for my board and resorts to the default one. I know the configuration works because I wrote a sample program in C and that detects my emconfig.json file. Could you please guide me as to what the issue could be, and if it is related to PyOpenCL? I can't find enough documentation on Xilinx about this issue and the .c program is able to detect the emconfig.json file, so I am stuck. Does pyopencl convert the python code into a C-based version for calling the kernels in a different directory? Any help you could give me would be highly appreciated. Thank you."}}
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