{"push_id":2957864566,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"49282c77b25a4ed5f13a314dbf8fc4ce31ddb646","before":"bfa0109264e8a189b5e67fb4570749cbc8df1937","commits":[{"sha":"49282c77b25a4ed5f13a314dbf8fc4ce31ddb646","author":{"name":"Simon Pilgrim","email":"af4b1a06dcc93e086b35435d5654eb2aff59399a@redking.me.uk"},"message":"[LegalizeDAG] Don't bother with final MUL+SRL stage for byte CTPOP.\n\nThe final stage of CTPOP expansion (v = (v * 0x01010101...) >> (Len - 8)) is completely pointless for the byte (Len = 8) case as it reduces to (v = (v * 0x01...) >> 0), but annoyingly this doesn't always get optimized away.\n\nFound while investigating generic vector CTPOP expansion (PR32655).","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm-project-submodule/commits/49282c77b25a4ed5f13a314dbf8fc4ce31ddb646"}]}
{"actor":{"display_login":"chapuni"}}