{"push_id":2654551869,"size":6,"distinct_size":0,"ref":"refs/heads/upstream/master","head":"f6172a9f68fc00b02e107edcf5e46540c605cb9b","before":"f1fc1ae9b77fdfa000b1dbfb00eebd6a1e56b791","commits":[{"sha":"f135420eabeb58820a228d3ffa93a00bcb7ff516","author":{"name":"Derek Schuff","email":"3cf7ba45f835c4cf8b5fe7d6a48fa95fd7df4df7@google.com"},"message":"[WebAssembly] Fixed disassembler unit test failure.\n\nSummary: A recent commit forgot to update the unit tests.\n\nDifferential Revision: https://reviews.llvm.org/D48304\n\nPatch by Wouter Van Oortmerssen\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334999 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/fuchsia-mirror/third_party-llvm/commits/f135420eabeb58820a228d3ffa93a00bcb7ff516"},{"sha":"7d6421e0edcff12392b82b5ca10eca2eeb134a74","author":{"name":"Eli Friedman","email":"8e5ee4945af1f17b38864e236876caaaabff2d25@codeaurora.org"},"message":"[ARM] Testcase for missed optimization with i16 compare.\n\nThe result looks weird because the DAG actually has an explicit\nshift; I haven't figured out why, exactly.\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335000 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/fuchsia-mirror/third_party-llvm/commits/7d6421e0edcff12392b82b5ca10eca2eeb134a74"},{"sha":"f5b3e111649744268bb815679d4beed9fa4bb1f0","author":{"name":"Eli Friedman","email":"8e5ee4945af1f17b38864e236876caaaabff2d25@codeaurora.org"},"message":"[ARM] Testcase for missed optimization for masking.\n\nWhen the result of masking is truncated to i16, we should try to use\n\"bic\" instead of \"and\".\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335001 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/fuchsia-mirror/third_party-llvm/commits/f5b3e111649744268bb815679d4beed9fa4bb1f0"},{"sha":"959e5f81645e961ecd2926a3ab7cf560da559b7e","author":{"name":"Eli Friedman","email":"8e5ee4945af1f17b38864e236876caaaabff2d25@codeaurora.org"},"message":"[ARM] Add Thumb1 coverage for cmn testcases.\n\nThere's a missed optimization for immediates: we can save two\ninstructions by using adds instead of movs+mvns+cmp.\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335002 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/fuchsia-mirror/third_party-llvm/commits/959e5f81645e961ecd2926a3ab7cf560da559b7e"},{"sha":"9ba2448193a4eb34a6d5df6a90140a1cef920ee3","author":{"name":"Eli Friedman","email":"8e5ee4945af1f17b38864e236876caaaabff2d25@codeaurora.org"},"message":"[ARM] Testcase for Thumb1 cmp with constants.\n\nEven if a comparison isn't legal, we should try to prefer constants\nwhich can be materialized with a two-instruction sequence. (Thinking\nabout it a bit more, there might be some more clever sequence we could\ngenerate for certain comparisons invoving powers of two, but I'm not\nsure exactly what that would look like.)\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335003 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/fuchsia-mirror/third_party-llvm/commits/9ba2448193a4eb34a6d5df6a90140a1cef920ee3"},{"sha":"f6172a9f68fc00b02e107edcf5e46540c605cb9b","author":{"name":"Eli Friedman","email":"8e5ee4945af1f17b38864e236876caaaabff2d25@codeaurora.org"},"message":"[ARM] Thumb2 constant cmp testcases.\n\nShows some missed optimizations for the -7929856 and -2166 testcases.\n-7929856 is due to a bug in ARMTargetLowering::getARMCmp, I think;\nthe -2166 case is a missing pattern.\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@335004 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/fuchsia-mirror/third_party-llvm/commits/f6172a9f68fc00b02e107edcf5e46540c605cb9b"}]}
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