{"push_id":2301260606,"size":2,"distinct_size":2,"ref":"refs/heads/release_60","head":"c58b8e474869103db37617eddaf9d031dcb0278e","before":"70b17a43ffc99288ce6d2ee90ffe9b610984b0b6","commits":[{"sha":"3eb766f1084459bb987d78f315e9c6aa1200802c","author":{"name":"Hans Wennborg","email":"203d66e5372c0c8aa6dec86704b71549fae6db41@hanshq.net"},"message":"Merging r323155:\n------------------------------------------------------------------------\nr323155 | chandlerc | 2018-01-22 23:05:25 +0100 (Mon, 22 Jan 2018) | 133 lines\n\nIntroduce the \"retpoline\" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, \"Branch Target Injection\", and is one of the two halves to Spectre..\n\nSummary:\nFirst, we need to explain the core of the vulnerability. Note that this\nis a very incomplete description, please see the Project Zero blog post\nfor details:\nhttps://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html\n\nThe basis for branch target injection is to direct speculative execution\nof the processor to some \"gadget\" of executable code by poisoning the\nprediction of indirect branches with the address of that gadget. The\ngadget in turn contains an operation that provides a side channel for\nreading data. Most commonly, this will look like a load of secret data\nfollowed by a branch on the loaded value and then a load of some\npredictable cache line. The attacker then uses timing of the processors\ncache to determine which direction the branch took *in the speculative\nexecution*, and in turn what one bit of the loaded value was. Due to the\nnature of these timing side channels and the branch predictor on Intel\nprocessors, this allows an attacker to leak data only accessible to\na privileged domain (like the kernel) back into an unprivileged domain.\n\nThe goal is simple: avoid generating code which contains an indirect\nbranch that could have its prediction poisoned by an attacker. In many\ncases, the compiler can simply use directed conditional branches and\na small search tree. LLVM already has support for lowering switches in\nthis way and the first step of this patch is to disable jump-table\nlowering of switches and introduce a pass to rewrite explicit indirectbr\nsequences into a switch over integers.\n\nHowever, there is no fully general alternative to indirect calls. We\nintroduce a new construct we call a \"retpoline\" to implement indirect\ncalls in a non-speculatable way. It can be thought of loosely as\na trampoline for indirect calls which uses the RET instruction on x86.\nFurther, we arrange for a specific call->ret sequence which ensures the\nprocessor predicts the return to go to a controlled, known location. The\nretpoline then \"smashes\" the return address pushed onto the stack by the\ncall with the desired target of the original indirect call. The result\nis a predicted return to the next instruction after a call (which can be\nused to trap speculative execution within an infinite loop) and an\nactual indirect branch to an arbitrary address.\n\nOn 64-bit x86 ABIs, this is especially easily done in the compiler by\nusing a guaranteed scratch register to pass the target into this device.\nFor 32-bit ABIs there isn't a guaranteed scratch register and so several\ndifferent retpoline variants are introduced to use a scratch register if\none is available in the calling convention and to otherwise use direct\nstack push/pop sequences to pass the target address.\n\nThis \"retpoline\" mitigation is fully described in the following blog\npost: https://support.google.com/faqs/answer/7625886\n\nWe also support a target feature that disables emission of the retpoline\nthunk by the compiler to allow for custom thunks if users want them.\nThese are particularly useful in environments like kernels that\nroutinely do hot-patching on boot and want to hot-patch their thunk to\ndifferent code sequences. They can write this custom thunk and use\n`-mretpoline-external-thunk` *in addition* to `-mretpoline`. In this\ncase, on x86-64 thu thunk names must be:\n```\n  __llvm_external_retpoline_r11\n```\nor on 32-bit:\n```\n  __llvm_external_retpoline_eax\n  __llvm_external_retpoline_ecx\n  __llvm_external_retpoline_edx\n  __llvm_external_retpoline_push\n```\nAnd the target of the retpoline is passed in the named register, or in\nthe case of the `push` suffix on the top of the stack via a `pushl`\ninstruction.\n\nThere is one other important source of indirect branches in x86 ELF\nbinaries: the PLT. These patches also include support for LLD to\ngenerate PLT entries that perform a retpoline-style indirection.\n\nThe only other indirect branches remaining that we are aware of are from\nprecompiled runtimes (such as crt0.o and similar). The ones we have\nfound are not really attackable, and so we have not focused on them\nhere, but eventually these runtimes should also be replicated for\nretpoline-ed configurations for completeness.\n\nFor kernels or other freestanding or fully static executables, the\ncompiler switch `-mretpoline` is sufficient to fully mitigate this\nparticular attack. For dynamic executables, you must compile *all*\nlibraries with `-mretpoline` and additionally link the dynamic\nexecutable and all shared libraries with LLD and pass `-z retpolineplt`\n(or use similar functionality from some other linker). We strongly\nrecommend also using `-z now` as non-lazy binding allows the\nretpoline-mitigated PLT to be substantially smaller.\n\nWhen manually apply similar transformations to `-mretpoline` to the\nLinux kernel we observed very small performance hits to applications\nrunning typical workloads, and relatively minor hits (approximately 2%)\neven for extremely syscall-heavy applications. This is largely due to\nthe small number of indirect branches that occur in performance\nsensitive paths of the kernel.\n\nWhen using these patches on statically linked applications, especially\nC++ applications, you should expect to see a much more dramatic\nperformance hit. For microbenchmarks that are switch, indirect-, or\nvirtual-call heavy we have seen overheads ranging from 10% to 50%.\n\nHowever, real-world workloads exhibit substantially lower performance\nimpact. Notably, techniques such as PGO and ThinLTO dramatically reduce\nthe impact of hot indirect calls (by speculatively promoting them to\ndirect calls) and allow optimized search trees to be used to lower\nswitches. If you need to deploy these techniques in C++ applications, we\n*strongly* recommend that you ensure all hot call targets are statically\nlinked (avoiding PLT indirection) and use both PGO and ThinLTO. Well\ntuned servers using all of these techniques saw 5% - 10% overhead from\nthe use of retpoline.\n\nWe will add detailed documentation covering these components in\nsubsequent patches, but wanted to make the core functionality available\nas soon as possible. Happy for more code review, but we'd really like to\nget these patches landed and backported ASAP for obvious reasons. We're\nplanning to backport this to both 6.0 and 5.0 release streams and get\na 5.0 release with just this cherry picked ASAP for distros and vendors.\n\nThis patch is the work of a number of people over the past month: Eric, Reid,\nRui, and myself. I'm mailing it out as a single commit due to the time\nsensitive nature of landing this and the need to backport it. Huge thanks to\neveryone who helped out here, and everyone at Intel who helped out in\ndiscussions about how to craft this. Also, credit goes to Paul Turner (at\nGoogle, but not an LLVM contributor) for much of the underlying retpoline\ndesign.\n\nReviewers: echristo, rnk, ruiu, craig.topper, DavidKreitzer\n\nSubscribers: sanjoy, emaste, mcrosier, mgorny, mehdi_amini, hiraditya, llvm-commits\n\nDifferential Revision: https://reviews.llvm.org/D41723\n------------------------------------------------------------------------\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/lld/branches/release_60@324069 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/kraj/lld/commits/3eb766f1084459bb987d78f315e9c6aa1200802c"},{"sha":"c58b8e474869103db37617eddaf9d031dcb0278e","author":{"name":"Hans Wennborg","email":"203d66e5372c0c8aa6dec86704b71549fae6db41@hanshq.net"},"message":"Merging r323288:\n------------------------------------------------------------------------\nr323288 | ruiu | 2018-01-24 01:26:57 +0100 (Wed, 24 Jan 2018) | 3 lines\n\nFix retpoline PLT header size for i386.\n\nDifferential Revision: https://reviews.llvm.org/D42397\n------------------------------------------------------------------------\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/lld/branches/release_60@324070 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/kraj/lld/commits/c58b8e474869103db37617eddaf9d031dcb0278e"}]}
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