{"push_id":2766156375,"size":5,"distinct_size":4,"ref":"refs/heads/rename_mmio_write_xxxx","head":"0060e4884c1fa63810a338062f958b14d3b7c877","before":"ab830c62e93d23490d160f1794b844f32897da41","commits":[{"sha":"56904bc235c021642c9666feec8eb83758919996","author":{"name":"David B. Kinder","email":"c56c8b29908a5b2af1b63001268d73a0b7f972ba@intel.com"},"message":"doc: CSS tweak for table caption location\n\nDefault behavior is for figure captions below the figure, but table\ncaptions above the table.  Tweak the CSS for tables to put the caption\nbelow instead.\n\nSigned-off-by: David B. Kinder <david.b.kinder@intel.com>","distinct":false,"url":"https://api.github.com/repos/mingqiangchi/acrn-hypervisor/commits/56904bc235c021642c9666feec8eb83758919996"},{"sha":"1664e0c8422968a37fa73e2d9227d5543b7667f2","author":{"name":"Huihuang Shi","email":"3743fa32c4effd99e1cd912b259709dd7054d13c@intel.com"},"message":"HV:fix rest integer violations\n\nFix integer related violations.\nV1->V2:\n  clean all memset/calloc integer violations excpet bsp/boot directory\n\nSigned-off-by: Huihuang Shi <huihuang.shi@intel.com>\nReviewed-by: Junjie Mao <junjie.mao@intel.com>\nAcked-by: Eddie Dong <eddie.dong@intel.com>","distinct":true,"url":"https://api.github.com/repos/mingqiangchi/acrn-hypervisor/commits/1664e0c8422968a37fa73e2d9227d5543b7667f2"},{"sha":"22005c6bf64e8418ed566e93345051451d4a4807","author":{"name":"Yonghua Huang","email":"f606db2a3086745a0361467dd77aa14f11210a09@intel.com"},"message":"HV: Refine hypervisor shell commands\n\n - removed shell commands:\n    --vcpu_pause\n    --vcpu_resume\n    --lsreq\n    --(warm) reboot\n    --vcpu_dumpmem\n\n - updated shell commands:\n    --vm_console    -> sos_console\n    --trigger crash  -> reboot\n    --merge 'set_loglevel' & 'get_loglevel' to 'loglevel'\n\n - new adding shell commands:\n   --dumpmem  --> dump host physical memory\n\n - other update\n   update the type of return value of 'shell_input_line()'\n   from 'uint8_t' to 'bool' and update related source code.\n\nSigned-off-by: Yonghua Huang <yonghua.huang@intel.com>\nAcked-by: Eddie Dong <eddie.dong@intel.com>","distinct":true,"url":"https://api.github.com/repos/mingqiangchi/acrn-hypervisor/commits/22005c6bf64e8418ed566e93345051451d4a4807"},{"sha":"93ed0371a0a0441d88d3d0a72f5b9653ae2203fb","author":{"name":"Mingqiang Chi","email":"e2649823be59b215505761aab39e00608d1c4db2@intel.com"},"message":"hv:cleanup console/uart code\n\n-- Check uart enabled flag, it will return if the flag is false.\n-- Add function declaration (uart16550_set_property) in console.h\n-- Remove unnecessary function declaration(get_serial_handle)\n-- Change uart_enabled and port_mapped to bool\n-- Fix MISRA-C integer violations\n\nSigned-off-by: Mingqiang Chi <mingqiang.chi@intel.com>\nAcked-by: Eddie Dong <eddie.dong@intel.com>","distinct":true,"url":"https://api.github.com/repos/mingqiangchi/acrn-hypervisor/commits/93ed0371a0a0441d88d3d0a72f5b9653ae2203fb"},{"sha":"0060e4884c1fa63810a338062f958b14d3b7c877","author":{"name":"Mingqiang Chi","email":"e2649823be59b215505761aab39e00608d1c4db2@intel.com"},"message":"hv:Rename port/mmio read and write APIs\n\nmmio_write_long --> mmio_write32\nmmio_write_word --> mmio_write16\nmmio_write_byte --> mmio_write8\nmmio_read_long  --> mmio_read32\nmmio_read_word  --> mmio_read16\nmmio_read_byte  --> mmio_read8\n\nio_write_long --> pio_write32\nio_write_word --> pio_write16\nio_write_byte --> pio_write8\nio_read_long  --> pio_read32\nio_read_word  --> pio_read16\nio_read_byte  --> pio_read8\nio_write      --> pio_write\nio_read       --> pio_read\n\nsetl --> set32\nsetw --> set16\nsetb --> set8\n\nigned-off-by: Mingqiang Chi <mingqiang.chi@intel.com>","distinct":true,"url":"https://api.github.com/repos/mingqiangchi/acrn-hypervisor/commits/0060e4884c1fa63810a338062f958b14d3b7c877"}]}
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