{"push_id":2446168800,"size":14,"distinct_size":14,"ref":"refs/heads/master","head":"3d3b45af465f6dcfc85ea69cc10a719bc3b2851c","before":"78a44055c50f4ea10ebb14714c4b6563cd64f71b","commits":[{"sha":"0808c6e8a3bd82316988d3d86bd6b212eefff6a2","author":{"name":"Matthias Welwarsky","email":"112c7ccfc97ccea3affb9969e9288fc53e254cbf@sysgo.com"},"message":"tdesc: bitfields may carry a type\n\na bitfield may carry a type (bool or int), add support for that.\n\nChange-Id: Ic831a9b8eac8579e8fdd7d0f01b7f1c9259e6739\nSigned-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>\nReviewed-on: http://openocd.zylin.com/4459\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/0808c6e8a3bd82316988d3d86bd6b212eefff6a2"},{"sha":"1756f393e45c2a23dd29ff8bc85d188b547624f9","author":{"name":"Matthias Welwarsky","email":"112c7ccfc97ccea3affb9969e9288fc53e254cbf@sysgo.com"},"message":"aarch64: add cpsr bitfields to target description\n\nprovide meta information for the cpsr so gdb can display the status\nflags and not only a hexadecimal number\n\nChange-Id: I9d3fb29153780adbea389d7e4175d5e19bddc256\nSigned-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>\nReviewed-on: http://openocd.zylin.com/4460\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/1756f393e45c2a23dd29ff8bc85d188b547624f9"},{"sha":"f444c57bf2d692171b7b50a6ce477265f951f77e","author":{"name":"Matthias Welwarsky","email":"112c7ccfc97ccea3affb9969e9288fc53e254cbf@sysgo.com"},"message":"arm_cti: add cti command group\n\nExtend the CTI abstraction to be accessible from TCL and\nchange the 'target' command to accept a cti 'object' instead of a\nbase address. This also allows accessing CTI instances that are not\nrelated to a configured target.\n\nChange-Id: Iac9ed0edca6f1be00fe93783a35c26077f6bc80a\nSigned-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>\nReviewed-on: http://openocd.zylin.com/4031\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/f444c57bf2d692171b7b50a6ce477265f951f77e"},{"sha":"72740904568414bb4a9192fe89034bae3b1a9e45","author":{"name":"Matthias Welwarsky","email":"112c7ccfc97ccea3affb9969e9288fc53e254cbf@sysgo.com"},"message":"tcl/board: add configuration for the avnet ultrazed-eg starter kit\n\nalso contains target configuration for the Xilinx UltraScale+\nplatform\n\nChange-Id: I6300cbc85c1ed71df71d8aaca59500bbf18f0093\nSigned-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>\nReviewed-on: http://openocd.zylin.com/4467\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/72740904568414bb4a9192fe89034bae3b1a9e45"},{"sha":"2231da8ec4e7d7ae9b652f3dd1a7104f5a110f3f","author":{"name":"Matthias Welwarsky","email":"112c7ccfc97ccea3affb9969e9288fc53e254cbf@sysgo.com"},"message":"target: restructure dap support\n\n- add 'dap create' command to create dap instances\n- move all dap subcmmand into the dap instance commands\n- keep 'dap info' for convenience\n- change all armv7 and armv8 targets to take a dap\n  instance instead of a jtag chain position\n- restructure tap/dap/target relations, jtag tap no\n  longer references the dap, daps are now independently\n  created and initialized.\n- clean up swd connect\n- re-initialize DAP also on JTAG errors (e.g. after reset,\n  power cycle)\n- update documentation\n- update target files\n\nChange-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9\nSigned-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>\nReviewed-on: http://openocd.zylin.com/4468\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/2231da8ec4e7d7ae9b652f3dd1a7104f5a110f3f"},{"sha":"7944ebb6945d01e2f603f80c5c70f349c8338950","author":{"name":"Robert Jordens","email":"79083dbdd6b1735fcb0b02b852e052ad03f40656@gmail.com"},"message":"xilinx-xcu: add Xilinx Ultrascale tap data\n\nThe Ultrascale series is a bit more complicated to handle since with the\nstacked and interconnected dies the IR gets longer. This adds support\nfor all currently known chips from the Ultrascale family.\n\nChange-Id: Ibac325dd6fadc76f73cc682b1c62c1a5f39f0786\nSigned-off-by: Robert Jordens <jordens@gmail.com>\nReviewed-on: http://openocd.zylin.com/4188\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/7944ebb6945d01e2f603f80c5c70f349c8338950"},{"sha":"ca3228dda610227fa7aee9efc33d2971841eb4c2","author":{"name":"Robert Jordens","email":"79083dbdd6b1735fcb0b02b852e052ad03f40656@gmail.com"},"message":"kcu105: add support for Xilinx KCU105\n\n* Development board with Kintex Ultrascale XCKU040\n* Dual SPI 256 MBit flash, supported through xilinx_bscan_spi\n\nChange-Id: I478ec7481beedd270bfba8af56a93301b0ee3028\nSigned-off-by: Robert Jordens <jordens@gmail.com>\nReviewed-on: http://openocd.zylin.com/4189\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/ca3228dda610227fa7aee9efc33d2971841eb4c2"},{"sha":"33f70625d7a9f6392fa7d549d696e5955543fa69","author":{"name":"Robert Jordens","email":"79083dbdd6b1735fcb0b02b852e052ad03f40656@gmail.com"},"message":"sayma_amc: add Sayma AMC board definition\n\nChange-Id: I4a3dc5fe2d81b6906099af8cc1a360b3cf4a6b80\nSigned-off-by: Robert Jordens <jordens@gmail.com>\nReviewed-on: http://openocd.zylin.com/4237\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/33f70625d7a9f6392fa7d549d696e5955543fa69"},{"sha":"38607b2e560fc4d9a24e594fc0bdd66d574faea9","author":{"name":"Robert Jordens","email":"79083dbdd6b1735fcb0b02b852e052ad03f40656@gmail.com"},"message":"tcl/board: add support for Kasli\n\nKasli is an open hardware FPGA board. It is part of the Sinara family of\ndevices designed to control quantum physics experiments (see Sayma_AMC\nfor other boards already suppported by openocd).\n\nKasli was developed as part of the opticlock project. It features a\nXilinx Artix 7 100T FPGA, DDR3 RAM, a clock reconstruction and\ndistribution network, four 6 Gb/s transceiver links (three SFP and\none SATA) as well as interfaces to up to 12 Eurocard Extension Modules\n(EEMs).\n\nhttps://github.com/m-labs/sinara/wiki/Kasli\nhttp://www.opticlock.de/en/\n\nChange-Id: I88b5e9f16b79e1e731056c45da6b5e1448d2c0e7\nSigned-off-by: Robert Jordens <jordens@gmail.com>\nReviewed-on: http://openocd.zylin.com/4341\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/38607b2e560fc4d9a24e594fc0bdd66d574faea9"},{"sha":"f035b0851bbc6a9ccc2b20128ae2e4d3abd9ba38","author":{"name":"Tomas Vanek","email":"e772e1dd119345de18abde151a199ef43b7be504@fbl.cz"},"message":"flash/nor: implement flash bank deallocation on OpenOCD exit\n\nChange-Id: I8fcf09b2a85b3b68743f5fd68a31edea933b9b17\nSigned-off-by: Tomas Vanek <vanekt@fbl.cz>\nReviewed-on: http://openocd.zylin.com/4414\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/f035b0851bbc6a9ccc2b20128ae2e4d3abd9ba38"},{"sha":"37deb37593c20c05a4bb29e1d88671a1f7ec6548","author":{"name":"Tomas Vanek","email":"e772e1dd119345de18abde151a199ef43b7be504@fbl.cz"},"message":"target: fix display halt message logic\n\nIf a target is run from gdb and then stopped from OpenOCD telnet interface,\nhalt does not show message with status and PC registers.\n\nWhile on it rename 'display' to 'verbose_halt_msg' and use bool type\ninstead of int.\n\nChange-Id: Ibe6589015b302e0be97258b06938c297745436a5\nSigned-off-by: Tomas Vanek <vanekt@fbl.cz>\nReviewed-on: http://openocd.zylin.com/4475\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/37deb37593c20c05a4bb29e1d88671a1f7ec6548"},{"sha":"6eba3777fca4a3e8c0d91dce9caedfeb9c08dc67","author":{"name":"Tomas Vanek","email":"e772e1dd119345de18abde151a199ef43b7be504@fbl.cz"},"message":"jtag/core, target: unregister JTAG events\n\nAlso call adapter_exit() before command_exit() as the latter releases\nJim interpreter so JTAG events should be released before.\n\nFixes memory leak reported by valgrind\n\nChange-Id: I493f3fcba34ea2b4234148e79a4e329c866e0f05\nSigned-off-by: Tomas Vanek <vanekt@fbl.cz>\nReviewed-on: http://openocd.zylin.com/4474\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/6eba3777fca4a3e8c0d91dce9caedfeb9c08dc67"},{"sha":"27473588a40604822dcbee1c1950d27fdf248fe9","author":{"name":"Robert Jordens","email":"79083dbdd6b1735fcb0b02b852e052ad03f40656@gmail.com"},"message":"tcl/fpga/xilinx-xadc.cfg: add support for XADC\n\nThe 7 Series FPGAs contain an on-chip 12 bit ADC that can probe die\ntemperature, internal power supply rail voltages as well as external\nvoltages. The XADC is available both from fabric as well as through the\nJTAG TAP.\n\nThis code implements access throught the JTAG TAP.\n\nhttps://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf\n\nChange-Id: I6cef4d0244add71749fa28b58a736302151cc4dd\nSigned-off-by: Robert Jordens <jordens@gmail.com>\nReviewed-on: http://openocd.zylin.com/4395\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/27473588a40604822dcbee1c1950d27fdf248fe9"},{"sha":"3d3b45af465f6dcfc85ea69cc10a719bc3b2851c","author":{"name":"Robert Jordens","email":"79083dbdd6b1735fcb0b02b852e052ad03f40656@gmail.com"},"message":"xilinx-dna.cfg: generic tools for reading Xilinx Device DNA\n\nMost Xilinx FPGA devices contain an embedded, unique device identifier.\nThe identifier is nonvolatile, permanently programmed into the FPGA, and is\nunchangeable providing a great serial / tracking number.\n\nThis commit adds generic support for reading the Xilinx Spartan 6 and 7\nSeries (Kintex, Artix, Ultrascale) Device DNA. The code is similar to\nthe function in fpga/xilinx-xc6s.cfg for Spartan 6 but the register\naddresses are different and the logic has been simplified.\n\nThe code was not placed in xilinx-xc7.cfg. The approach of defining taps\nin the same file as library code to use them is fundamentally broken on\nboards that have more than one FPGA or other chips. This commit (like\nthe addition of support for Xilinx XADC) starts to remedy that by\nsplitting library code from board-specific fixed definitions.\n\nThe support code is sourced in the Kasli and KC705 board support files\nas it was tested on these boards.\n\nChange-Id: Iba559c7c1b7e93e1270535fd9e6650007f3794da\nSigned-off-by: Robert Jordens <jordens@gmail.com>\nReviewed-on: http://openocd.zylin.com/4396\nTested-by: jenkins\nReviewed-by: Matthias Welwarsky <matthias@welwarsky.de>","distinct":true,"url":"https://api.github.com/repos/jakllsch/openocd-ht32/commits/3d3b45af465f6dcfc85ea69cc10a719bc3b2851c"}]}
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