{"push_id":2819799190,"size":3,"distinct_size":3,"ref":"refs/heads/lineage-15.1","head":"6af009a31f7eb72bbf1285086cd5b603a9136f72","before":"f213f2b55d452dc3d5261b829156eee411484d21","commits":[{"sha":"4cdedeefa38f45299b18ae692426d5baaff6b785","author":{"name":"Sean Christopherson","email":"c0cf6ffb699e0a4c98b3fa7c5dd03fa419b94ed2@intel.com"},"message":"x86/speculation/l1tf: Exempt zeroed PTEs from inversion\n\ncommit f19f5c49bbc3ffcc9126cc245fc1b24cc29f4a37 upstream.\n\nIt turns out that we should *not* invert all not-present mappings,\nbecause the all zeroes case is obviously special.\n\nclear_page() does not undergo the XOR logic to invert the address bits,\ni.e. PTE, PMD and PUD entries that have not been individually written\nwill have val=0 and so will trigger __pte_needs_invert(). As a result,\n{pte,pmd,pud}_pfn() will return the wrong PFN value, i.e. all ones\n(adjusted by the max PFN mask) instead of zero. A zeroed entry is ok\nbecause the page at physical address 0 is reserved early in boot\nspecifically to mitigate L1TF, so explicitly exempt them from the\ninversion when reading the PFN.\n\nManifested as an unexpected mprotect(..., PROT_NONE) failure when called\non a VMA that has VM_PFNMAP and was mmap'd to as something other than\nPROT_NONE but never used. mprotect() sends the PROT_NONE request down\nprot_none_walk(), which walks the PTEs to check the PFNs.\nprot_none_pte_entry() gets the bogus PFN from pte_pfn() and returns\n-EACCES because it thinks mprotect() is trying to adjust a high MMIO\naddress.\n\n[ This is a very modified version of Sean's original patch, but all\n  credit goes to Sean for doing this and also pointing out that\n  sometimes the __pte_needs_invert() function only gets the protection\n  bits, not the full eventual pte.  But zero remains special even in\n  just protection bits, so that's ok.   - Linus ]\n\nFixes: f22cc87f6c1f (\"x86/speculation/l1tf: Invert all not present mappings\")\nSigned-off-by: Sean Christopherson <sean.j.christopherson@intel.com>\nAcked-by: Andi Kleen <ak@linux.intel.com>\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Josh Poimboeuf <jpoimboe@redhat.com>\nCc: Michal Hocko <mhocko@suse.com>\nCc: Vlastimil Babka <vbabka@suse.cz>\nCc: Dave Hansen <dave.hansen@intel.com>\nCc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>\nSigned-off-by: Linus Torvalds <torvalds@linux-foundation.org>\nSigned-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>","distinct":true,"url":"https://api.github.com/repos/sujitroy/kernel_asus_sdm660/commits/4cdedeefa38f45299b18ae692426d5baaff6b785"},{"sha":"7dc18ebc3101229d5238a2dc740804cd4836b383","author":{"name":"Greg Kroah-Hartman","email":"4645f7897fd33786a2ee1264d590b3c400559d85@linuxfoundation.org"},"message":"Linux 4.4.150","distinct":true,"url":"https://api.github.com/repos/sujitroy/kernel_asus_sdm660/commits/7dc18ebc3101229d5238a2dc740804cd4836b383"},{"sha":"6af009a31f7eb72bbf1285086cd5b603a9136f72","author":{"name":"Sujit Roy","email":"81ecbcafa6c2a36bed977ada2733d649ceab7708@gmail.com"},"message":"Merge tag 'v4.4.150' of git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux into lineage-15.1\n\nThis is the 4.4.150 stable release","distinct":true,"url":"https://api.github.com/repos/sujitroy/kernel_asus_sdm660/commits/6af009a31f7eb72bbf1285086cd5b603a9136f72"}]}
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