{"push_id":2975813292,"size":153,"distinct_size":132,"ref":"refs/heads/master","head":"5be9a90b1a468bf9cc2e67c42cf64ae467672901","before":"b8237230aadd68743bc993d4af6e66541af4b6d5","commits":[{"sha":"11c31aef047776d0ffca2a3838f511bd0196a81c","author":{"name":"Tongzhou Wang","email":"96b5c3d5a7a36c8be47478427b2e4d4231204fe0@gmail.com"},"message":"Prevent hanging in data loader altogether\n\nSummary: Pull Request resolved: https://github.com/pytorch/pytorch/pull/11985\n\nDifferential Revision: D10202374\n\nPulled By: SsnL\n\nfbshipit-source-id: 1ab1a07185f78a104f9b05930a87ef5a32f431e4","distinct":false,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/11c31aef047776d0ffca2a3838f511bd0196a81c"},{"sha":"f564163951b15a14f777f01f0caf1b8ce64d3f00","author":{"name":"Christian Puhrsch","email":"b7a905850ca55c064cd1088c2e252f92e10708de@fb.com"},"message":"Remove SSE-only code and convolve5x5 (#12109)\n\nSummary:\nPerformance oriented code will use AVX/AVX2, so we don't need SSE specific code anymore. This will also reduce the probability of running into an error on legacy CPUs.\n\nOn top of this convolve is covered by modern libraries such as MKLDNN, which are much more performant and which we now build against by default (even for builds from source).\nPull Request resolved: https://github.com/pytorch/pytorch/pull/12109\n\nDifferential Revision: D10055134\n\nPulled By: colesbury\n\nfbshipit-source-id: 789b8a34d5936d9c144bcde410c30f7eb1c776fa","distinct":false,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/f564163951b15a14f777f01f0caf1b8ce64d3f00"},{"sha":"1c69d368e1bc810c49939ac9fb4eb1f5e20bca3f","author":{"name":"Jerry Zhang","email":"210765c83ad755402ff54425bf352bae661dc900@fb.com"},"message":"Remove New with Allocator Registry (#12111)\n\nSummary:\nPull Request resolved: https://github.com/pytorch/pytorch/pull/12111\n\nSetup allocator registry keyed by at::DeviceType, and remove New from StaticContext.\n\nReviewed By: ezyang\n\nDifferential Revision: D10022853\n\nfbshipit-source-id: 3e88a181fe5df24f33f49b88be1f75284a185588","distinct":false,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/1c69d368e1bc810c49939ac9fb4eb1f5e20bca3f"},{"sha":"a3fb004b1829880547dd7b3e2cd9d16af657b869","author":{"name":"Jie","email":"790b0772174feb3bdf8f664f1308cc5b507a807f@nvidia.com"},"message":"(#12474)\n\nSummary:\nModifies the DistributedSampler logic. Now each process samples elements with\na given interval, instead of a consecutive section.\n\n  This eliminates the possibility where the DataLoader uses padded data while\ndropping the real data. It happens when:\n  1. DistributedSampler padded data; and\n  2. DataLoader drops_last is effectively true, and drops less then the number\nof padded data.\n  from the example down, we see that data (10, 11, 12) are padded through\nduplicating data sample (1, 2, 3)\n  The old sampler drops legit original data (3, 6, 9) and introduces duplication\n(10, 11) into the training set; while the new sampler logic samples correct data\npoints from the data set.\n  This example has been added to dataloader unit test\n\nexample:\n```\n  data after shuffle: 1, 2, 3, 4, 5, 6, 7, 8, 9\n  padded data : 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12\n\n  old sampler:       ->  DataLoader with (batch_size=2 and drop_last=True)\n   p 1: 1, 2, 3          1, 2\n   p 2: 4, 5, 6          4, 5\n   p 3: 7, 8, 9          7, 8\n   p 4:10,11,12         10,11\n\n  new sampler:       ->\n   p 1: 1, 5, 9          1, 5\n   p 2: 2, 6,10          2, 6\n   p 3: 3, 7,11          3, 7\n   p 4: 4, 8,12          4, 8\n```\nPull Request resolved: https://github.com/pytorch/pytorch/pull/12474\n\nDifferential Revision: D10260410\n\nPulled By: SsnL\n\nfbshipit-source-id: 710856571260f42ce25955b81a5b8008e04938cf","distinct":false,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/a3fb004b1829880547dd7b3e2cd9d16af657b869"},{"sha":"ea79f7c032112571f0181d2c3199604aafb7b54d","author":{"name":"Thomas Viehmann","email":"36ac19d4ad6fe01b06633a4b23ed512831899735@beamnet.de"},"message":"Add derivative to pow with scalar base (#12450)\n\nSummary:\nFixes: #12426\n\nThank you, DriesSmit, for the report!\nPull Request resolved: https://github.com/pytorch/pytorch/pull/12450\n\nDifferential Revision: D10238556\n\nPulled By: soumith\n\nfbshipit-source-id: 8bf71467c6734ecc5ff30f15500304d731f7e155","distinct":false,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/ea79f7c032112571f0181d2c3199604aafb7b54d"},{"sha":"c96afa3322dc9528c13aa7db0cee3e37c68af7c4","author":{"name":"iotamudelta","email":"983328b4d8548eec6654ae4a0bae98b677b3cb2d@ogolem.org"},"message":"topk and sort fixes (#12337)\n\nSummary:\n* Topk part 1: fix intrinsincs for 64 wave front (#224)\n64 in a wave front - intrinsics change.\n* Disable in-place sorting on ROCm. (#237)\nIt is known to hang - use the Thrust fallback\nSkip one test - fails with the fallback.\n* Topk fixes (#239)\n* Spec (https://docs.nvidia.com/cuda/pdf/ptx_isa_6.3.pdf) Sec 9.7.1.19 (bfe) and 9.7.1.20 (bfi) requires pos and len to be limited to 0...255\n* Spec (https://docs.nvidia.com/cuda/pdf/ptx_isa_6.3.pdf) Sec 9.7.1.19 requires extracted bits to be in LSBs\n* Correct logic for getLaneMaskLe. Previous logic would return 0x0 instead of 0xffffffffffffffff for lane 63\n* Round up blockDim.x to prevent negative index for smem\n\nbddppq ezyang\n\nNote the one additional skipped test resulting from using the thrust sort fallback for all sizes. We are working on getting bitonic to work properly (and always). Until then, this needs to be skipped on ROCm.\nPull Request resolved: https://github.com/pytorch/pytorch/pull/12337\n\nDifferential Revision: D10259481\n\nPulled By: ezyang\n\nfbshipit-source-id: 5c8dc6596d7a3103ba7b4b550cba895f38c8148e","distinct":false,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/c96afa3322dc9528c13aa7db0cee3e37c68af7c4"},{"sha":"4cf86f240eaf854b9bf32ce8f64dffd2df3494fc","author":{"name":"Johannes M Dieterich","email":"7a2ae9e0afea6e82c492e6adf7f4c1d521af7394@amd.com"},"message":"Merge remote-tracking branch 'rocm_upstream/upstream' into ifu","distinct":true,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/4cf86f240eaf854b9bf32ce8f64dffd2df3494fc"},{"sha":"b572e275021357e8831311e302861294c2a2fd03","author":{"name":"iotamudelta","email":"983328b4d8548eec6654ae4a0bae98b677b3cb2d@ogolem.org"},"message":"Fix types and warp sizes for ROCm (ROCm 256) (#12485)\n\nSummary:\n* Correct the warp size for current AMD GPUs\n* Fix copy paste error in configure\n* Correct the wrong typing explicitly\n\nbddppq ezyang\nPull Request resolved: https://github.com/pytorch/pytorch/pull/12485\n\nDifferential Revision: D10262490\n\nPulled By: ezyang\n\nfbshipit-source-id: 93467944247ed764d9ac9f7bb212a94fc250608e","distinct":false,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/b572e275021357e8831311e302861294c2a2fd03"},{"sha":"2b22c60980aa148a211f2f4c2ab6723e92cbe318","author":{"name":"Will Feng","email":"1afd6515b09d0b3eb7e8e4008edd2316b575fbe3@fb.com"},"message":"Fix GPU perf tests on CircleCI (#12491)\n\nSummary:\n`COMMIT_SOURCE` is missing in the current CircleCI config, which is used in perf tests to decide whether to store the new numbers as baseline.\nPull Request resolved: https://github.com/pytorch/pytorch/pull/12491\n\nDifferential Revision: D10274426\n\nPulled By: yf225\n\nfbshipit-source-id: 047ef6cc61a12738062f9940d1bfd4c3bf152909","distinct":false,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/2b22c60980aa148a211f2f4c2ab6723e92cbe318"},{"sha":"8468b7d3f0937cd3bdd8dc11938267527810374c","author":{"name":"Peter Goldsborough","email":"887f44f8e6d2ec27368b0275bb31f402fb8ca659@fb.com"},"message":"Fix tensor doc (#12469)\n\nSummary:\nThe C++ docs for `at::Tensor` are currently broken because we moved the place `Tensor.h` gets generated to without updating our docs. I use `GEN_TO_SOURCE=1` when generating ATen files, so the `Tensor.h` file should end up in `aten/src/ATen/core/Tensor.h` if i understand correctly.\n\ndzhulgakov ezyang gchanan\nPull Request resolved: https://github.com/pytorch/pytorch/pull/12469\n\nDifferential Revision: D10248521\n\nPulled By: goldsborough\n\nfbshipit-source-id: 8d8a11f0f6e2703b8d767dbc523fc34a4374f345","distinct":false,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/8468b7d3f0937cd3bdd8dc11938267527810374c"},{"sha":"dcd9d73d479d93ef62f782af95d2e5bd60c2475b","author":{"name":"vishwakftw","email":"7d9dbaf6fdbe0bc4465fbe69a9c17ceb70dc8fb9@iith.ac.in"},"message":"Expunge torch.utils.trainer.* (#12487)\n\nDifferential Revision: D10273602\n\nPulled By: SsnL\n\nfbshipit-source-id: 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Cherniavskii","email":"5704210cc64fe7da6bbbfb00a46e3b2985c634cb@fb.com"},"message":"finishRun fix (#10970)\n\nSummary:\nPull Request resolved: https://github.com/pytorch/pytorch/pull/10970\n\nFixing a possible case when next iteration of a net may be started prematurely.\nWe have to ensure that resetting running_ flag is done *after* finalizeEvents\n(e.g. waiting for the rest of net's event to be finished).\n\nReviewed By: heslami\n\nDifferential Revision: D9545442\n\nfbshipit-source-id: bc324a180b1e93054b051981817be7985f52b4cb","distinct":false,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/16b8075acd187622958b197ec1eadccec60e679f"},{"sha":"283f21d5186a902a985dcabab6ef1b785d26f667","author":{"name":"Xiaodong Wang","email":"445a768efe89fba66fc76dd91615fa7a2599a5f3@fb.com"},"message":"Caffe 2 adoption (#12116)\n\nSummary:\nPull Request resolved: https://github.com/pytorch/pytorch/pull/12116\n\nAdapt Caffe 2 to platform007 (gcc 8):\n* gcc 8 + nvcc template symbol lookup (D9319742):\ncontext_.template CopySameDevice<T> ==> this->context_.template CopySameDevice<T>\n* New gcc 8 warning (error):\n  * -Werror=sizeof-pointer-div\n  * Unnecessary parenthesis\n\nReviewed By: bddppq\n\nDifferential Revision: D10045844\n\nfbshipit-source-id: 95f509fefc9593cbb82b1687793fef8930260d2f","distinct":false,"url":"https://api.github.com/repos/jithunnair-amd/pytorch/commits/283f21d5186a902a985dcabab6ef1b785d26f667"},{"sha":"3829f86c7a71a4a8838233387602e0a3eb91b7f9","author":{"name":"Marat Dukhan","email":"2089d3fab0c51db3809c7a5f7dbc68b8f0e36ef4@fb.com"},"message":"Update NNPACK-related submodules (#12505)\n\nSummary:\nUpdate submodules below:\n- NNPACK\n- FP16\n- pthreadpool\n- cpuinfo\n- psimd\nPull Request resolved: https://github.com/pytorch/pytorch/pull/12505\n\nReviewed By: hyuen\n\nDifferential Revision: D10286690\n\nPulled By: Maratyszcza\n\nfbshipit-source-id: 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