{"push_id":3022313869,"size":1000,"distinct_size":12847,"ref":"refs/heads/master","head":"8adcc59974b8a65b7eac7d503364837c297139bc","before":"64c5e530ac2cab7e710c3bd08ef8594a016e4f9a","commits":[{"sha":"9b96566063c5511982c33df747e239e77cb75f78","author":{"name":"Rob Herring","email":"fbb37eacae100e13076d5c4b46f06cfa4d6fa9f8@kernel.org"},"message":"thermal: Convert to using %pOFn instead of device_node.name\n\nIn preparation to remove the node name pointer from struct device_node,\nconvert printf users to use the %pOFn format specifier.\n\nCc: Zhang Rui <rui.zhang@intel.com>\nCc: Eduardo Valentin <edubezval@gmail.com>\nCc: Daniel Lezcano <daniel.lezcano@linaro.org>\nCc: linux-pm@vger.kernel.org\nSigned-off-by: Rob Herring <robh@kernel.org>\nAcked-by: Daniel Lezcano <daniel.lezcano@linaro.org>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/9b96566063c5511982c33df747e239e77cb75f78"},{"sha":"6017e2a9d727809bfae9a4decfe8d00e2a0f0242","author":{"name":"Anson Huang","email":"4d6e5019b57e6819e5be9063452c1647eb43e037@nxp.com"},"message":"thermal: qoriq: add i.mx8mq support\n\nAdd i.mx8mq specific compatible string.\n\nSigned-off-by: Anson Huang <Anson.Huang@nxp.com>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/6017e2a9d727809bfae9a4decfe8d00e2a0f0242"},{"sha":"bd7557f55a4514bf277dcc80ed66985eadab5719","author":{"name":"Amit Kucheria","email":"f352f8f7e4567da77f569289775ad284524dea88@linaro.org"},"message":"thermal: tsens: Prepare 8916 and 8974 tsens to use SROT and TM address space\n\nWe've already converted over the devicetree of platforms using v2\nversion of the TSENS IP to use two address spaces. Now prepare to\nconvert over the 8916 and 8974 platforms to use separate SROT and TM\naddress spaces.\n\nThis patch will work with device trees with one or two address spaces\nbecause we set the tm_offset in commit 5b1283984fa3 (\"thermal: tsens:\nAdd support to split up register address space into two\").\n\nSigned-off-by: Amit Kucheria <amit.kucheria@linaro.org>\nReviewed-by: Matthias Kaehlcke <mka@chromium.org>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/bd7557f55a4514bf277dcc80ed66985eadab5719"},{"sha":"2d71d8ded5f48b23ae46fec44811fe33da639fc9","author":{"name":"Amit Kucheria","email":"f352f8f7e4567da77f569289775ad284524dea88@linaro.org"},"message":"thermal: tsens: Add SPDX license identifiers\n\nThe TSENS drivers use a GPL-2.0 license. Replace with equivalent SPDX\ntags and delete the full license text.\n\nSigned-off-by: Amit Kucheria <amit.kucheria@linaro.org>\nReviewed-by: Matthias Kaehlcke <mka@chromium.org>\nReviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/2d71d8ded5f48b23ae46fec44811fe33da639fc9"},{"sha":"caac52bce61116c4d645d80e38ed07e47a81a2e9","author":{"name":"Amit Kucheria","email":"f352f8f7e4567da77f569289775ad284524dea88@linaro.org"},"message":"thermal: tsens: Get rid of dead code\n\nhw_id is dynamically allocated but not used anywhere. Get rid of dead\ncode.\n\nSigned-off-by: Amit Kucheria <amit.kucheria@linaro.org>\nReviewed-by: Matthias Kaehlcke <mka@chromium.org>\nReviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/caac52bce61116c4d645d80e38ed07e47a81a2e9"},{"sha":"67b0f5e064cd7fb3ac79c49dcbf7720fa5dc4acd","author":{"name":"Amit Kucheria","email":"f352f8f7e4567da77f569289775ad284524dea88@linaro.org"},"message":"thermal: tsens: Rename map field in order to add a second address map\n\nThe TSENS driver currently only uses a limited set of registers from the TM\naddress space. So it was ok to map just that set of registers and call it\n\"map\".\n\nWe'd now like to map a second set: SROT registers to introduce new\nfunctionality. Rename the \"map\" field to a more appropriate \"tm_map\".\n\nThe 8960 doesn't have a clear split between TM and SROT registers. To avoid\ncomplicating the data structure, it will switchover to using tm_map for its\nmaps.\n\nThere is no functional change with this patch.\n\nSigned-off-by: Amit Kucheria <amit.kucheria@linaro.org>\nReviewed-by: Matthias Kaehlcke <mka@chromium.org>\nReviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/67b0f5e064cd7fb3ac79c49dcbf7720fa5dc4acd"},{"sha":"a15525b5d9ac37fec559d140b2e24c4ce4defa54","author":{"name":"Amit Kucheria","email":"f352f8f7e4567da77f569289775ad284524dea88@linaro.org"},"message":"thermal: tsens: Add the SROT address map\n\nOn platforms whose device trees specify two address spaces for TSENS, the\nsecond one points to the SROT registers. Initialise the SROT map on those\nplatforms.\n\nSigned-off-by: Amit Kucheria <amit.kucheria@linaro.org>\nReviewed-by: Matthias Kaehlcke <mka@chromium.org>\nReviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/a15525b5d9ac37fec559d140b2e24c4ce4defa54"},{"sha":"c130a7602e3bc2c6fd896c1d56478fca47a38c02","author":{"name":"Amit Kucheria","email":"f352f8f7e4567da77f569289775ad284524dea88@linaro.org"},"message":"thermal: tsens: Pass register offsets as private data\n\nRegisters have moved around across TSENS generations. For example, the\nCTRL register was at offset 0x0 in the SROT region on msm8916 but is at\noffset 0x4 in newer v2 based TSENS HW blocks.\n\nAllow passing offsets of important registers so that we can continue to\nuse common functions.\n\nSigned-off-by: Amit Kucheria <amit.kucheria@linaro.org>\nReviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/c130a7602e3bc2c6fd896c1d56478fca47a38c02"},{"sha":"c8c3b091b65c55ed950cb1601b21eea59c3117c0","author":{"name":"Amit Kucheria","email":"f352f8f7e4567da77f569289775ad284524dea88@linaro.org"},"message":"thermal: tsens: Check if the IP is correctly enabled by firmware\n\nThe SROT registers are initialised by the secure firmware at boot. We\ndon't have write access to the registers. Check if the block is enabled\nbefore continuing.\n\nSigned-off-by: Amit Kucheria <amit.kucheria@linaro.org>\nReviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/c8c3b091b65c55ed950cb1601b21eea59c3117c0"},{"sha":"36d83c6662450e13a2fa5792b34afff6f8bdba50","author":{"name":"Amit Kucheria","email":"f352f8f7e4567da77f569289775ad284524dea88@linaro.org"},"message":"dt-bindings: thermal: Fix a typo in documentation\n\nc(1) + x(1) was actually meant to be c(1) * x(1).\n\nSigned-off-by: Amit Kucheria <amit.kucheria@linaro.org>\nReviewed-by: Matthias Kaehlcke <mka@chromium.org>\nAcked-by: Rob Herring <robh@kernel.org>\nReviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/36d83c6662450e13a2fa5792b34afff6f8bdba50"},{"sha":"337a4aecdaf8fa53b16fbf48a73d328fb44ffb75","author":{"name":"Anson Huang","email":"4d6e5019b57e6819e5be9063452c1647eb43e037@nxp.com"},"message":"thermal: imx: improve error message\n\nRemove the duplicated \"from\" to improve the error message.\n\nSigned-off-by: Anson Huang <Anson.Huang@nxp.com>\nReviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/337a4aecdaf8fa53b16fbf48a73d328fb44ffb75"},{"sha":"b6ad3981ff94b415d48399e949db0bdfbe360736","author":{"name":"Anson Huang","email":"4d6e5019b57e6819e5be9063452c1647eb43e037@nxp.com"},"message":"thermal: imx: handle error path in one place to save duplicated code\n\nDuring probe phase, the error path can be handled in one place and\nuse goto method to save many duplicated code.\n\nSigned-off-by: Anson Huang <Anson.Huang@nxp.com>\nReviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/b6ad3981ff94b415d48399e949db0bdfbe360736"},{"sha":"1760debb51f73ed3e089c8d4e847554901dee4bb","author":{"name":"Palmer Dabbelt","email":"f4b28e76227655e2f75926a7939b12f4960b40e7@sifive.com"},"message":"RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}\n\nThese are just hard coded in the RISC-V port, which doesn't make any\nsense.  We should probably be setting these from device tree entries\nwhen they exist, but for now I think it's saner to just leave them all\nas their default values.\n\nReviewed-by: Jeremy Linton <jeremy.linton@arm.com>\nSigned-off-by: Palmer Dabbelt <palmer@sifive.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/1760debb51f73ed3e089c8d4e847554901dee4bb"},{"sha":"86e581e310785782e2025a076dc9a3f5138e5bf3","author":{"name":"Palmer Dabbelt","email":"f4b28e76227655e2f75926a7939b12f4960b40e7@sifive.com"},"message":"RISC-V: Mask out the F extension on systems without D\n\nThe RISC-V Linux port doesn't support systems that have the F extension\nbut don't have the D extension -- we actually don't support systems\nwithout D either, but Alan's patch set is rectifying that soon.  For now\nI think we can leave this in a semi-broken state and just wait for\nAlan's patch set to get merged for proper non-FPU support -- the patch\nset is starting to look good, so doing something in-between doesn't seem\nlike it's worth the work.\n\nI don't think it's worth fretting about support for systems with F but\nnot D for now: our glibc ABIs are IMAC and IMAFDC so they probably won't\nend up being popular.  We can always extend this in the future.\n\nCC: Alan Kao <alankao@andestech.com>\nSigned-off-by: Palmer Dabbelt <palmer@sifive.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/86e581e310785782e2025a076dc9a3f5138e5bf3"},{"sha":"b8c8a9590e4fde82f8c3ee06a521763e6f21e9c8","author":{"name":"Jim Wilson","email":"fe9a0fb1a3713960ed8e536d397a90bc034f5164@sifive.com"},"message":"RISC-V: Add FP register ptrace support for gdb.\n\nAdd a variable and a macro to describe FP registers, assuming only D is\nsupported.  FP code is conditional on CONFIG_FPU.  The FP regs and FCSR\nare copied separately to avoid copying struct padding.  Tested by hand and\nwith the gdb testsuite.\n\nSigned-off-by: Jim Wilson <jimw@sifive.com>\nSigned-off-by: Palmer Dabbelt <palmer@sifive.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/b8c8a9590e4fde82f8c3ee06a521763e6f21e9c8"},{"sha":"b90edb33010bcfb9a0d74681be2cdd52300f1e69","author":{"name":"Jim Wilson","email":"fe9a0fb1a3713960ed8e536d397a90bc034f5164@sifive.com"},"message":"RISC-V: Add futex support.\n\nHere is an attempt to add the missing futex support.  I started with the MIPS\nversion of futex.h and modified it until I got it working.  I tested it on\na HiFive Unleashed running Fedora Core 29 using the fc29 4.15 version of the\nkernel.  This was tested against the glibc testsuite, where it fixes 14 nptl\nrelated testsuite failures.  That unfortunately only tests the cmpxchg support,\nso I also used the testcase at the end of\n\n    https://lwn.net/Articles/148830/\n\nwhich tests the atomic_op functionality, except that it doesn't verify that\nthe operations are atomic, which they obviously are.  This testcase runs\nsuccessfully with the patch and fails without it.\n\nI'm not a kernel expert, so there could be details I got wrong here.  I wasn't\nsure about the memory model support, so I used aqrl which seemed safest, and\ndidn't add fences which seemed unnecessary.  I'm not sure about the copyright\nstatements, I left in Ralf Baechle's line because I started with his code.\nCheckpatch reports some style problems, but it is the same style as the MIPS\nfutex.h, and the uses of ENOSYS appear correct even though it complains about\nthem.  I don't know if any of that matters.\n\nThis patch was tested on qemu with the glibc nptl/tst-cond-except\ntestcase, and the wake_op testcase from above.\n\nSigned-off-by: Jim Wilson <jimw@sifive.com>\nReviewed-by: Christoph Hellwig <hch@lst.de>\nSigned-off-by: Palmer Dabbelt <palmer@sifive.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/b90edb33010bcfb9a0d74681be2cdd52300f1e69"},{"sha":"f31b8de98853091e86a6391f9cd7948a2397287e","author":{"name":"Christoph Hellwig","email":"923f7720577207a44b32e59bbfbea59d27f1ae8e@lst.de"},"message":"RISC-V: remove the unused return_to_handler export\n\nThis export is not only not needed, but also breaks symbol versioning\ndue to being an undeclared assembly export.\n\nSigned-off-by: Christoph Hellwig <hch@lst.de>\nSigned-off-by: Palmer Dabbelt <palmer@sifive.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/f31b8de98853091e86a6391f9cd7948a2397287e"},{"sha":"ee5928843a93c7d246bbe17c5eed95918ed0ddb1","author":{"name":"Masahiro Yamada","email":"378b411a8a63ecc7605ec4272234862d7781c6ae@socionext.com"},"message":"riscv: move GCC version check for ARCH_SUPPORTS_INT128 to Kconfig\n\nThis becomes much neater in Kconfig.\n\nSigned-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>\nSigned-off-by: Palmer Dabbelt <palmer@sifive.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/ee5928843a93c7d246bbe17c5eed95918ed0ddb1"},{"sha":"aef53f97b505ff94190ce3a06dcd0ded6cf5c0ca","author":{"name":"Nick Kossifidis","email":"21ccb3caa9dd92ba18b45846fbc83df3d0e43c1a@ics.forth.gr"},"message":"RISC-V: Cosmetic menuconfig changes\n\n* Move the built-in cmdline configuration on a new menu entry \"Boot\n  options\", it doesn't make much sense to be part of the debuging menu.\n\n* Rename \"Kernel Type\" menu to \"Kernel features\" to be more consistent with\n  what other architectures are using, plus \"type\" is a bit misleading here.\n\nSigned-off-by: Nick Kossifidis <mick@ics.forth.gr>\nSigned-off-by: Palmer Dabbelt <palmer@sifive.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/aef53f97b505ff94190ce3a06dcd0ded6cf5c0ca"},{"sha":"d1d2c290b3c04b65fa6132eeebe50a070746d8f6","author":{"name":"Dan Carpenter","email":"ff341aa343d564f9e53e9dcb6996be8c04859a66@oracle.com"},"message":"thermal: armada: fix a test in probe()\n\nThe platform_get_resource() function doesn't return error pointers, it\nreturns NULL on error.\n\nFixes: 3d4e51844a4e (\"thermal: armada: convert driver to syscon register accesses\")\nSigned-off-by: Dan Carpenter <dan.carpenter@oracle.com>\nReviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>\nSigned-off-by: Eduardo Valentin <edubezval@gmail.com>","distinct":true,"url":"https://api.github.com/repos/atmel-maxtouch/maXTouch_linux/commits/d1d2c290b3c04b65fa6132eeebe50a070746d8f6"}]}
{"actor":{"display_login":"mgong98"}}