{"push_id":2524617768,"size":2,"distinct_size":2,"ref":"refs/heads/master","head":"cdb134eb19e23528ec9c9dd89805087ea3edb9b6","before":"8a14fc0828b54a1a6e5be37323ca4c660b8b7bed","commits":[{"sha":"55bcd7ad4549041ef3621e4a47dc06584f16df1e","author":{"name":"Uwe Hermann","email":"4c29b7920d701a3ce02ffa2c79046ead1af87b11@hermann-uwe.de"},"message":"dreamsourcelab-dslogic: Properly set initial voltage threshold.\n\nThe initial voltage threshold in dev_open() was being set to a\ndefault value in the devc->cur_threshold variable but not actually set\nin the device itself.\n\nPatch by Jörg Alpers <jalpers@gmx.net>, thanks a lot!","distinct":true,"url":"https://api.github.com/repos/sigrokproject/libsigrok/commits/55bcd7ad4549041ef3621e4a47dc06584f16df1e"},{"sha":"cdb134eb19e23528ec9c9dd89805087ea3edb9b6","author":{"name":"Gerhard Sittig","email":"679e71d0d2683b14717aae7a19e542fa4163f7ac@gmx.net"},"message":"input/trace32_ad: silence format errors during input format match\n\nWhen auto-detection tries to find the input module that can handle a\nfile, unexpected input format should be considered non-fatal. Only emit\nerror messages when process_header() got invoked from process_buffer()\nafter initialization. Emit debug messages in early stages where no input\nmodule context exists yet.","distinct":true,"url":"https://api.github.com/repos/sigrokproject/libsigrok/commits/cdb134eb19e23528ec9c9dd89805087ea3edb9b6"}]}
{"actor":{"display_login":"uwehermann"}}