{"push_id":2399430056,"size":2,"distinct_size":2,"ref":"refs/heads/DQM-101X","head":"5a16db481b4233cc8fd224c3a3171cab12bef459","before":"1744d81a1b8e61646131167fbca8220620d24d3d","commits":[{"sha":"795b747f4a81075d4d4d137be6d403670ca68049","author":{"name":"Dimitrios Tsitsonis","email":"18ec1fc40c2c2a257f685002b1b6f67c8760d372@cern.ch"},"message":"Unprescaled and Prescaled Lists Algorithm Trigger Bits for Timing Plots","distinct":true,"url":"https://api.github.com/repos/dtsitson/cmssw/commits/795b747f4a81075d4d4d137be6d403670ca68049"},{"sha":"5a16db481b4233cc8fd224c3a3171cab12bef459","author":{"name":"Dimitrios Tsitsonis","email":"18ec1fc40c2c2a257f685002b1b6f67c8760d372@cern.ch"},"message":"Merge branch 'DQM-101X' of https://github.com/dtsitson/cmssw into from-CMSSW_10_1_0_pre2\n\nI also fixed the second part of the algorithm trigger timing plots dividing two different histograms for unprescaled and prescaled trigger bits .","distinct":true,"url":"https://api.github.com/repos/dtsitson/cmssw/commits/5a16db481b4233cc8fd224c3a3171cab12bef459"}]}
{"actor":{"display_login":"dtsitson"}}