{"push_id":2312382533,"size":60,"distinct_size":7,"ref":"refs/heads/ld_img_v2","head":"7f14f233f9508783e1df46188e730fbecc25a840","before":"050792ef19ccc2decf8bd3928e26953668217091","commits":[{"sha":"aa9ee82dc1e0790886a0cee6e5c9681f0d324aac","author":{"name":"Derek Basehore","email":"1cffc84c5acba839bfd6351949f3b71a34dfd511@chromium.org"},"message":"rockchip/rk3399: Change PD_CTR_LOOP to 10000\n\nThis brings ATF into line with the kernel on the timeout for power\ndomains turning on. We could actually timeout (when we shouldn't) on\nresume when turning power domains on. The guaranteed maximum delay is\nnow 10ms.\n\nSigned-off-by: Derek Basehore <dbasehore@chromium.org>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/aa9ee82dc1e0790886a0cee6e5c9681f0d324aac"},{"sha":"3580a497b52429f92f20451c3b05cb6fad507bbd","author":{"name":"Derek Basehore","email":"1cffc84c5acba839bfd6351949f3b71a34dfd511@chromium.org"},"message":"GICv3: Fix Dist restore for when the GIC is reset\n\nIf the GIC loses power during suspend, which the restore code was\nwritten for, exit early in the post restore power sequence. This\nprevents an assert from tripping, and the power sequence isn't needed\nin this case anyways.\n\nSigned-off-by: Derek Basehore <dbasehore@chromium.org>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/3580a497b52429f92f20451c3b05cb6fad507bbd"},{"sha":"b2a0af1bff73c70eec09efa047e9ca20ce455077","author":{"name":"Derek Basehore","email":"1cffc84c5acba839bfd6351949f3b71a34dfd511@chromium.org"},"message":"rockchip/rk3399: Fix QOS save/restore\n\nThe code was accidentally restoring the QOS on suspend and saving the\nQOS on resume. This is the opposite of what we want.\n\nSigned-off-by: Derek Basehore <dbasehore@chromium.org>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/b2a0af1bff73c70eec09efa047e9ca20ce455077"},{"sha":"8c1e78af46d80c3e56b83647dd40d1207577c667","author":{"name":"Derek Basehore","email":"1cffc84c5acba839bfd6351949f3b71a34dfd511@chromium.org"},"message":"rockchip/rk3399: Add udelay to wait loops\n\nWe were looping for MAX_WAIT_COUNT in several places without any\ndelays, so this adds the delays to make those loops more predictable.\n\nSigned-off-by: Derek Basehore <dbasehore@chromium.org>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/8c1e78af46d80c3e56b83647dd40d1207577c667"},{"sha":"b38c6f6b2d7b27af74793f1053f5a3d0d67d307d","author":{"name":"Derek Basehore","email":"1cffc84c5acba839bfd6351949f3b71a34dfd511@chromium.org"},"message":"rockchip/rk3399: Save and restore GIC\n\nThis adds calls to the GICv3 save/restore functions for the GIC\ndistributor and redistributor.\n\nSigned-off-by: Derek Basehore <dbasehore@chromium.org>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/b38c6f6b2d7b27af74793f1053f5a3d0d67d307d"},{"sha":"3284ce15ba775432900684bca38983b7b34a33b8","author":{"name":"Derek Basehore","email":"1cffc84c5acba839bfd6351949f3b71a34dfd511@chromium.org"},"message":"rockchip: Disable rdist before pwr_dm_suspend is called\n\nThis disables the redistributor before either of the pwr_dm_suspend\nfunctions are called. This is because the rdist save code in the\nrk3399 rockchip_soc_sys_pwr_dm_suspend function requires that each\nredistributor be disabled before saving state.\n\nSigned-off-by: Derek Basehore <dbasehore@chromium.org>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/3284ce15ba775432900684bca38983b7b34a33b8"},{"sha":"383c80899960cf41bcdd63f200b9cf5c12005b06","author":{"name":"Dimitris Papastamos","email":"85a33b5dd3c6fb868048d5df72df51a994b4344b@arm.com"},"message":"Disable workaround for CVE-2017-5715 on unaffected platforms\n\nChange-Id: Ib67b841ab621ca1ace3280e44cf3e1d83052cb73\nSigned-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/383c80899960cf41bcdd63f200b9cf5c12005b06"},{"sha":"201ca5b6b49197a2c22b3bb0b519d63758fff0b7","author":{"name":"Dimitris Papastamos","email":"85a33b5dd3c6fb868048d5df72df51a994b4344b@arm.com"},"message":"runtime_exceptions: Save x4-x29 unconditionally\n\nIn preparation for SMCCC v1.1 support, save x4 to x29 unconditionally.\nPreviously we expected callers coming from AArch64 mode to preserve\nx8-x17.  This is no longer the case with SMCCC v1.1 as AArch64 callers\nonly need to save x0-x3.\n\nChange-Id: Ie62d620776533969ff4a02c635422f1b9208be9c\nSigned-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/201ca5b6b49197a2c22b3bb0b519d63758fff0b7"},{"sha":"3a1b0676c72989d75276da7f11e89d00933eccdd","author":{"name":"Dimitris Papastamos","email":"85a33b5dd3c6fb868048d5df72df51a994b4344b@arm.com"},"message":"Implement support for SMCCC v1.1\n\nSMCCC v1.1 comes with a relaxed calling convention for AArch64\ncallers.  The caller only needs to save x0-x3 before doing an SMC\ncall.\n\nThis patch adds support for SMCCC_VERSION and SMCCC_ARCH_FEATURES.\n\nRefer to \"Firmware Interfaces for mitigating CVE_2017_5715 System\nSoftware on Arm Systems\"[0] for more information.\n\n[0] https://developer.arm.com/-/media/developer/pdf/ARM%20DEN%200070A%20Firmware%20interfaces%20for%20mitigating%20CVE-2017-5715_V1.0.pdf\n\nChange-Id: If5b1c55c17d6c5c7cb9c2c3ed355d3a91cdad0a9\nSigned-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/3a1b0676c72989d75276da7f11e89d00933eccdd"},{"sha":"6eabbb07d7ee2aac3a8e8e734649c8eaa8385af6","author":{"name":"Dimitris Papastamos","email":"85a33b5dd3c6fb868048d5df72df51a994b4344b@arm.com"},"message":"Add support for SMCCC_VERSION in PSCI features\n\nOn some platforms it may be necessary to discover the SMCCC version\nvia a PSCI features call.\n\nChange-Id: I95281ac2263ca9aefda1809eb03464fbdb8ac24d\nSigned-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/6eabbb07d7ee2aac3a8e8e734649c8eaa8385af6"},{"sha":"d9bd656cf5a4d0c21597a956c3711d08626ecfd0","author":{"name":"Dimitris Papastamos","email":"85a33b5dd3c6fb868048d5df72df51a994b4344b@arm.com"},"message":"Optimize/cleanup BPIALL workaround\n\nIn the initial implementation of this workaround we used a dedicated\nworkaround context to save/restore state.  This patch reduces the\nfootprint as no additional context is needed.\n\nAdditionally, this patch reduces the memory loads and stores by 20%,\nreduces the instruction count and exploits static branch prediction to\noptimize the SMC path.\n\nChange-Id: Ia9f6bf06fbf8a9037cfe7f1f1fb32e8aec38ec7d\nSigned-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/d9bd656cf5a4d0c21597a956c3711d08626ecfd0"},{"sha":"1d6d47a82a9aafc17d084738f79dc0c8d40dff45","author":{"name":"Dimitris Papastamos","email":"85a33b5dd3c6fb868048d5df72df51a994b4344b@arm.com"},"message":"Optimize SMCCC_ARCH_WORKAROUND_1 on Cortex A57/A72/A73 and A75\n\nThis patch implements a fast path for this SMC call on affected PEs by\ndetecting and returning immediately after executing the workaround.\n\nNOTE: The MMU disable/enable workaround now assumes that the MMU was\nenabled on entry to EL3.  This is a valid assumption as the code turns\non the MMU after reset and leaves it on until the core powers off.\n\nChange-Id: I13c336d06a52297620a9760fb2461b4d606a30b3\nSigned-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/1d6d47a82a9aafc17d084738f79dc0c8d40dff45"},{"sha":"51d28937502445e73dc1db5d0863946435e9e630","author":{"name":"Antonio Nino Diaz","email":"27951c91e4e5b5318d623354400ec91d3580508b@arm.com"},"message":"Analyze coding style of patches individually\n\nWith the old system `checkpatch.pl` gets one sole input that consists of\nthe commit message and commit diff of each commit between BASE_COMMIT\nand HEAD. It also filters out changes in some files, which makes `git\nformat-patch` completely ignore that commit, even the commit message.\n\nWith the new system the commit message and commit diff are analyzed\nseparately. This means that, even if all the files modified by a commit\nare filtered out, the commit message will still be analyzed.\n\nAlso, all commits are analyzed individually. This way it's easier to\nknow which commit caused the problem, and there are no warnings about\nrepeated \"Signed-off-by\" lines.\n\nChange-Id: Ic676a0b76801bb2607141a8d73dc3a942dc01c0e\nSigned-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/51d28937502445e73dc1db5d0863946435e9e630"},{"sha":"de3c30073e2e781f4b579ee94fa8d00667042b97","author":{"name":"Caesar Wang","email":"ad26c0afdf9bdf5f54c09db097f9e17e73167ec1@rock-chips.com"},"message":"rockchip/rk3399: Fix memory corruptions or illegal memory access\n\nCoverity scan done for the coreboot project found the issue:\nCoverity (*** CID 1385418: Memory - illegal accesses (OVERRUN))\nCoverity (*** CID 1385419: Memory - corruptions  (OVERRUN))\n\nFix the Converity error issue with store_cru[] loop needs to be one\nelement bigger.\n\nFixes: ARM-software/tf-issues#544\n\nChange-Id: I420f0a660b24baaa5fc5e78fca242cf750c9bbc7\nSigned-off-by: Caesar Wang <wxt@rock-chips.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/de3c30073e2e781f4b579ee94fa8d00667042b97"},{"sha":"ce213b9622d229faded186bebc7fdaf947b516b6","author":{"name":"Joel Hutton","email":"2589991e2a9939009b40a6f94626d3d40f0fcdfa@arm.com"},"message":"AMU: Add assembler helper functions for aarch32\n\nChange-Id: Id6dfe885a63561b1d2649521bd020367b96ae1af\nSigned-off-by: Joel Hutton <joel.hutton@arm.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/ce213b9622d229faded186bebc7fdaf947b516b6"},{"sha":"c70da54631615da9981008e917621e65472b3042","author":{"name":"Joel Hutton","email":"2589991e2a9939009b40a6f94626d3d40f0fcdfa@arm.com"},"message":"AMU: Implement context save/restore for aarch32\n\nAdd amu_context_save() and amu_context_restore() functions for aarch32\n\nChange-Id: I4df83d447adeaa9d9f203e16dc5a919ffc04d87a\nSigned-off-by: Joel Hutton <joel.hutton@arm.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/c70da54631615da9981008e917621e65472b3042"},{"sha":"334e1ceb4812982543ce2f77a61087477915042c","author":{"name":"davidcunado-arm","email":"5bc5ae1325b1b29e8da0fc707478fe905c353138@arm.com"},"message":"Merge pull request #1236 from dbasehore/gic-save-restore\n\nRK3399 GIC save/restore","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/334e1ceb4812982543ce2f77a61087477915042c"},{"sha":"9bc94a6d76fb61be9e2d223520d7f03aa6482e2e","author":{"name":"davidcunado-arm","email":"5bc5ae1325b1b29e8da0fc707478fe905c353138@arm.com"},"message":"Merge pull request #1240 from dp-arm/dp/smccc\n\nImplement support for SMCCC v1.1 and optimize security mitigations for CVE-2017-5715 on AArch64","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/9bc94a6d76fb61be9e2d223520d7f03aa6482e2e"},{"sha":"802d2dd2ba913a0ea6bd70487d652b03346f9ed5","author":{"name":"Masahiro Yamada","email":"642490827508ea1a46cbcea45eb79617d0758c10@socionext.com"},"message":"Build: check if specified external image exists\n\ncheck_* targets check if the required option are given, but do not\ncheck the validity of the argument.  If the specified file does not\nexist, let the build fail immediately instead of passing the invalid\nfile path to tools.\n\nSigned-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/802d2dd2ba913a0ea6bd70487d652b03346f9ed5"},{"sha":"76d27d24d4a71637a6e7a4a4e87cf9ec1d4c3d61","author":{"name":"Masahiro Yamada","email":"642490827508ea1a46cbcea45eb79617d0758c10@socionext.com"},"message":"Build: replace $(call MAKE_TOOL_ARGS,...) with $(call FIP_ADD_IMG,...)\n\nWe use $(call MAKE_TOOL_ARGS,...) or $(call FIP_ADD_IMG,...) where we\nexpect externally built images.  The difference between the two is\ncheck_* target.  It now checks if the given path exists, so it is a\ngood thing to use $(call FIP_ADD_IMG,...) in all the places.\n\nSigned-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>","distinct":false,"url":"https://api.github.com/repos/vchong/arm-trusted-firmware/commits/76d27d24d4a71637a6e7a4a4e87cf9ec1d4c3d61"}]}
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