{"action":"created","issue":{"url":"https://api.github.com/repos/m-labs/sinara/issues/354","repository_url":"https://api.github.com/repos/m-labs/sinara","labels_url":"https://api.github.com/repos/m-labs/sinara/issues/354/labels{/name}","comments_url":"https://api.github.com/repos/m-labs/sinara/issues/354/comments","events_url":"https://api.github.com/repos/m-labs/sinara/issues/354/events","html_url":"https://github.com/m-labs/sinara/issues/354","id":271972454,"number":354,"title":"Urukul v1.0 detailed testing","user":{"login":"hartytp","id":21218399,"avatar_url":"https://avatars0.githubusercontent.com/u/21218399?v=4","gravatar_id":"","url":"https://api.github.com/users/hartytp","html_url":"https://github.com/hartytp","followers_url":"https://api.github.com/users/hartytp/followers","following_url":"https://api.github.com/users/hartytp/following{/other_user}","gists_url":"https://api.github.com/users/hartytp/gists{/gist_id}","starred_url":"https://api.github.com/users/hartytp/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/hartytp/subscriptions","organizations_url":"https://api.github.com/users/hartytp/orgs","repos_url":"https://api.github.com/users/hartytp/repos","events_url":"https://api.github.com/users/hartytp/events{/privacy}","received_events_url":"https://api.github.com/users/hartytp/received_events","type":"User","site_admin":false},"labels":[{"id":497239670,"url":"https://api.github.com/repos/m-labs/sinara/labels/area:testing","name":"area:testing","color":"b60205","default":false},{"id":612173009,"url":"https://api.github.com/repos/m-labs/sinara/labels/area:urukul","name":"area:urukul","color":"e99695","default":false}],"state":"open","locked":false,"assignee":null,"assignees":[],"milestone":{"url":"https://api.github.com/repos/m-labs/sinara/milestones/30","html_url":"https://github.com/m-labs/sinara/milestone/30","labels_url":"https://api.github.com/repos/m-labs/sinara/milestones/30/labels","id":3032096,"number":30,"title":"Urukul v1.2","description":null,"creator":{"login":"jordens","id":1338946,"avatar_url":"https://avatars1.githubusercontent.com/u/1338946?v=4","gravatar_id":"","url":"https://api.github.com/users/jordens","html_url":"https://github.com/jordens","followers_url":"https://api.github.com/users/jordens/followers","following_url":"https://api.github.com/users/jordens/following{/other_user}","gists_url":"https://api.github.com/users/jordens/gists{/gist_id}","starred_url":"https://api.github.com/users/jordens/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/jordens/subscriptions","organizations_url":"https://api.github.com/users/jordens/orgs","repos_url":"https://api.github.com/users/jordens/repos","events_url":"https://api.github.com/users/jordens/events{/privacy}","received_events_url":"https://api.github.com/users/jordens/received_events","type":"User","site_admin":false},"open_issues":1,"closed_issues":1,"state":"open","created_at":"2018-01-12T18:11:13Z","updated_at":"2018-03-06T11:32:58Z","due_on":null,"closed_at":null},"comments":91,"created_at":"2017-11-07T20:29:18Z","updated_at":"2018-03-16T21:37:49Z","closed_at":null,"author_association":"COLLABORATOR","body":"- [x] Channel-to-channel cross-talk: adjacent channels, with agressor, victim switches opened and switches closed and with attenuators at max/min\r\n- [x] Output phase noise/amplitude noise (0.1 Hz - 10 MHz)\r\n- [x] OIP3, OIP2 vs frequency for min attenuator setting and medium/large amplitude (ASF)\r\n- [x] RF switch settling behavior for on edge at max power (worst case)\r\n- [x] Attenuator glitches\r\n- [x] Nyquist attenuation, clock leakage\r\n- [ ] RF switch settling behavior for off edge at max power (worst case)\r\n- [ ] RF switch phase chirp\r\n- [ ] Temperature coefficient of power and phase\r\n- [ ] Are we happy running the IC11 and running the LVDS interface directly from the 3V6 rail? (Try this and check performance)\r\n- [ ] Check performance of clock buffers when running in LVDS mode from the 1V8A rail\r\n- [x] Optimize PLL loop filters (@weidazhang can you do this for the AD9910 boards, please?)\r\n- [ ] Board-to-board crosstalk (in proximity to Kasli, DIO pulsing 5 V into 50 R, Urukul)\r\n\r\nUse some fixed reference frequency for all tests, such as 80MHz."},"comment":{"url":"https://api.github.com/repos/m-labs/sinara/issues/comments/373851911","html_url":"https://github.com/m-labs/sinara/issues/354#issuecomment-373851911","issue_url":"https://api.github.com/repos/m-labs/sinara/issues/354","id":373851911,"user":{"login":"cjbe","id":13227288,"avatar_url":"https://avatars1.githubusercontent.com/u/13227288?v=4","gravatar_id":"","url":"https://api.github.com/users/cjbe","html_url":"https://github.com/cjbe","followers_url":"https://api.github.com/users/cjbe/followers","following_url":"https://api.github.com/users/cjbe/following{/other_user}","gists_url":"https://api.github.com/users/cjbe/gists{/gist_id}","starred_url":"https://api.github.com/users/cjbe/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/cjbe/subscriptions","organizations_url":"https://api.github.com/users/cjbe/orgs","repos_url":"https://api.github.com/users/cjbe/repos","events_url":"https://api.github.com/users/cjbe/events{/privacy}","received_events_url":"https://api.github.com/users/cjbe/received_events","type":"User","site_admin":false},"created_at":"2018-03-16T21:37:49Z","updated_at":"2018-03-16T21:37:49Z","author_association":"COLLABORATOR","body":"@jordens with FPGA driving sync. I tested synchronisation between channels on the same board and channels on different boards. \r\n\r\nThe DDS sync signal was generated by a TTLClkGen, and IO_UPDATE by a TTL SERDES output. I adjusted the sync input delay on each channel to sit in the centre of the eye - thus the SYNC_CLK of each DDS is aligned to better than 1 DDS clk period (=1ns @ 1GHz).\r\n\r\nI choose an offset between IO_UPDATE and the sync TTLClkGen such that IO_UPDATE aligned roughly on the falling edge of the DDS SYNC_CLK. (I did not look at the CPLD timing report to work out if this would work with a fixed value over PVT).\r\n\r\nI saw no synchronisation errors over ~10^10 IO_UPDATES, but I did see at least one SYNC_SMP_ERR from most of the AD9910 over this 10^10 events using the standard 300ps validation window - I have not looked to see if this happens with slightly smaller validation windows."}}
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