{"action":"created","comment":{"url":"https://api.github.com/repos/RIOT-OS/RIOT/pulls/comments/200098892","pull_request_review_id":134345045,"id":200098892,"node_id":"MDI0OlB1bGxSZXF1ZXN0UmV2aWV3Q29tbWVudDIwMDA5ODg5Mg==","diff_hunk":"@@ -0,0 +1,249 @@\n+/*\n+ * Copyright (C) 2016 Robert Hartung <hartung@ibr.cs.tu-bs.de>\n+ *               2018 Acutam Automation, LLC\n+ *\n+ * This file is subject to the terms and conditions of the GNU Lesser\n+ * General Public License v2.1. See the file LICENSE in the top level\n+ * directory for more details.\n+ */\n+\n+/*\n+ * @ingroup cpu_atmega_common\n+ * @ingroup drivers_periph_rtt\n+ * @{\n+ *\n+ * @file\n+ * @brief       Low-level ATmega RTT driver implementation\n+ *\n+ * @author      Robert Hartung <hartung@ibr.cs.tu-bs.de>\n+ * @author      Matthew Blue <matthew.blue.neuro@gmail.com>\n+ *\n+ * In order to safely sleep when using the RTT:\n+ * 1. Disable interrupts\n+ * 2. Write to one of the asynch registers (e.g. TCCR2A)\n+ * 3. Wait for ASSR register's busy flags to clear\n+ * 4. Re-enable interrupts\n+ * 5. Sleep before interrupt re-enable takes effect\n+ *\n+ * @}\n+ */\n+\n+#include <avr/interrupt.h>\n+\n+#include \"cpu.h\"\n+#include \"irq.h\"\n+#include \"periph/rtt.h\"\n+#include \"periph_conf.h\"\n+#include \"thread.h\"\n+\n+#define ENABLE_DEBUG    (0)\n+#include \"debug.h\"\n+\n+/* guard file in case no RTT device is defined */\n+#if RTT_NUMOF\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#if MODULE_PERIPH_RTC\n+extern void atmega_rtc_incr(void);\n+#endif\n+\n+static inline void _asynch_wait(void);\n+\n+typedef struct {\n+    uint16_t ext_cnt;           /* Counter to make 8-bit timer 24-bit */\n+    uint16_t ext_comp;          /* Extend compare to 24-bits */\n+    rtt_cb_t alarm_cb;          /* callback called from RTT alarm */\n+    void *alarm_arg;            /* argument passed to the callback */\n+    rtt_cb_t overflow_cb;       /* callback called when RTT overflows */\n+    void *overflow_arg;         /* argument passed to the callback */\n+} rtt_state_t;\n+\n+static volatile rtt_state_t rtt_state;\n+\n+void rtt_init(void)\n+{\n+    DEBUG(\"Initializing RTT\\n\");\n+\n+    rtt_poweron();\n+\n+    /*\n+     * From the datasheet section \"Asynchronous Operation of Timer/Counter2\"\n+     * p148 for ATmega1284P.\n+     * 1. Disable the Timer/Counter2 interrupts by clearing OCIE2x and TOIE2.\n+     * 2. Select clock source by setting AS2 as appropriate.\n+     * 3. Write new values to TCNT2, OCR2x, and TCCR2x.\n+     * 4. To switch to asynchronous: Wait for TCN2UB, OCR2xUB, TCR2xUB.\n+     * 5. Clear the Timer/Counter2 Interrupt Flags.\n+     * 6. Enable interrupts, if needed\n+     */\n+\n+    /* Disable all timer 2 interrupts */\n+    TIMSK2 = 0;\n+\n+    /* Select asynchronous clock source */\n+    ASSR = (1 << AS2);\n+\n+    /* Set counter to 0 */\n+    TCNT2 = 0;\n+\n+    /* Reset compare values */\n+    OCR2A = 0;\n+    OCR2B = 0;\n+\n+    /* Reset timer control */\n+    TCCR2A = 0;\n+\n+    /* 32768Hz / 1024 = 32 ticks per second */\n+    TCCR2B = (1 << CS22) | (1 << CS21) | (1 <<  CS20);\n+\n+    /* Wait until not busy anymore */\n+    DEBUG(\"RTT waits until ASSR not busy\\n\");\n+    _asynch_wait();\n+\n+    /* Clear interrupt flags */\n+    /* Oddly, this is done by writing ones; see datasheet */\n+    TIFR2 = (1 << OCF2B) | (1 << OCF2A) | (1 << TOV2);\n+\n+    /* Enable 8-bit overflow interrupt */\n+    TIMSK2 |= (1 << TOIE2);\n+\n+    DEBUG(\"RTT initialized\\n\");\n+}\n+\n+void rtt_set_overflow_cb(rtt_cb_t cb, void *arg)\n+{\n+    /* Interrupt safe order of assignment */\n+    rtt_state.overflow_cb = NULL;\n+    rtt_state.overflow_arg = arg;\n+    rtt_state.overflow_cb = cb;\n+}\n+\n+void rtt_clear_overflow_cb(void)\n+{\n+    /* Interrupt safe order of assignment */\n+    rtt_state.overflow_cb = NULL;\n+    rtt_state.overflow_arg = NULL;\n+}\n+\n+uint32_t rtt_get_counter(void)\n+{\n+    /* Make sure it is safe to read TCNT2, in case we just woke up */\n+    DEBUG(\"RTT sleeps until safe to read TCNT2\\n\");\n+    TCCR2A = 0;\n+    _asynch_wait();\n+\n+    return (((uint32_t)rtt_state.ext_cnt << 8) | (uint32_t)TCNT2);\n+}\n+\n+void rtt_set_counter(uint32_t counter)\n+{\n+    /* Wait until not busy anymore (should be immediate) */\n+    DEBUG(\"RTT sleeps until safe to write TCNT2\\n\");\n+    _asynch_wait();\n+\n+    rtt_state.ext_cnt = (uint16_t)(counter >> 8);\n+    TCNT2 = (uint8_t)counter;\n+}\n+\n+void rtt_set_alarm(uint32_t alarm, rtt_cb_t cb, void *arg)\n+{\n+    /* Disable alarm interrupt */\n+    TIMSK2 &= ~(1 << OCIE2A);\n+    rtt_state.alarm_cb = NULL;\n+\n+    /* Wait until not busy anymore (should be immediate) */\n+    DEBUG(\"RTT sleeps until safe to write OCR2A\\n\");\n+    _asynch_wait();\n+\n+    /* Set the alarm value */\n+    rtt_state.ext_comp = (uint16_t)(alarm >> 8);\n+    OCR2A = (uint8_t)alarm;\n+\n+    /* Interrupt safe order of assignment */\n+    rtt_state.alarm_arg = arg;\n+    rtt_state.alarm_cb = cb;\n+\n+    /* Enable alarm interrupt only if it will trigger before overflow */\n+    if (rtt_state.ext_comp <= rtt_state.ext_cnt) {\n+        TIMSK2 |= (1 << OCIE2A);\n+    }\n+}\n+\n+uint32_t rtt_get_alarm(void)\n+{\n+    return (((uint32_t)rtt_state.ext_comp << 8) | (uint32_t)OCR2A);\n+}\n+\n+void rtt_clear_alarm(void)\n+{\n+    /* Disable alarm interrupt */\n+    TIMSK2 &= ~(1 << OCIE2A);\n+\n+    /* Interrupt safe order of assignment */\n+    rtt_state.alarm_cb = NULL;\n+    rtt_state.alarm_arg = NULL;\n+}\n+\n+void rtt_poweron(void)\n+{\n+    power_timer2_enable();\n+}\n+\n+void rtt_poweroff(void)\n+{\n+    power_timer2_disable();\n+}\n+\n+void _asynch_wait(void)\n+{\n+    /* Wait until all busy flags clear. According to the datasheet,\n+     * this can take up to 2 positive edges of TOSC1 (32kHz). */\n+    while (ASSR & ((1 << TCN2UB) | (1 << OCR2AUB) | (1 << OCR2BUB)\n+                   | (1 << TCR2AUB) | (1 << TCR2BUB))) ;\n+}\n+\n+ISR(TIMER2_OVF_vect) {\n+    __enter_isr();\n+\n+    rtt_state.ext_cnt++;\n+\n+    /* Enable RTT alarm if overflowed enough times */\n+    if (rtt_state.ext_comp == rtt_state.ext_cnt) {\n+        TIMSK2 |= (1 << OCIE2A);","path":"cpu/atmega_common/periph/rtt.c","position":215,"original_position":215,"commit_id":"82be4ad58364041edb32be2ba80566cb9ab13987","original_commit_id":"82be4ad58364041edb32be2ba80566cb9ab13987","user":{"login":"Josar","id":6164061,"node_id":"MDQ6VXNlcjYxNjQwNjE=","avatar_url":"https://avatars3.githubusercontent.com/u/6164061?v=4","gravatar_id":"","url":"https://api.github.com/users/Josar","html_url":"https://github.com/Josar","followers_url":"https://api.github.com/users/Josar/followers","following_url":"https://api.github.com/users/Josar/following{/other_user}","gists_url":"https://api.github.com/users/Josar/gists{/gist_id}","starred_url":"https://api.github.com/users/Josar/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/Josar/subscriptions","organizations_url":"https://api.github.com/users/Josar/orgs","repos_url":"https://api.github.com/users/Josar/repos","events_url":"https://api.github.com/users/Josar/events{/privacy}","received_events_url":"https://api.github.com/users/Josar/received_events","type":"User","site_admin":false},"body":"Not clearing will execute the compare match isr imediatly as there is allready a set flag \r\n/* Clear interrupt flags */\r\n        TIFR2 = (1 << OCF2A);","created_at":"2018-07-04T11:35:24Z","updated_at":"2018-07-04T11:36:41Z","html_url":"https://github.com/RIOT-OS/RIOT/pull/8842#discussion_r200098892","pull_request_url":"https://api.github.com/repos/RIOT-OS/RIOT/pulls/8842","author_association":"CONTRIBUTOR","_links":{"self":{"href":"https://api.github.com/repos/RIOT-OS/RIOT/pulls/comments/200098892"},"html":{"href":"https://github.com/RIOT-OS/RIOT/pull/8842#discussion_r200098892"},"pull_request":{"href":"https://api.github.com/repos/RIOT-OS/RIOT/pulls/8842"}}},"pull_request":{"url":"https://api.github.com/repos/RIOT-OS/RIOT/pulls/8842","id":177930243,"node_id":"MDExOlB1bGxSZXF1ZXN0MTc3OTMwMjQz","html_url":"https://github.com/RIOT-OS/RIOT/pull/8842","diff_url":"https://github.com/RIOT-OS/RIOT/pull/8842.diff","patch_url":"https://github.com/RIOT-OS/RIOT/pull/8842.patch","issue_url":"https://api.github.com/repos/RIOT-OS/RIOT/issues/8842","number":8842,"state":"open","locked":false,"title":"cpu/atmega_common: RTT and RTC support","user":{"login":"ZetaR60","id":32377642,"node_id":"MDQ6VXNlcjMyMzc3NjQy","avatar_url":"https://avatars2.githubusercontent.com/u/32377642?v=4","gravatar_id":"","url":"https://api.github.com/users/ZetaR60","html_url":"https://github.com/ZetaR60","followers_url":"https://api.github.com/users/ZetaR60/followers","following_url":"https://api.github.com/users/ZetaR60/following{/other_user}","gists_url":"https://api.github.com/users/ZetaR60/gists{/gist_id}","starred_url":"https://api.github.com/users/ZetaR60/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/ZetaR60/subscriptions","organizations_url":"https://api.github.com/users/ZetaR60/orgs","repos_url":"https://api.github.com/users/ZetaR60/repos","events_url":"https://api.github.com/users/ZetaR60/events{/privacy}","received_events_url":"https://api.github.com/users/ZetaR60/received_events","type":"User","site_admin":false},"body":"This adds RTT and RTC support to the ATmegas. It is currently partially working on ATMega1284P using the mega-xplained board. So far as I can tell, the timer used with the real-time crystal is the same across all supported ATmegas, so if another board is added with a RTC crystal it should work right away. The crystal cannot be added to any of the Arduino boards without soldering, unfortunately.\r\n\r\nThere are a few problems with the code that I need to work out, but I need some advice on how to proceed:\r\n- The use of RTC_NUMOF in rtt.c does not work, but I am not sure what to use to guard the RTC code.\r\n- The use of thread_yield while waiting for busy conditions to clear lags messages in tests/periph_rtt a long time. But the wait can be up to 70ms, which seems really long to just spin if xtimer is not enabled.\r\n- periph_rtt is required for the RTC to work, but I don't know how to add this dependency without adding it for a bunch of stuff that doesn't need it (e.g. it must be added to FEATURES_REQUIRED in tests/periph_rtc).\r\n- ld does not seem to be able to find mktime and gmtime_r for rtc.c, leading to a 'undefined reference' error during linking.\r\n\r\nThe RTT code is based on some prior work by Robert Hartung in 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