{"push_id":3042210149,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"32b991b89c09d1ba173fd807d53cae8213e9f2c3","before":"15dabb4fb1d08eccdd32a21e7aaa4dbef318de8c","commits":[{"sha":"32b991b89c09d1ba173fd807d53cae8213e9f2c3","author":{"name":"Craig Topper","email":"0c9ca018c303606191d06dd2c0bdf1206717c3f3@intel.com"},"message":"[X86] In LowerMULH, use generic truncate and vector shuffle nodes instead of directly emitting PACKUS.\n\nTruncate and shuffle lowering are already capable of matching to PACKUS using known bits analysis.\n\nThis features one test change where we now prefer to extend v16i16->v16i32 then trunc v16i32->v16i8 over extract_subvector+packus when avx512f is available, but avx512bw is not.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346697 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm/commits/32b991b89c09d1ba173fd807d53cae8213e9f2c3"}]}
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