{"action":"opened","issue":{"url":"https://api.github.com/repos/sinara-hw/Humpback/issues/1","repository_url":"https://api.github.com/repos/sinara-hw/Humpback","labels_url":"https://api.github.com/repos/sinara-hw/Humpback/issues/1/labels{/name}","comments_url":"https://api.github.com/repos/sinara-hw/Humpback/issues/1/comments","events_url":"https://api.github.com/repos/sinara-hw/Humpback/issues/1/events","html_url":"https://github.com/sinara-hw/Humpback/issues/1","id":382009273,"node_id":"MDU6SXNzdWUzODIwMDkyNzM=","number":1,"title":"[RFC] new EEM: humpback","user":{"login":"jordens","id":1338946,"node_id":"MDQ6VXNlcjEzMzg5NDY=","avatar_url":"https://avatars1.githubusercontent.com/u/1338946?v=4","gravatar_id":"","url":"https://api.github.com/users/jordens","html_url":"https://github.com/jordens","followers_url":"https://api.github.com/users/jordens/followers","following_url":"https://api.github.com/users/jordens/following{/other_user}","gists_url":"https://api.github.com/users/jordens/gists{/gist_id}","starred_url":"https://api.github.com/users/jordens/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/jordens/subscriptions","organizations_url":"https://api.github.com/users/jordens/orgs","repos_url":"https://api.github.com/users/jordens/repos","events_url":"https://api.github.com/users/jordens/events{/privacy}","received_events_url":"https://api.github.com/users/jordens/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":null,"assignees":[],"milestone":null,"comments":26,"created_at":"2018-11-18T22:46:45Z","updated_at":"2018-11-18T22:46:45Z","closed_at":null,"author_association":"MEMBER","body":"Despite the general purpose of the Sinara ecosystem hardware and the wide range of features, lot of development in labs is still based on random \"toy\"/\"development\"/\"evaluation\"/\"hobbyist\" boards (called \"boards\" throughout) with µCs and FPGAs. They are dirt cheap, fit for the many applications that lie outside the typical use cases for Sinara EEMs, get the job done just fine, and have a shallow learning curve suitable for physicists. That won't change and there seems no point in trying to replace those \"boards\". Instead let's try to integrate them.\r\n\r\n## Idea\r\n\r\nI'd like to propose a simple modification to the [TTL tester EEM](https://github.com/sinara-hw/sinara/raw/master/ARTIQ_ALTIUM/EEMs/Tester/3U_TTL_Tester.PDF) to give it a much wider applicability and open it up for more use cases.\r\n\r\nThe basic idea is to\r\n\r\n1. get connectivity between boards and the Sinara EEM connector\r\n2. build a easy way of mounting those boards in a crate\r\n3. to supply them with power.\r\n\r\n## Use cases\r\n\r\n* Ethernet connectivity of all kinds. Translate EEM to ethernet.\r\n* Can be get plenty of power from PoE independent of the board (e.g. [21W](https://www.digikey.de/product-detail/en/phihong-usa/POE21-120/993-1080-ND/2384559))\r\n* Wire up microcontrollers that run simple control tasks and loops (temperature control, laser power stabilization, slower modulation/demodulation frequency locks) when (a) where the µC is connected to EEMs and controlling them and (b) when the µC is connected as an EEM to a core device.\r\n* Enable usage and testing of other EEMs with a simple adapter using a µC or FPGA. Also for acceptance testing at the factory.\r\n\r\n## Implementations\r\n\r\nThere seem to be two approaches:\r\n\r\n### A EEM adapter: Shield\r\n\r\nBuild a \"shield\" that just implements the connectivity aspect (1) where a remote board is connected to the core device.\r\n  * To be used outside a crate\r\n  * 2xRJ45 connected to a DIO-RJ45 EEM in a crate and thus to the core device\r\n  * Should use the same LVDS-to-CMOS converters and DIP switches as Tester. Or maybe just a cheap (ICE40) FPGA (and DIP switches)\r\n  * Should be powered from the board\r\n  * Does not give I2C connectivity.\r\n\r\n### A EEM board carrier: Humpback\r\n\r\nBuild a EEM that achieves (1) both ways, (2), and (3).\r\n  * Call it e.g. \"Humpback\"\r\n  * Mount the board on the EEM\r\n  * Since there will likely be a need for external connectivity, while the panel pattern for that connectivity is unknown, let's open up the panel and also build a gap into the board so that only a panel frame (or even just a panel-U) remains.\r\n  * Make the EEM short so that small boards can be used and large boards just stick out of the crate.\r\n  * Two EEM connectors\r\n  * Power the board from the EEM\r\n  * Add a barrel connector so that the EEM can power MP3V3, the board and attached EEMs or the EEM and board can be powered from the upstream core device (I.e. dual use just like Tester).\r\n  * Maybe a 5V SMPS for VIN to feed the more [sensitive](https://www.arduino.cc/en/ArduinoCertified/IntelGalileo) boards.\r\n  * Use a cheap FPGA (ICE40 maybe) to convert LVDS. Add DIP switches and implement an I2C direction control shift register in FPGA.\r\n  * Expose 8xCMOS or LVDS raw (for FPGA boards) and I2C to board.\r\n  * Maybe expose MP3V3 to board.\r\n\r\n## Potential layouts and pinouts\r\n\r\nThe choice for the connector layout (power, i2c, digital) is a bit tricky. For both shield and EEM there could be:\r\n\r\n### Arduino Uno V3\r\n\r\nThe \"Arduino Uno v3\" pattern for the shield and the EEM plus a common denominator of mounting holes and standoffs for the EEM would cover large subset of boards. These are typically stacked and the EEM would probably the \"top\" of the stack while the board is the \"bottom\".\r\nBest position and orientation unclear.\r\n\r\nµC/CPU:\r\n* [Arduino](https://store.arduino.cc/arduino-due) (*but not with 5V IO!*)\r\n* [ST Nucleo 144](https://www.digikey.com/product-detail/en/stmicroelectronics/NUCLEO-F429ZI/497-16280-ND/5806777), [ST Nucleo 64](https://www.digikey.com/product-detail/en/stmicroelectronics/NUCLEO-F446RE/497-15882-ND/5347712)\r\n* ~[Intel Galileo](https://www.arduino.cc/en/ArduinoCertified/IntelGalileoGen2)~\r\n\r\nFPGA:\r\n* Xilinx Artix: [Arty](https://www.xilinx.com/products/boards-and-kits/arty.html#hardware)\r\n* Intel Max 10 (fka Altera) [XLR8](http://www.aloriumtech.com/xlr8-fpga-board/)\r\n* Xilinx Spartan 6: [Papilio (Pro)](http://papilio.cc/index.php?n=Papilio.PapilioPro)\r\n* Lattice ICE40: \r\n\r\n### 26 pin Raspberry Pi+\r\n\r\nHas 5V, I2C, 3V CMOS, mounting hole pattern.\r\n\r\n* Raspberry Pi B+ etc\r\n* [Orange Pi (Zero)](http://www.orangepi.org/orangepizero/)\r\n\r\n### Digilent PMOD\r\n\r\nProbably only as a shield.\r\n\r\n### ST Morpho\r\n\r\n* Nucleo\r\n\r\n### ST ZIO\r\n\r\n* Nucleo 144\r\n\r\n### beagle bone\r\n\r\n* Beagle bone black"}}
{"actor":{"display_login":"jordens"}}