{"push_id":2712138629,"size":195,"distinct_size":195,"ref":"refs/heads/master","head":"c6a14de3ef30291918f3b15436cf6a75db413eea","before":"f3100a1a2f575e1a0ce4744cb2722e780135b1cf","commits":[{"sha":"574761065744238440d2baf426d2ccc5912db13a","author":{"name":"Kinney, Michael D","email":"fd20bc543a9f65bb633fac7d08a403c1f1c8eb6c@intel.com"},"message":"MdeModulePkg/DxeCapsuleLibFmp: Add progress bar support\n\nhttps://bugzilla.tianocore.org/show_bug.cgi?id=801\n\nBased on content from the following branch/commits:\nhttps://github.com/Microsoft/MS_UEFI/tree/share/MsCapsuleSupport\n\n* Change Update_Image_Progress() to UpdateImageProcess()\n* Call DisplayUpdateProgressLib from UpdateImageProgress().\n* Split out a boot service and runtime version of\n  UpdateImageProgress() so the DisplayUpdateProgressLib is\n  not used at runtime.\n* If gEdkiiFirmwareManagementProgressProtocolGuid is present,\n  then use its progress bar color and watchdog timer value.\n* If gEdkiiFirmwareManagementProgressProtocolGuid is not present,\n  then use default progress bar color and 5 min watchdog timer.\n* Remove Print() calls during capsule processing.  Instead,\n  the DisplayUpdateProgressLib is used to inform the user\n  of progress during a capsule update.\n\nCc: Star Zeng <star.zeng@intel.com>\nCc: Eric Dong <eric.dong@intel.com>\nCc: Jiewen Yao <jiewen.yao@intel.com>\nCc: Sean Brogan <sean.brogan@microsoft.com>\nSigned-off-by: Michael D Kinney <michael.d.kinney@intel.com>\nContributed-under: TianoCore Contribution Agreement 1.1\nTested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nReviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nReviewed-by: Star Zeng <star.zeng@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/574761065744238440d2baf426d2ccc5912db13a"},{"sha":"eb5943134630292db2c14346b5d94eab0b72314f","author":{"name":"Kinney, Michael D","email":"fd20bc543a9f65bb633fac7d08a403c1f1c8eb6c@intel.com"},"message":"SignedCapsulePkg/SystemFirmwareUpdateDxe: Use progress API\n\nhttps://bugzilla.tianocore.org/show_bug.cgi?id=801\n\nUse PlatformFlashWriteWithProgress() instead of PlatformFLashWrite()\nso the user can be informed of the progress as a capsule is used\nto update a firmware image in a firmware device.\n\nCc: Jiewen Yao <jiewen.yao@intel.com>\nSigned-off-by: Michael D Kinney <michael.d.kinney@intel.com>\nContributed-under: TianoCore Contribution Agreement 1.1\nTested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nReviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nReviewed-by: Star Zeng <star.zeng@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/eb5943134630292db2c14346b5d94eab0b72314f"},{"sha":"a05a8a5aa17da4bc7144706a9931d68beec1a61f","author":{"name":"Leo Duran","email":"de3438c1a4f7b527d4e4fd666d13484b4545c540@amd.com"},"message":"MdeModulePkg/Library/BaseSerialPortLib16550: Ensure FIFO Polled Mode\n\nPut the UART in FIFO Polled Mode by clearing IER after setting FCR.\nAlso, add comments to show DLAB state for registers 0 and 1.\n\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Leo Duran <leo.duran@amd.com>\nCc: Star Zeng <star.zeng@intel.com>\nCC: Eric Dong <eric.dong@intel.com>\nReviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>\nReviewed-by: Star Zeng <star.zeng@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/a05a8a5aa17da4bc7144706a9931d68beec1a61f"},{"sha":"64285f15264906c761b5a6772b5b590b32caa03c","author":{"name":"Yonghong Zhu","email":"78d981fe33a016071af5222c56d5cf77f30fb0b2@intel.com"},"message":"BaseTools/UPT: Update the import statement to use StringUtils\n\nThe patch 5a57246eab80 Rename String to StringUtils, but it didn't\nupdate the UPT Tool for the import statement which cause UPT tool\nbreak.\n\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Yonghong Zhu <yonghong.zhu@intel.com>\nReviewed-by: Liming Gao <liming.gao@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/64285f15264906c761b5a6772b5b590b32caa03c"},{"sha":"a6eaba4d7f23262ab8e8502b476bdf5249a54ad4","author":{"name":"Dandan Bi","email":"1e8692d8ed8470b17e8ddd7612a0f029768dcb56@intel.com"},"message":"ShellPkg/UefiShellAcpiViewCommandLib: Fix ECC issues\n\nMake the function comments follow EDK2 coding style.\n\nCc: Sami Mujawar <sami.mujawar@arm.com>\nCc: Evan Lloyd <evan.lloyd@arm.com>\nCc: Jaben Carsey <jaben.carsey@intel.com>\nCc: Ruiyu Ni <ruiyu.ni@intel.com>\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Dandan Bi <dandan.bi@intel.com>\nReviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/a6eaba4d7f23262ab8e8502b476bdf5249a54ad4"},{"sha":"f75c7478280b96d191e86856c0b1c49ff711c284","author":{"name":"Dandan Bi","email":"1e8692d8ed8470b17e8ddd7612a0f029768dcb56@intel.com"},"message":"ShellPkg/UefiShellAcpiViewCommandLib: Fix ECC issues\n\n1. Separate variable definition and initialization.\n2. Make the variable naming following Edk2 rule.\n\nV2: Remove the updates of guard macros in header files.\n\nCc: Sami Mujawar <sami.mujawar@arm.com>\nCc: Evan Lloyd <evan.lloyd@arm.com>\nCc: Jaben Carsey <jaben.carsey@intel.com>\nCc: Ruiyu Ni <ruiyu.ni@intel.com>\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Dandan Bi <dandan.bi@intel.com>\nReviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/f75c7478280b96d191e86856c0b1c49ff711c284"},{"sha":"271d8cd7df0c346f19803938d98fe7cbb7b63be4","author":{"name":"Benjamin You","email":"89c9a400bd433de98065ddaecf862b46017e8ac3@intel.com"},"message":"CorebootModulePkg/CbSupportDxe: Remove SCI_EN setting\n\nCurrent implemenation sets PM1_CNT.SCI_EN bit at ReadyToBoot event.\nHowever, this should not be done because this causes OS to skip triggering\nFADT.SMI_CMD, which leads to the functions implemented in the SMI\nhandler being omitted.\n\nThis issue was identified by Matt Delco <delco@google.com>.\n\nThe fix does the following:\n- The SCI_EN bit setting is removed from CbSupportDxe driver.\n- Some additional checks are added in CbParseFadtInfo() in CbParseLib.c to\n  output some error message and ASSERT (FALSE) if ALL of the following\n  conditions are met:\n  1) HARDWARE_REDUCED_ACPI is not set;\n  2) SMI_CMD field is zero;\n  3) SCI_EN bit is zero;\n  which indicates the ACPI enabling status is inconsistent: SCI is not\n  enabled but the ACPI table does not provide a means to enable it through\n  FADT->SMI_CMD. This may cause issues in OS.\n\nCc: Maurice Ma <maurice.ma@intel.com>\nCc: Prince Agyeman <prince.agyeman@intel.com>\nCc: Matt Delco <delco@google.com>\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Benjamin You <benjamin.you@intel.com>\nReviewed-by: Maurice Ma <maurice.ma@intel.com>\nReviewed-by: Matt Delco <delco@google.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/271d8cd7df0c346f19803938d98fe7cbb7b63be4"},{"sha":"9dca2105ad960c9946d7cc2ece40f65e1999dac7","author":{"name":"Ard Biesheuvel","email":"66d3c5fdaeea7ff1f996ad04f2c45e08ab38e2f5@linaro.org"},"message":"MdeModulePkg/EmmcDxe: demote DEBUG print to DEBUG_BLKIO\n\nLower the priority of the DEBUG print in EmmcReadWrite(), which\nis emitted for each read or write operation to the eMMC device,\nwhich clutters up the log output of builds created with DEBUG_INFO\nenabled.\n\nSuggested-by: Pipat Methavanitpong <methavanitpong.pipat@socionext.com>\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nReviewed-by: Laszlo Ersek <lersek@redhat.com>\nReviewed-by: Star Zeng <star.zeng@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/9dca2105ad960c9946d7cc2ece40f65e1999dac7"},{"sha":"a683ceca800e9d10c999d463444aa92945be0a70","author":{"name":"Michael Zimmermann","email":"13027ca0fefa2b406bb0e61c3b36bc21411fbb83@gmail.com"},"message":"ArmPkg/CompilerIntrinsicsLib: fix GCC8 warning for __aeabi_memcpy aliases\n\nThis was the warning (shown for __aeabi_memcpy, __aeabi_memcpy4 and\n__aeabi_memcpy8):\n\n  ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c:42:6:\n  error: '__aeabi_memcpy8' alias between functions of incompatible types\n    'void(void*, const void *, size_t)'\n      {aka 'void(void *, const void *, unsigned int)'}\n    and 'void *(void *, const void *, size_t)'\n      {aka 'void *(void *, const void *, unsigned int)'} [-Werror=attribute-alias]\n  void __aeabi_memcpy8(void *dest, const void *src, size_t n);\n  ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c:19:7: note: aliased declaration here\n    void *__memcpy(void *dest, const void *src, size_t n)\n\nThe problem is the different return type (void vs void*). So reshuffle\nthe code so the prototypes match between the aliases.\n\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com>\n[ardb: change prototype of internal __memcpy() and drop extra wrapper]\nReviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/a683ceca800e9d10c999d463444aa92945be0a70"},{"sha":"5163d89398c541ab03e8f6f6ab6ed479e95b4be9","author":{"name":"Derek Lin","email":"619c22d7be1ca1c616f219f81c899e30e55c21a8@hpe.com"},"message":"BaseTools: Remove dsc nested include checking.\n\nThe dsc nested include checking make unexpected build error when\nbuilding project A and switch to project B.\n\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Derek Lin <derek.lin2@hpe.com>\nReviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/5163d89398c541ab03e8f6f6ab6ed479e95b4be9"},{"sha":"4134f2bddcb68d2e20ed000cdf54abf3f1140904","author":{"name":"Ard Biesheuvel","email":"66d3c5fdaeea7ff1f996ad04f2c45e08ab38e2f5@linaro.org"},"message":"MdePkg/BaseIoLibIntrinsic: make BaseIoLibIntrinsic safe for ArmVirt/KVM\n\nKVM on ARM refuses to decode load/store instructions used to perform\nI/O to emulated devices, and instead relies on the exception syndrome\ninformation to describe the operand register, access size, etc.\nThis is only possible for instructions that have a single input/output\nregister (as opposed to ones that increment the offset register, or\nload/store pair instructions, etc). Otherwise, QEMU crashes with the\nfollowing error\n\n  error: kvm run failed Function not implemented\n  R00=01010101 R01=00000008 R02=00000048 R03=08000820\n  R04=00000120 R05=7faaa0e0 R06=7faaa0dc R07=7faaa0e8\n  R08=7faaa0ec R09=7faaa088 R10=000000ff R11=00000080\n  R12=ff000000 R13=7fccfe08 R14=7faa835f R15=7faa887c\n  PSR=800001f3 N--- T svc32\n  QEMU: Terminated\n\nand KVM produces a warning such as the following in the kernel log\n\n  kvm [17646]: load/store instruction decoding not implemented\n\nThe IoLib implementation provided by MdePkg/Library/BaseIoLibIntrinsic\nis based on C code, and when LTO is in effect, the MMIO accesses could\nbe merged with, e.g., manipulations of the loop counter, producing\nopcodes that KVM does not support for emulated MMIO.\n\nSo let's add a special ArmVirt flavor of this library that implements\nthat actual load/store operations in assembler, ensuring that the\ninstructions involved can be emulated by KVM.\n\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>\nAcked-by: Laszlo Ersek <lersek@redhat.com>\nReviewed-by: Liming Gao <liming.gao@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/4134f2bddcb68d2e20ed000cdf54abf3f1140904"},{"sha":"0b37c75e6944f3d3ded7bef1e10cf4df72386616","author":{"name":"Ard Biesheuvel","email":"66d3c5fdaeea7ff1f996ad04f2c45e08ab38e2f5@linaro.org"},"message":"ArmVirtPkg: switch to KVM safe IoLib implementation\n\nSwitch to the new IoLib implementation that will only use KVM\nsafe instructions to perform MMIO memory accesses.\n\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>\nReviewed-by: Laszlo Ersek <lersek@redhat.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/0b37c75e6944f3d3ded7bef1e10cf4df72386616"},{"sha":"3d7c6cfbab977e5c6f3e8dbcd9c7c0b72f7add8d","author":{"name":"Liming Gao","email":"6480311aeeb4b006862f6d13ebabddc03f51e507@intel.com"},"message":"MdePkg UefiLib: Use comparison logic to check UINTN parameter\n\nCommit d2aafe1e410c80d1046f2d1e743055882ead8489 changes the input parameter\nfrom BOOLEAN to UINTN. Its comparison logic should be updated.\n\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Liming Gao <liming.gao@intel.com>\nCc: Michael Kinney <michael.d.kinney@intel.com>\nReviewed-by: Star Zeng <star.zeng@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/3d7c6cfbab977e5c6f3e8dbcd9c7c0b72f7add8d"},{"sha":"2e3daaf68890a1ef31c24eaa5658202621bfd907","author":{"name":"Liming Gao","email":"6480311aeeb4b006862f6d13ebabddc03f51e507@intel.com"},"message":"IntelFrameworkPkg UefiLib: Use comparison logic to check UINTN parameter\n\nCommit cb96e7d4f7afdbaef0706f9251ae479639d85a28 changes the input parameter\nfrom BOOLEAN to UINTN. Its comparison logic should be updated.\n\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Liming Gao <liming.gao@intel.com>\nReviewed-by: Star Zeng <star.zeng@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/2e3daaf68890a1ef31c24eaa5658202621bfd907"},{"sha":"051bf6e0af59741116a3f68bce7ed6d79fc801ab","author":{"name":"Liming Gao","email":"6480311aeeb4b006862f6d13ebabddc03f51e507@intel.com"},"message":"MdeModulePkg Variable: Use comparison logic to check UINTN parameter\n\nCommit 180ac200da84785989443b06bcfa5db343c0bf7e changes the input parameter\nfrom BOOLEAN to UINTN. Its comparison logic should be updated.\n\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Liming Gao <liming.gao@intel.com>\nCc: Star Zeng <star.zeng@intel.com>\nReviewed-by: Star Zeng <star.zeng@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/051bf6e0af59741116a3f68bce7ed6d79fc801ab"},{"sha":"c25d3905523ae4961bb039b1aba597983f7e3e4e","author":{"name":"Ard Biesheuvel","email":"66d3c5fdaeea7ff1f996ad04f2c45e08ab38e2f5@linaro.org"},"message":"BaseTools/tools_def IA32: disable PIE code generation explicitly\n\nAs a security measure, some distros now build their GCC toolchains with\nPIE code generation enabled by default, because it is a prerequisite\nfor ASLR to be enabled when running the executable.\n\nThis typically results in slightly larger code, but it also generates\nELF relocations that our tooling cannot deal with, so let's disable it\nexplicitly when using GCC49 or later for IA32. (Note that this does not\napply to X64: it uses PIE code deliberately in some cases, and our\ntooling does deal with the resuling relocations)\n\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nAcked-by: Laszlo Ersek <lersek@redhat.com>\nReviewed-by: Liming Gao <liming.gao@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/c25d3905523ae4961bb039b1aba597983f7e3e4e"},{"sha":"37d533da76e24828dc9b4cf86fa4ef8ec47c22a7","author":{"name":"Dandan Bi","email":"1e8692d8ed8470b17e8ddd7612a0f029768dcb56@intel.com"},"message":"ShellPkg/Dp: make sure memory is freed before exit\n\nRun dp command now:\nFirstly it will get performance records from FPDT and then\nparse the DP command. And if encounter invalid parameters,\nit will exit directly. Thus the performance records got before\nare invalid. And what's worse is that the memory allocated in\ngetting performance records phase is not freed.\n\nThis patch update the code to parse the command firstly and\nthen get the performance records. And make sure that all the\nclean work has been done before exiting.\n\nCc: Liming Gao <liming.gao@intel.com>\nCc: Ruiyu Ni <ruiyu.ni@intel.com>\nCc: Jaben Carsey <jaben.carsey@intel.com>\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Dandan Bi <dandan.bi@intel.com>\nReviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/37d533da76e24828dc9b4cf86fa4ef8ec47c22a7"},{"sha":"d25cf17cea52ade0ab9e9e551cf8f03792ed1da5","author":{"name":"Dandan Bi","email":"1e8692d8ed8470b17e8ddd7612a0f029768dcb56@intel.com"},"message":"ShellPkg/Dp: Initialize summary date when run DP\n\nIssue:\nWhen run \"dp -s\" or (\"dp -v\") command in shell several times,\nthe summary reuslts are different each time.\n\nThe root cause is that the previous global data \"SummaryData\"\nis not cleaned when the dp command is callled next time.\nThis patch initializes the global data \"SummaryData\"\nwhen the dp dymanic command is called.\n\nCc: Liming Gao <liming.gao@intel.com>\nCc: Ruiyu Ni <ruiyu.ni@intel.com>\nCc: Jaben Carsey <jaben.carsey@intel.com>\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Dandan Bi <dandan.bi@intel.com>\nReviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/d25cf17cea52ade0ab9e9e551cf8f03792ed1da5"},{"sha":"5a56c0493955cf55e7eef96dbba815cfbb067d7d","author":{"name":"Dandan Bi","email":"1e8692d8ed8470b17e8ddd7612a0f029768dcb56@intel.com"},"message":"ShellPkg/Dp: Make the help info align with code\n\nCurrently in DP, the Trace mode is enabled by default.\nAnd the profile mode is not implemented. but the help info\nof DP tool doesn't match current implementation. Which will\nmake user confused. So now remove the unused source code\nrelated to the profile mode and update the help information\nof DP tool.\n\nV2: Remove the unused code related to profile mode.\n\nCc: Liming Gao <liming.gao@intel.com>\nCc: Ruiyu Ni <ruiyu.ni@intel.com>\nCc: Jaben Carsey <jaben.carsey@intel.com>\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Dandan Bi <dandan.bi@intel.com>\nReviewed-by: Liming Gao <liming.gao@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/5a56c0493955cf55e7eef96dbba815cfbb067d7d"},{"sha":"46e4b3940e2f1862aa605900616a543a43f17222","author":{"name":"Yunhua Feng","email":"30f155ac2c906e2f65128830f2d4e1131c71dfbf@intel.com"},"message":"BaseTools: Fix one bug of nest !include parser\n\nThe case is DSC file include file1, file1 include file2, after parse\nfile2 finished, DSC parser get the wrong section type, then it would\nreport invalid error.\n\nCc: Liming Gao <liming.gao@intel.com>\nCc: Yonghong Zhu <yonghong.zhu@intel.com>\nContributed-under: TianoCore Contribution Agreement 1.1\nSigned-off-by: Yunhua Feng <yunhuax.feng@intel.com>\nReviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>\nTested-by: Michael D Kinney <michael.d.kinney@intel.com>","distinct":true,"url":"https://api.github.com/repos/gsomlo/edk2/commits/46e4b3940e2f1862aa605900616a543a43f17222"}]}
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