{"action":"created","issue":{"url":"https://api.github.com/repos/sinara-hw/Stabilizer/issues/2","repository_url":"https://api.github.com/repos/sinara-hw/Stabilizer","labels_url":"https://api.github.com/repos/sinara-hw/Stabilizer/issues/2/labels{/name}","comments_url":"https://api.github.com/repos/sinara-hw/Stabilizer/issues/2/comments","events_url":"https://api.github.com/repos/sinara-hw/Stabilizer/issues/2/events","html_url":"https://github.com/sinara-hw/Stabilizer/issues/2","id":381952040,"node_id":"MDU6SXNzdWUzODE5NTIwNDA=","number":2,"title":"v1.0 rc1 design review","user":{"login":"hartytp","id":21218399,"node_id":"MDQ6VXNlcjIxMjE4Mzk5","avatar_url":"https://avatars0.githubusercontent.com/u/21218399?v=4","gravatar_id":"","url":"https://api.github.com/users/hartytp","html_url":"https://github.com/hartytp","followers_url":"https://api.github.com/users/hartytp/followers","following_url":"https://api.github.com/users/hartytp/following{/other_user}","gists_url":"https://api.github.com/users/hartytp/gists{/gist_id}","starred_url":"https://api.github.com/users/hartytp/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/hartytp/subscriptions","organizations_url":"https://api.github.com/users/hartytp/orgs","repos_url":"https://api.github.com/users/hartytp/repos","events_url":"https://api.github.com/users/hartytp/events{/privacy}","received_events_url":"https://api.github.com/users/hartytp/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":null,"assignees":[],"milestone":null,"comments":24,"created_at":"2018-11-18T11:37:52Z","updated_at":"2018-11-18T13:54:05Z","closed_at":null,"author_association":"COLLABORATOR","body":"Schematic at https://github.com/sinara-hw/Stabilizer/files/2592309/Stabilizer.PDF\r\n\r\nReview of the main analog outputs (DAC):\r\n- [ ] Please move the 10R||10uF reference filter to between the reference and the buffer, not between the buffer and the DAC. The reason for this is that the DAC's reference input minimum resistance is only 7.5k, but very code-dependent. For Vref=4.096V, Iref=550uA, so the drop across the 10R resistor is 550uA*10R=5.5mV. 1LSB=4.096/2^16=62.5uV, so that's a very significant voltage drop, which will change a lot with the DAC code and hence kill the INL/DNL. The DAC must be driven directly from a reference buffer with very low impedance (50mOhm or so). \r\n- [ ] the DAC data sheet recommends 10uF||100nF on the DAC Vref pin. That's going to make the reference buffer oscillate if we're not careful. What do we do about this? The LTC6655 has very good low-frequency noise, but its broadband noise is 40nV/rtHz which is too high to connect directly to the DAC. Do we choose a different reference buffer? Do we try to isolate the buffer from the capacitive load with a fb (low DC resistance)? Or do we choose a different reference and drive the DAC directly from the reference (will this require a separate reference for each DAC to keep the cross-talk acceptable?)?\r\n- [ ] Might be better to use a 10R resistor on the VDlogic pin as well as/instead of the ferret bead to isolate the digital signal supply from the analog supply. That helps to isolate them even at the 1MHz update rate (where the ferrite doesn't do much).\r\n- [ ] The DAC data sheet also recommends 10uF tantalum caps near the DAC for both power supplies. Not sure if this is really necessary.\r\n- [ ] Isn't it possible to combine analog output filtering and gain into a single stage? That would allow us to eliminate an OpAmp and do the entire thing with a single dual OpAmp.\r\n- [ ] please annotate the schematic with the output filter characteristics (number of poles and 3dB bandwidth)\r\n- [ ] please can we increase the output filter 3dB BW to 500kHz. We should be able to run this board at 2MSPS update rate, so 330kHz is actually a bit slow (apologies, this is my fault for putting this too low in the original specification).\r\n- [ ] the johnson noise of the 5k resistors used on the DAC outputs is actually quite large. Is there a convenient resistor ladder with slightly lower impedance that we can use? If there isn't a convenient resistor ladder with slightly lower impedance then don't worry, these values will be ok.\r\n- [ ] please make sure to add test points on supply lines important digital signals (as we did in other projects)\r\n- [x] power sequencing looks good: microprocessor won't drive the DAC SPI lines until after the DAC's 5V supply is on; DAC output is high impedance so won't damage the OpAmps; reference has proper power sequencing. So I don't think there will be any issues here!\r\n\r\nSome context here:\r\n- Our group will likely need Fastino at some point in the next year or so\r\n- I'd like to use exactly the same DAC and AFE for Fastino that we use here (without any modification) if possible so that we can kill two birds with one stone\r\n- For Fastino, we will need a lot of channels so space, cost, power consumption, cross-talk are all quite important. That's why I want to minimise the number of OpAmps and find a decent way of doing the reference buffering"},"comment":{"url":"https://api.github.com/repos/sinara-hw/Stabilizer/issues/comments/439694522","html_url":"https://github.com/sinara-hw/Stabilizer/issues/2#issuecomment-439694522","issue_url":"https://api.github.com/repos/sinara-hw/Stabilizer/issues/2","id":439694522,"node_id":"MDEyOklzc3VlQ29tbWVudDQzOTY5NDUyMg==","user":{"login":"hartytp","id":21218399,"node_id":"MDQ6VXNlcjIxMjE4Mzk5","avatar_url":"https://avatars0.githubusercontent.com/u/21218399?v=4","gravatar_id":"","url":"https://api.github.com/users/hartytp","html_url":"https://github.com/hartytp","followers_url":"https://api.github.com/users/hartytp/followers","following_url":"https://api.github.com/users/hartytp/following{/other_user}","gists_url":"https://api.github.com/users/hartytp/gists{/gist_id}","starred_url":"https://api.github.com/users/hartytp/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/hartytp/subscriptions","organizations_url":"https://api.github.com/users/hartytp/orgs","repos_url":"https://api.github.com/users/hartytp/repos","events_url":"https://api.github.com/users/hartytp/events{/privacy}","received_events_url":"https://api.github.com/users/hartytp/received_events","type":"User","site_admin":false},"created_at":"2018-11-18T13:54:05Z","updated_at":"2018-11-18T13:54:05Z","author_association":"COLLABORATOR","body":"One other slight nit pick:\r\n- [ ] let's call them DI0 and DI1, not \"adc trigger\" and \"dac trigger\" (they can be used for different things in fw so let's keep the names general)"}}
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