{"push_id":2807061678,"size":21,"distinct_size":21,"ref":"refs/heads/mymesa2","head":"2ea7034fa3921e865807f15f7b8c5af5beeaca8b","before":"dc137a0d57d3fad82e9c13b4600196a1f41949d3","commits":[{"sha":"f9415d760af0bfd00b579c96e5ac866db43e38fe","author":{"name":"Mathieu Bridon","email":"b873478aa5c7f490f41f7fb10dbb7f0ee789f5fc@daitauha.fr"},"message":"python: Help Python 2 print the line\n\nReviewed-by: Jose Fonseca <jfonseca@vmware>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/f9415d760af0bfd00b579c96e5ac866db43e38fe"},{"sha":"459ec5265c18d1aa3623e1a21e31cf46c6a942e1","author":{"name":"Mathieu Bridon","email":"b873478aa5c7f490f41f7fb10dbb7f0ee789f5fc@daitauha.fr"},"message":"python: Open the template as text, with an explicit encoding\n\nIn commit bd27203f4d808763ac24ac94eb677cacf3e7cb99 we changed this to\nopen in binary mode, to then explicitly decode the lines with the right\nencoding.\n\nUnfortunately, that broke the build on Windows, where the template file\ncan have '\\r\\n' as line terminators: opening in binary mode would keep\nthose terminators and break the regexp.\n\nWe need to go back to text mode, where the \"universal newlines\" mode\ntakes care of this.\n\nHowever, to fix the initial issue, let's specify the encoding explicitly\nwhen opening the file, and make sure it is open in text mode, so we only\nget unicode strings.\n\nReviewed-by: Jose Fonseca <jfonseca@vmware>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/459ec5265c18d1aa3623e1a21e31cf46c6a942e1"},{"sha":"320dacb0a051cd1736e0976f70467b68281edfbf","author":{"name":"Jason Ekstrand","email":"b186559eaedf698788888c8a2559b4efb4db10d6@intel.com"},"message":"anv/lower_ycbcr: Use the binding array size for bounds checks\n\nBecause lower_ycbcr gets called before apply_pipeline_layout, the\nindices are all logical and the binding layout HW size is actually too\nbig for the bounds check.  We should just use the regular logical array\nsize instead.\n\nFixes: f3e91e78a33 \"anv: add nir lowering pass for ycbcr textures\"\nReviewed-by: Timothy Arceri <tarceri@itsqueeze.com>\nReviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/320dacb0a051cd1736e0976f70467b68281edfbf"},{"sha":"4af1a8c9e46e7a748388cf90efdfb93ba70dd585","author":{"name":"Jason Ekstrand","email":"b186559eaedf698788888c8a2559b4efb4db10d6@intel.com"},"message":"anv/apply_pipeline_layout: Add to the bind map instead of replacing it\n\nThis commit makes three changes.  One is to only walk the descriptors once\nand set bind map sizes at the same time as filling out the entries.  The\nsecond is to make the pass additive so that we can put stuff in the bind\nmap before applying the pipeline layout.  Third, we switch to using\ndesignated initializers.\n\nReviewed-by: Timothy Arceri <tarceri@itsqueeze.com>\nReviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/4af1a8c9e46e7a748388cf90efdfb93ba70dd585"},{"sha":"2e4094cd8f7c05a2949add549f80465853b98c81","author":{"name":"Jason Ekstrand","email":"b186559eaedf698788888c8a2559b4efb4db10d6@intel.com"},"message":"anv/pipeline: Use more fields from stage in compile_cs\n\nReviewed-by: Timothy Arceri <tarceri@itsqueeze.com>\nReviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/2e4094cd8f7c05a2949add549f80465853b98c81"},{"sha":"f210a5f4bb868ad5ae70c5fb3912f3a241305666","author":{"name":"Jason Ekstrand","email":"b186559eaedf698788888c8a2559b4efb4db10d6@intel.com"},"message":"anv/pipeline: Set tess IO read/written key fields in compile_*\n\nWe want these to be set as close to the final compile as possible so\nthat they are guaranteed to happen after nir_shader_gather_info is\ncalled.  The next commit is going to move nir_shader_gather_info to\nafter the linking step which makes this necessary.\n\nReviewed-by: Timothy Arceri <tarceri@itsqueeze.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/f210a5f4bb868ad5ae70c5fb3912f3a241305666"},{"sha":"d9ea015ced39bab7fb32cc772307c4fb647403bd","author":{"name":"Jason Ekstrand","email":"b186559eaedf698788888c8a2559b4efb4db10d6@intel.com"},"message":"anv/pipeline: Lower pipeline layouts etc. after linking\n\nThis allows us to use the link-optimized shader for determining binding\ntable layouts and, more importantly, URB layouts.  For apps running on\nDXVK, this is extremely important as DXVK likes to declare max-size\ninputs and outputs and this lets is massively shrink our URB space\nrequirements.\n\nVkPipeline-db results (Batman pipelines only) on KBL:\n\n    total instructions in shared programs: 820403 -> 790008 (-3.70%)\n    instructions in affected programs: 273759 -> 243364 (-11.10%)\n    helped: 622\n    HURT: 42\n\n    total spills in shared programs: 8449 -> 5212 (-38.31%)\n    spills in affected programs: 3427 -> 190 (-94.46%)\n    helped: 607\n    HURT: 2\n\n    total fills in shared programs: 11638 -> 6067 (-47.87%)\n    fills in affected programs: 5879 -> 308 (-94.76%)\n    helped: 606\n    HURT: 3\n\nLooking at shaders by hand, it makes the URB between TCS and TES go from\ncontaining 32 per-vertex varyings per tessellation shader pair to a more\nreasonable 8-12.  For a 3-vertex patch, that's at least half the URB\nspace no matter how big the patch section is.\n\nReviewed-by: Timothy Arceri <tarceri@itsqueeze.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/d9ea015ced39bab7fb32cc772307c4fb647403bd"},{"sha":"0da417129e070193091452c8ffdec4df12070bc6","author":{"name":"Emil Velikov","email":"f20878473f414da183da19ee25c8722cc1d711e4@collabora.com"},"message":"xmlconfig: refine driParseConfigFiles to use parseOneConfigFile\n\nAlso prepare for the usage of following parseConfigDir patch.\n\nSigned-off-by: Qiang Yu <Qiang.Yu@amd.com>\nAcked-by: Michel Dänzer <michel.daenzer@amd.com>\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>\n[Emil: add #include <limits.h>]\nSigned-off-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/0da417129e070193091452c8ffdec4df12070bc6"},{"sha":"04bdbbcab3c4862bf3f54ce60fcc1d2007776f80","author":{"name":"Qiang Yu","email":"2e0212506c877faea92b394abc2e806e11aa9198@amd.com"},"message":"xmlconfig: read more config files from drirc.d/\n\nDriver and application can put their drirc files in\n${datadir}/drirc.d/ with name xxx.conf. Config files\nwill be read and applied in file name alphabetic order.\n\nSo there are three places for drirc listed in order:\n1. /usr/share/drirc.d/\n2. /etc/drirc\n3. ~/.drirc\n\nv4:\n  fix meson build\n\nv3:\n  1. seperate driParseConfigFiles refine into another patch\n  2. fix entries[i] mem leak\n\nv2:\n  drop /etc/drirc.d\n\nSigned-off-by: Qiang Yu <Qiang.Yu@amd.com>\nAcked-by: Michel Dänzer <michel.daenzer@amd.com>\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/04bdbbcab3c4862bf3f54ce60fcc1d2007776f80"},{"sha":"30b10dbb7c6f6bdf3e489620f8333c727bd3a6dd","author":{"name":"Qiang Yu","email":"2e0212506c877faea92b394abc2e806e11aa9198@amd.com"},"message":"driconf: move ${sysconfdir}/drirc to ${datadir}/drirc.d/00-mesa-defaults.conf\n\n${sysconfdir} is for store admin config files, so move\nthis mesa default config file to ${datadir}/drirc.d.\n\nSigned-off-by: Qiang Yu <Qiang.Yu@amd.com>\nAcked-by: Michel Dänzer <michel.daenzer@amd.com>\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/30b10dbb7c6f6bdf3e489620f8333c727bd3a6dd"},{"sha":"e8b91e99e9965fa717be25da66fba0cdc3aef5dc","author":{"name":"Qiang Yu","email":"2e0212506c877faea92b394abc2e806e11aa9198@amd.com"},"message":"loader: abstract loader_get_kernel_driver_name for reuse\n\nThis function can be shared by the following kernel_driver\ndrirc patch.\n\nSigned-off-by: Qiang Yu <Qiang.Yu@amd.com>\nAcked-by: Michel Dänzer <michel.daenzer@amd.com>\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/e8b91e99e9965fa717be25da66fba0cdc3aef5dc"},{"sha":"3bbe180b982639554685c997ff51a7cbbf3247e6","author":{"name":"Qiang Yu","email":"2e0212506c877faea92b394abc2e806e11aa9198@amd.com"},"message":"xmlconfig: add kernel_driver device attribute\n\nThis attribute can be used by loader to apply different\noption to device use specific kernel driver.\n\nSigned-off-by: Qiang Yu <Qiang.Yu@amd.com>\nAcked-by: Michel Dänzer <michel.daenzer@amd.com>\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/3bbe180b982639554685c997ff51a7cbbf3247e6"},{"sha":"0aa80abf257edde027378b6826e60fa8088ac3df","author":{"name":"Qiang Yu","email":"2e0212506c877faea92b394abc2e806e11aa9198@amd.com"},"message":"loader: add dri_driver option to override dri driver to load\n\ndrirc implementation of MESA_LOADER_DRIVER_OVERRIDE which can be\nused to override dri driver to load.\n\nUsage:\n\noverride dri driver for device with spec kernel driver name:\n\n<device kernel_driver=\"kernel_driver_name\">\n  <option name=\"dri_driver\" value=\"new_dri_driver\" />\n</device>\n\nor\n\n<device driver=\"loader\" kernel_driver=\"kernel_driver_name\">\n  <option name=\"dri_driver\" value=\"new_dri_driver\" />\n</device>\n\nv2:\n  add kernel_driver device attribute to specify kernel\n  driver name instead of reuse driver attribute\n\nv3:\n  seperate loader_get_kernel_driver_name into another patch\n  seperate add kernel_driver attribute into another patch\n\nSuggested-by: Michel Dänzer <michel@daenzer.net>\nSigned-off-by: Qiang Yu <Qiang.Yu@amd.com>\nAcked-by: Michel Dänzer <michel.daenzer@amd.com>\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>\n[v4 Emil: add HAVE_LIBDRM guard around __driConfigOptionsLoader and\nloader_get_dri_config_driver]\nSigned-off-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/0aa80abf257edde027378b6826e60fa8088ac3df"},{"sha":"9baff597ce021f7691187b0d1d1bbc16d07b13e1","author":{"name":"Ray Strode","email":"6caf3e77c6c00db1e35514851c9d38cba84b0ba7@redhat.com"},"message":"gallium/winsys/kms: don't unmap what wasn't mapped\n\nAt the moment, depending on pipe transfer flags, the dumb\nbuffer map address can end up at either kms_sw_dt->ro_mapped\nor kms_sw_dt->mapped.\n\nWhen it's time to unmap the dumb buffer, both locations get unmapped,\neven though one is probably initialized to 0.\n\nThat leads to the code segment getting unmapped at runtime and\ncrashes when trying to call into unrelated code.\n\nThis commit addresses the problem by using MAP_FAILED instead of\nNULL for ro_mapped and mapped when the dumb buffer is unmapped,\nand only unmapping mapped addresses at unmap time.\n\nBugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107098\nSigned-off-by: Ray Strode <rstrode@redhat.com>\nFixes: d891f28df9a (\"gallium/winsys/kms: Fix possible leak in map/unmap.\")\nCc: Lepton Wu <lepton@chromium.org>\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/9baff597ce021f7691187b0d1d1bbc16d07b13e1"},{"sha":"d0803dea11233ee4df079fbf6bba40e6f6cd2c2b","author":{"name":"Timothy Arceri","email":"c48760dafc316d20cf5b0817150c999e82cd892f@itsqueeze.com"},"message":"nir: allow more nested loops to be unrolled\n\nThe innermost check was added to stop us from unrolling multiple\nloops in a single pass, and to stop outer loops from unrolling.\n\nWhen we successfully unroll a loop we need to run the analysis\npass again before deciding if we want to go ahead an unroll a\nsecond loop.\n\nHowever the logic was flawed because it never tried to unroll any\nnested loops other than the first innermost loop it found.\nIf this innermost loop is not unrolled we end up skipping all\nother nested loops.\n\nThis unrolls a loop in a Deus Ex: MD shader on ultra settings and\nalso unrolls a loop in a shader from the game Prey when running\non DXVK.\n\nReviewed-by: Jason Ekstrand <jason@jlekstrand.net>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/d0803dea11233ee4df079fbf6bba40e6f6cd2c2b"},{"sha":"3f9d8e9c88eb9d95b4637d0b65008cf62527b08b","author":{"name":"Timothy Arceri","email":"c48760dafc316d20cf5b0817150c999e82cd892f@itsqueeze.com"},"message":"util: better handle program names from wine\n\nFor some reason wine will sometimes give us a windows style path\nfor an application. For example when running the 64bit version\nof Rage wine gives a Unix style path, but when running the 32bit\nversion is gives a windows style path.\n\nIf we detect no '/' in the path at all it should be safe to\nassume we have a wine application and instead look for a '\\'.\n\nReviewed-by: Eric Engestrom <eric.engestrom@intel.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/3f9d8e9c88eb9d95b4637d0b65008cf62527b08b"},{"sha":"0da93de9c85d27cf7df000a950894aa8605dd951","author":{"name":"Timothy Arceri","email":"c48760dafc316d20cf5b0817150c999e82cd892f@itsqueeze.com"},"message":"util: add drirc workarounds for RAGE\n\nThis allows the game to run on wine (tested on radeonsi where we\nhave compat profile support).","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/0da93de9c85d27cf7df000a950894aa8605dd951"},{"sha":"9387ca29ae465f5e1ee3b4a73c1f7725304bb30e","author":{"name":"Kai Wasserbäch","email":"31ea678c44dc4e8e22ccfd165592dd71a30e46ae@dev.carbon-project.org"},"message":"util: mark s as MAYBE_UNUSED in _mesa_half_to_unorm8\n\nOnly used, when asserts are enabled.\n\nFixes an unused-variable warning with gcc-8:\n ../../../src/util/half_float.c: In function '_mesa_half_to_unorm8':\n ../../../src/util/half_float.c:189:14: warning: unused variable 's' [-Wunused-variable]\n     const int s = (val >> 15) & 0x1;\n               ^\n\nSigned-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>\nReviewed-by: Timothy Arceri <tarceri@itsqueeze.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/9387ca29ae465f5e1ee3b4a73c1f7725304bb30e"},{"sha":"6f0647c0b207cfe0805eb899c2d97703ae00b1e7","author":{"name":"Kai Wasserbäch","email":"31ea678c44dc4e8e22ccfd165592dd71a30e46ae@dev.carbon-project.org"},"message":"nir: mark *prev_block as MAYBE_UNUSED in opt_peel_loop_initial_if\n\nOnly used, when asserts are enabled.\n\nFixes an unused-variable warning with gcc-8:\n ../../../src/compiler/nir/nir_opt_if.c: In function 'opt_peel_loop_initial_if':\n ../../../src/compiler/nir/nir_opt_if.c:109:15: warning: unused variable 'prev_block' [-Wunused-variable]\n     nir_block *prev_block =\n                ^~~~~~~~~~\n\nSigned-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>\nReviewed-by: Timothy Arceri <tarceri@itsqueeze.com>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/6f0647c0b207cfe0805eb899c2d97703ae00b1e7"},{"sha":"2c020dbf063b55d96b1e799fb8dd6ec335b84c33","author":{"name":"Kai Wasserbäch","email":"31ea678c44dc4e8e22ccfd165592dd71a30e46ae@dev.carbon-project.org"},"message":"vulkan/wsi: initialise image_index to 0 in x11_manage_fifo_queues\n\nSupresses a maybe-uninitialized warning with GCC 8.\n\nNote: image_index should always be initialised due to the result check,\n      but the compiler doesn't see that.\n\nSigned-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>\nReviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>","distinct":true,"url":"https://api.github.com/repos/bendat78/mymesa/commits/2c020dbf063b55d96b1e799fb8dd6ec335b84c33"}]}
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