{"push_id":2676606173,"size":58,"distinct_size":0,"ref":"refs/heads/master","head":"00928a421d47f49691cace1207481b7aad31b1f1","before":"595123df1d54ed8fbab9e1a73d5a58c5bb71058f","commits":[{"sha":"ed78467a214595a63af7800a073a03ffe37cd7db","author":{"name":"Babu Moger","email":"fc83b762ab7666c2f8f765f26b2c5088d16d49d7@amd.com"},"message":"i386: Add support for CPUID_8000_001E for AMD\n\nAdd support for cpuid leaf CPUID_8000_001E. Build the config that closely\nmatch the underlying hardware. Please refer to the Processor Programming\nReference (PPR) for AMD Family 17h Model for more details.\n\nSigned-off-by: Babu Moger <babu.moger@amd.com>\nMessage-Id: <1528498581-131037-2-git-send-email-babu.moger@amd.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/ed78467a214595a63af7800a073a03ffe37cd7db"},{"sha":"081492ca8ab23f90d56414595ecfd09ddbacb8f6","author":{"name":"Daniel P. Berrangé","email":"bb938cf255e055ff3507f2627d214e8e62118fcf@redhat.com"},"message":"i386: improve alignment of CPU model listing\n\nSince the addition of the -IBRS CPU model variants, the descriptions\nshown by '-cpu help' are not well aligned, as several model names\noverflow the space allowed. Right aligning the CPU model names is also\nnot attractive, because it obscures the common name prefixes of many\nmodels. The CPU model name field needs to be 4 characters larger, and\nbe left aligned instead.\n\nSigned-off-by: Daniel P. Berrangé <berrange@redhat.com>\nMessage-Id: <20180606165527.17365-2-berrange@redhat.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/081492ca8ab23f90d56414595ecfd09ddbacb8f6"},{"sha":"c7dbff4b3a6655f4769e6d283f34191122450384","author":{"name":"Daniel P. Berrangé","email":"bb938cf255e055ff3507f2627d214e8e62118fcf@redhat.com"},"message":"i386: improve sorting of CPU model names\n\nThe current list of CPU model names output by \"-cpu help\" is sorted\nalphabetically based on the internal QOM class name. The text that is\ndisplayed, however, uses the CPU model name, which is equivalent to the\nQOM class name, minus a suffix. Unfortunately that suffix has an effect\non the sort ordering, for example, causing the various Broadwell\nvariants to appear reversed:\n\n  x86 486\n  x86 Broadwell-IBRS        Intel Core Processor (Broadwell, IBRS)\n  x86 Broadwell-noTSX-IBRS  Intel Core Processor (Broadwell, no TSX, IBRS\n  x86 Broadwell-noTSX       Intel Core Processor (Broadwell, no TSX)\n  x86 Broadwell             Intel Core Processor (Broadwell)\n  x86 Conroe                Intel Celeron_4x0 (Conroe/Merom Class Core 2)\n\nBy sorting on the actual CPU model name text that is displayed, the\nresult is\n\n  x86 486\n  x86 Broadwell             Intel Core Processor (Broadwell)\n  x86 Broadwell-IBRS        Intel Core Processor (Broadwell, IBRS)\n  x86 Broadwell-noTSX       Intel Core Processor (Broadwell, no TSX)\n  x86 Broadwell-noTSX-IBRS  Intel Core Processor (Broadwell, no TSX, IBRS)\n  x86 Conroe                Intel Celeron_4x0 (Conroe/Merom Class Core 2)\n\nThis requires extra string allocations during sorting, but this is not a\nconcern given the usage scenario and the number of CPU models that exist.\n\nSigned-off-by: Daniel P. Berrangé <berrange@redhat.com>\nMessage-Id: <20180606165527.17365-3-berrange@redhat.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/c7dbff4b3a6655f4769e6d283f34191122450384"},{"sha":"cc643b1e7898414b56f551bbd42d4ed8c2ae127a","author":{"name":"Daniel P. Berrangé","email":"bb938cf255e055ff3507f2627d214e8e62118fcf@redhat.com"},"message":"i386: display known CPUID features linewrapped, in alphabetical order\n\nWhen using '-cpu help' the list of CPUID features is grouped according\nto the internal low level CPUID grouping. The data printed results in\nvery long lines too.\n\nThis combines to make it hard for users to read the output and identify\nif QEMU knows about the feature they wish to use.\n\nThis change gets rid of the grouping of features and treats all flags as\nsingle list. The list is sorted into alphabetical order and the printing\nwith line wrapping at the 77th column.\n\nSigned-off-by: Daniel P. Berrangé <berrange@redhat.com>\nMessage-Id: <20180606165527.17365-4-berrange@redhat.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/cc643b1e7898414b56f551bbd42d4ed8c2ae127a"},{"sha":"f1a23522b03a569f13aad49294bb4c4b1a9500c7","author":{"name":"Eduardo Habkost","email":"50373d7c08ceadf576dd7dca718012445b677ce6@redhat.com"},"message":"i386: Remove osxsave CPUID flag name\n\nOSXAVE is not a static feature flag: it changes dynamically at\nruntime depending on CR4, and it was never configurable: KVM\nnever returned OSXSAVE on GET_SUPPORTED_CPUID, and it is not\nincluded in TCG_EXT_FEATURES.\n\nRemove OSXSAVE from the feature name array so users don't try to\nconfigure it manually.\n\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>\nMessage-Id: <20180611203855.13269-1-ehabkost@redhat.com>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/f1a23522b03a569f13aad49294bb4c4b1a9500c7"},{"sha":"9ccb9784b57804f5c74434ad6ccb66650a015ffc","author":{"name":"Eduardo Habkost","email":"50373d7c08ceadf576dd7dca718012445b677ce6@redhat.com"},"message":"i386: Remove ospke CPUID flag name\n\nOSPKE is not a static feature flag: it changes dynamically at\nruntime depending on CR4, and it was never configurable: KVM\nnever returned OSPKE on GET_SUPPORTED_CPUID, and on TCG enables\nit automatically if CR4_PKE_MASK is set.\n\nRemove OSPKE from the feature name array so users don't try to\nconfigure it manually.\n\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>\nMessage-Id: <20180611203712.12086-1-ehabkost@redhat.com>\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/9ccb9784b57804f5c74434ad6ccb66650a015ffc"},{"sha":"a764f3f7197f4d7ad8fe8424269933de912224cb","author":{"name":"Konrad Rzeszutek Wilk","email":"da3a51b335cef0eb0e2c329c5ef6bcd6acef687a@oracle.com"},"message":"i386: define the AMD 'amd-ssbd' CPUID feature bit\n\nAMD future CPUs expose _two_ ways to utilize the Intel equivalant\nof the Speculative Store Bypass Disable. The first is via\nthe virtualized VIRT_SPEC CTRL MSR (0xC001_011f) and the second\nis via the SPEC_CTRL MSR (0x48). The document titled:\n124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf\n\ngives priority of SPEC CTRL MSR over the VIRT SPEC CTRL MSR.\n\nA copy of this document is available at\n      https://bugzilla.kernel.org/show_bug.cgi?id=199889\n\nAnyhow, this means that on future AMD CPUs there will be  _two_ ways to\ndeal with SSBD.\n\nSigned-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>\nMessage-Id: <20180601153809.15259-2-konrad.wilk@oracle.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/a764f3f7197f4d7ad8fe8424269933de912224cb"},{"sha":"254790a909a2f153d689bfa7d8e8f0386cda870d","author":{"name":"Konrad Rzeszutek Wilk","email":"da3a51b335cef0eb0e2c329c5ef6bcd6acef687a@oracle.com"},"message":"i386: Define AMD's no SSB mitigation needed.\n\nAMD future CPUs expose a mechanism to tell the guest that the\nSpeculative Store Bypass Disable is not needed and that the\nCPU is all good.\n\nThis is exposed via the CPUID 8000_0008.EBX[26] bit.\n\nSee 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf\n\nA copy of this document is available at\n        https://bugzilla.kernel.org/show_bug.cgi?id=199889\n\nSigned-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>\nMessage-Id: <20180601153809.15259-3-konrad.wilk@oracle.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/254790a909a2f153d689bfa7d8e8f0386cda870d"},{"sha":"f98bbd8304112187cafc3e636c31b2a3865d2717","author":{"name":"Babu Moger","email":"fc83b762ab7666c2f8f765f26b2c5088d16d49d7@amd.com"},"message":"i386: Allow TOPOEXT to be enabled on older kernels\n\nEnabling TOPOEXT feature might cause compatibility issues if\nolder kernels does not set this feature. Lets set this feature\nunconditionally.\n\nSigned-off-by: Babu Moger <babu.moger@amd.com>\nMessage-Id: <1528939107-17193-2-git-send-email-babu.moger@amd.com>\n[ehabkost: rewrite comment and commit message]\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/f98bbd8304112187cafc3e636c31b2a3865d2717"},{"sha":"631be32155dbafa1fe886f2488127956c9120ba6","author":{"name":"Babu Moger","email":"fc83b762ab7666c2f8f765f26b2c5088d16d49d7@amd.com"},"message":"i386: Fix up the Node id for CPUID_8000_001E\n\nThis is part of topoext support. To keep the compatibility, it is better\nwe support all the combination of nr_cores and nr_threads currently\nsupported. By allowing more nr_cores and nr_threads, we might end up with\nmore nodes than we can actually support with the real hardware. We need to\nfix up the node id to make this work. We can achieve this by shifting the\nsocket_id bits left to address more nodes.\n\nSigned-off-by: Babu Moger <babu.moger@amd.com>\nMessage-Id: <1529443919-67509-2-git-send-email-babu.moger@amd.com>\nReviewed-by: Eduardo Habkost <ehabkost@redhat.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/631be32155dbafa1fe886f2488127956c9120ba6"},{"sha":"e00516475c270dcb6705753da96063f95699abf2","author":{"name":"Babu Moger","email":"fc83b762ab7666c2f8f765f26b2c5088d16d49d7@amd.com"},"message":"i386: Enable TOPOEXT feature on AMD EPYC CPU\n\nEnable TOPOEXT feature on EPYC CPU. This is required to support\nhyperthreading on VM guests. Also extend xlevel to 0x8000001E.\n\nDisable topoext on PC_COMPAT_2_12 and keep xlevel 0x8000000a.\n\nSigned-off-by: Babu Moger <babu.moger@amd.com>\nMessage-Id: <1529443919-67509-3-git-send-email-babu.moger@amd.com>\n[ehabkost: Added EPYC-IBPB.xlevel to PC_COMPAT_2_12]\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/e00516475c270dcb6705753da96063f95699abf2"},{"sha":"6b2942f966d5e54c37d305c80f5f98d504c2bc55","author":{"name":"Babu Moger","email":"fc83b762ab7666c2f8f765f26b2c5088d16d49d7@amd.com"},"message":"i386: Remove generic SMT thread check\n\nRemove generic non-intel check while validating hyperthreading support.\nCertain AMD CPUs can support hyperthreading now.\n\nCPU family with TOPOEXT feature can support hyperthreading now.\n\nSigned-off-by: Babu Moger <babu.moger@amd.com>\nTested-by: Geoffrey McRae <geoff@hostfission.com>\nReviewed-by: Eduardo Habkost <ehabkost@redhat.com>\nMessage-Id: <1529443919-67509-4-git-send-email-babu.moger@amd.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/6b2942f966d5e54c37d305c80f5f98d504c2bc55"},{"sha":"2ee3518b53cd82bca10448283bd8fe5a259c27b1","author":{"name":"Igor Mammedov","email":"376726f239c919d31d97c9332191663ab16d47b5@redhat.com"},"message":"vl.c: do not allow --daemonize in combination with --preconfig CLI option\n\nsome users when using --daemonize expect that QEMU will parse CLI options,\ninitialize VM and only then complete daemonzation by signalling lead\nprocess to exit and start listening on monitor socket. So users treat\nparent process exit as sync point to connect to QEMU's monitor.\n\nThat however doesn't work when --preconfig options is used, since it\nprovides monitor before completing daemonization and expects user to\nissue exit-preconfig command when additional configuration via monitor\nis finished. We also can't move completing daemonization before\npreconfig monitor becomes available, since that would imply:\n  * partially loosing ability to configure QEMU instance in --preconfig\n    mode since QEMU might drop privileges, chroot and do other things\n    when daemonization is completed\n  * lead to loss of error messages in case they would happen after\n    daemonization\n\nBe proactive now and make options mutually exclusive, so users would\nget clear error message instead of waiting for lead process exit\nindefinitely before connecting to monitor.\n\nPS:\nIn case someone would come up with usecase where both options should\nbe enabled at the same time we could drop this restriction as far\nas daemonization point is left where it is now (os_setup_post).\n\nSigned-off-by: Igor Mammedov <imammedo@redhat.com>\nMessage-Id: <1529501059-163139-1-git-send-email-imammedo@redhat.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/2ee3518b53cd82bca10448283bd8fe5a259c27b1"},{"sha":"08fe68244eb44f3c8ccecd35066eca8392d1345a","author":{"name":"Thomas Huth","email":"9e65be74847981e55b2564b6266c57d86d3bac05@redhat.com"},"message":"hw/i386: Deprecate the machine types pc-0.10 and pc-0.11\n\nThe oldest machine type which is still used in a still maintained distro\nis a pc-0.12 based machine type in RHEL6, so everything that is older\nthan pc-0.12 should not be used anymore. Thus let's deprecate pc-0.10\nand pc-0.11 so that we can finally remove them in a future release.\n\nReviewed-by: Eduardo Habkost <ehabkost@redhat.com>\nSigned-off-by: Thomas Huth <thuth@redhat.com>\nMessage-Id: <1529917512-10528-1-git-send-email-thuth@redhat.com>\nReviewed-by: Markus Armbruster <armbru@redhat.com>\nSigned-off-by: Eduardo Habkost <ehabkost@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/08fe68244eb44f3c8ccecd35066eca8392d1345a"},{"sha":"0b6e9aa89e02c8b213af019aad816e00ba8243f8","author":{"name":"Eduardo Habkost","email":"50373d7c08ceadf576dd7dca718012445b677ce6@redhat.com"},"message":"Merge branch 'master' of git://git.qemu.org/qemu into x86-next","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/0b6e9aa89e02c8b213af019aad816e00ba8243f8"},{"sha":"e409d9a158c77c650651e8118f6c86c8dc76eba6","author":{"name":"Peter Maydell","email":"313afa09ce093b19ae1dd74f57c1ebd94508584c@linaro.org"},"message":"Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging\n\nx86 queue, 2018-06-25\n\n* Add TOPOEXT feature to EPYC CPU model\n* AMD's amd-ssbd and amd-no-ssbd CPUID features\n* Removed unused CPUID flag names: ospke, osxsave\n* Better formatting of '-cpu help'\n\n# gpg: Signature made Mon 25 Jun 2018 23:18:51 BST\n# gpg:                using RSA key 2807936F984DC5A6\n# gpg: Good signature from \"Eduardo Habkost <ehabkost@redhat.com>\"\n# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6\n\n* remotes/ehabkost/tags/x86-next-pull-request:\n  i386: Remove generic SMT thread check\n  i386: Enable TOPOEXT feature on AMD EPYC CPU\n  i386: Fix up the Node id for CPUID_8000_001E\n  i386: Allow TOPOEXT to be enabled on older kernels\n  i386: Define AMD's no SSB mitigation needed.\n  i386: define the AMD 'amd-ssbd' CPUID feature bit\n  i386: Remove ospke CPUID flag name\n  i386: Remove osxsave CPUID flag name\n  i386: display known CPUID features linewrapped, in alphabetical order\n  i386: improve sorting of CPU model names\n  i386: improve alignment of CPU model listing\n  i386: Add support for CPUID_8000_001E for AMD\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/e409d9a158c77c650651e8118f6c86c8dc76eba6"},{"sha":"54d208ffdae20fd2bee745a037607a762d3a82a9","author":{"name":"Gerd Hoffmann","email":"cad73e70082427fddc9be3baaf34e698dffd21c0@redhat.com"},"message":"Add gles support to egl-helpers, wire up in egl-headless and gtk.\n\nAdd support for OpenGL ES to egl-helpers.  Wire up the new option for\negl-headless and gtk UIs.  egl-headless actually works fine.  gtk hits a\nnot-yet implemented code path in libEGL when trying to use gles mode:\n\n  libEGL warning: FIXME: egl/x11 doesn't support front buffer rendering.\n\n(This is mesa 17.2.3).\n\nCc: Tomeu Vizoso <tomeu.vizoso@collabora.com>\nSigned-off-by: Gerd Hoffmann <kraxel@redhat.com>\nReviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>\nTested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>\nMessage-id: 20180618112141.23398-1-kraxel@redhat.com","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/54d208ffdae20fd2bee745a037607a762d3a82a9"},{"sha":"48db08cf1619afde2ad0f7df11ba3ba54c49112b","author":{"name":"Pavel Dovgalyuk","email":"6f98492d3efe138d04336f9dae34900616e2f0c7@ispras.ru"},"message":"sdl2: fix copypaste issues\n\nThis patch fixes text and mouse event processing. These functions used\n'key' field of the event instead of appropriate 'text', 'motion', 'button',\nor 'wheel'.\n\nSigned-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru>\nSigned-off-by: Maria Klimushenkova <maria.klimushenkova@ispras.ru>\nMessage-id: 20180626064017.17031.47954.stgit@pasha-VirtualBox\nSigned-off-by: Gerd Hoffmann <kraxel@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/48db08cf1619afde2ad0f7df11ba3ba54c49112b"},{"sha":"49213b721f4620364aa09142b5f4d559fed26b53","author":{"name":"Pavel Dovgalyuk","email":"6f98492d3efe138d04336f9dae34900616e2f0c7@ispras.ru"},"message":"sdl2: add checking for NULL\n\nSometimes SDL2 console can't be retrieved on events and scon variable\nbecomes NULL. This patch prevents processing of the events when the console\nis not available.\n\nSigned-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru>\nSigned-off-by: Maria Klimushenkova <maria.klimushenkova@ispras.ru>\nMessage-id: 20180626064729.18070.47600.stgit@pasha-VirtualBox\nSigned-off-by: Gerd Hoffmann <kraxel@redhat.com>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/49213b721f4620364aa09142b5f4d559fed26b53"},{"sha":"bd4e4a387aa733e40270a7406c7d111f2292de65","author":{"name":"Peter Maydell","email":"313afa09ce093b19ae1dd74f57c1ebd94508584c@linaro.org"},"message":"Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging\n\nMachine queue, 2018-06-25\n\n* Don't support --daemonize and --preconfig together\n* Deprecate machine types pc-0.10 and pc-0.11\n\n# gpg: Signature made Mon 25 Jun 2018 23:37:59 BST\n# gpg:                using RSA key 2807936F984DC5A6\n# gpg: Good signature from \"Eduardo Habkost <ehabkost@redhat.com>\"\n# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6\n\n* remotes/ehabkost/tags/machine-next-pull-request:\n  hw/i386: Deprecate the machine types pc-0.10 and pc-0.11\n  vl.c: do not allow --daemonize in combination with --preconfig CLI option\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/kraxel/qemu/commits/bd4e4a387aa733e40270a7406c7d111f2292de65"}]}
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