{"action":"created","issue":{"url":"https://api.github.com/repos/darklife/darkriscv/issues/8","repository_url":"https://api.github.com/repos/darklife/darkriscv","labels_url":"https://api.github.com/repos/darklife/darkriscv/issues/8/labels{/name}","comments_url":"https://api.github.com/repos/darklife/darkriscv/issues/8/comments","events_url":"https://api.github.com/repos/darklife/darkriscv/issues/8/events","html_url":"https://github.com/darklife/darkriscv/issues/8","id":388924930,"node_id":"MDU6SXNzdWUzODg5MjQ5MzA=","number":8,"title":"I think there is a mistake in the RTL code","user":{"login":"hyf6661669","id":18757974,"node_id":"MDQ6VXNlcjE4NzU3OTc0","avatar_url":"https://avatars2.githubusercontent.com/u/18757974?v=4","gravatar_id":"","url":"https://api.github.com/users/hyf6661669","html_url":"https://github.com/hyf6661669","followers_url":"https://api.github.com/users/hyf6661669/followers","following_url":"https://api.github.com/users/hyf6661669/following{/other_user}","gists_url":"https://api.github.com/users/hyf6661669/gists{/gist_id}","starred_url":"https://api.github.com/users/hyf6661669/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/hyf6661669/subscriptions","organizations_url":"https://api.github.com/users/hyf6661669/orgs","repos_url":"https://api.github.com/users/hyf6661669/repos","events_url":"https://api.github.com/users/hyf6661669/events{/privacy}","received_events_url":"https://api.github.com/users/hyf6661669/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":{"login":"samsoniuk","id":42520878,"node_id":"MDQ6VXNlcjQyNTIwODc4","avatar_url":"https://avatars2.githubusercontent.com/u/42520878?v=4","gravatar_id":"","url":"https://api.github.com/users/samsoniuk","html_url":"https://github.com/samsoniuk","followers_url":"https://api.github.com/users/samsoniuk/followers","following_url":"https://api.github.com/users/samsoniuk/following{/other_user}","gists_url":"https://api.github.com/users/samsoniuk/gists{/gist_id}","starred_url":"https://api.github.com/users/samsoniuk/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/samsoniuk/subscriptions","organizations_url":"https://api.github.com/users/samsoniuk/orgs","repos_url":"https://api.github.com/users/samsoniuk/repos","events_url":"https://api.github.com/users/samsoniuk/events{/privacy}","received_events_url":"https://api.github.com/users/samsoniuk/received_events","type":"User","site_admin":false},"assignees":[{"login":"samsoniuk","id":42520878,"node_id":"MDQ6VXNlcjQyNTIwODc4","avatar_url":"https://avatars2.githubusercontent.com/u/42520878?v=4","gravatar_id":"","url":"https://api.github.com/users/samsoniuk","html_url":"https://github.com/samsoniuk","followers_url":"https://api.github.com/users/samsoniuk/followers","following_url":"https://api.github.com/users/samsoniuk/following{/other_user}","gists_url":"https://api.github.com/users/samsoniuk/gists{/gist_id}","starred_url":"https://api.github.com/users/samsoniuk/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/samsoniuk/subscriptions","organizations_url":"https://api.github.com/users/samsoniuk/orgs","repos_url":"https://api.github.com/users/samsoniuk/repos","events_url":"https://api.github.com/users/samsoniuk/events{/privacy}","received_events_url":"https://api.github.com/users/samsoniuk/received_events","type":"User","site_admin":false}],"milestone":null,"comments":1,"created_at":"2018-12-08T14:03:17Z","updated_at":"2018-12-11T16:08:02Z","closed_at":null,"author_association":"NONE","body":"In darkriscv.v, the following code is used to choose the data that will be written into the register file:\r\n```\r\n REG[DPTR] <=   RES ? RESET_SP  :        // reset sp\r\n                       HLT ? REG[DPTR] :        // halt\r\n                     !DPTR ? 0 :                // x0 = 0, always!\r\n                     AUIPC ? NXPC+SIMM :\r\n                      JAL||\r\n                      JALR ? NXPC :\r\n                       LUI ? SIMM :\r\n                       LCC ? LDATA :\r\n                       MCC ? MDATA : \r\n                       RCC ? RDATA : \r\n                       CCC ? CDATA : \r\n                             REG[DPTR];\r\n```\r\nFor instruction \"AUIPC\", the data should be PC + SIMM. But I only tested it by using the core as a 2-stage CPU without cache. I hope you can have a look."},"comment":{"url":"https://api.github.com/repos/darklife/darkriscv/issues/comments/446258850","html_url":"https://github.com/darklife/darkriscv/issues/8#issuecomment-446258850","issue_url":"https://api.github.com/repos/darklife/darkriscv/issues/8","id":446258850,"node_id":"MDEyOklzc3VlQ29tbWVudDQ0NjI1ODg1MA==","user":{"login":"hyf6661669","id":18757974,"node_id":"MDQ6VXNlcjE4NzU3OTc0","avatar_url":"https://avatars2.githubusercontent.com/u/18757974?v=4","gravatar_id":"","url":"https://api.github.com/users/hyf6661669","html_url":"https://github.com/hyf6661669","followers_url":"https://api.github.com/users/hyf6661669/followers","following_url":"https://api.github.com/users/hyf6661669/following{/other_user}","gists_url":"https://api.github.com/users/hyf6661669/gists{/gist_id}","starred_url":"https://api.github.com/users/hyf6661669/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/hyf6661669/subscriptions","organizations_url":"https://api.github.com/users/hyf6661669/orgs","repos_url":"https://api.github.com/users/hyf6661669/repos","events_url":"https://api.github.com/users/hyf6661669/events{/privacy}","received_events_url":"https://api.github.com/users/hyf6661669/received_events","type":"User","site_admin":false},"created_at":"2018-12-11T16:08:02Z","updated_at":"2018-12-11T16:08:02Z","author_association":"NONE","body":"> Good point! I will check!\r\n\r\nBy the way, which simulation tools do you use for simulation? I am using ModelSim 10.4c, but the operator ```>>>``` for instruction ```SRA or SRAI``` doesn't work. It still performs \"shift right logical\"."}}
{"actor":{"display_login":"hyf6661669"}}