{"push_id":2322161336,"size":485,"distinct_size":485,"ref":"refs/heads/master","head":"d48fcbd864a008802a90c58a9ceddd9436d11a49","before":"f1517df8701c9f12dae9ce7f43a5d300a6917619","commits":[{"sha":"3a485c2be49dde899e506684bb5f06d5b3f73e82","author":{"name":"Juergen Gross","email":"d3dfe5c5fac772d904d4932d138136d040bb63c7@suse.com"},"message":"Merge tag 'v4.14' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/torvalds/linux\n\nLinux 4.14","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/3a485c2be49dde899e506684bb5f06d5b3f73e82"},{"sha":"cda2eaa35948893d70145490d5d6ded546fc3bc6","author":{"name":"Paul Mackerras","email":"b848d7d196719b06ca69c3524d28631335b2ab79@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Avoid shifts by negative amounts\n\nThe kvmppc_hpte_page_shifts function decodes the actual and base page\nsizes for a HPTE, returning -1 if it doesn't recognize the page size\nencoding.  This then gets used as a shift amount in various places,\nwhich is undefined behaviour.  This was reported by Coverity.\n\nIn fact this should never occur, since we should only get HPTEs in the\nHPT which have a recognized page size encoding.  The only place where\nthis might not be true is in the call to kvmppc_actual_pgsz() near the\nbeginning of kvmppc_do_h_enter(), where we are validating the HPTE\nvalue passed in from the guest.\n\nSo to fix this and eliminate the undefined behaviour, we make\nkvmppc_hpte_page_shifts return 0 for unrecognized page size encodings,\nand make kvmppc_actual_pgsz() detect that case and return 0 for the\npage size, which will then cause kvmppc_do_h_enter() to return an\nerror and refuse to insert any HPTE with an unrecognized page size\nencoding.\n\nTo ensure that we don't get undefined behaviour in compute_tlbie_rb(),\nwe take the 4k page size path for any unrecognized page size encoding.\nThis should never be hit in practice because it is only used on HPTE\nvalues which have previously been checked for having a recognized\npage size encoding.\n\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/cda2eaa35948893d70145490d5d6ded546fc3bc6"},{"sha":"117647ff936e2d9684cc881d87c0291f46669c20","author":{"name":"Paul Mackerras","email":"b848d7d196719b06ca69c3524d28631335b2ab79@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Fix typo in kvmppc_hv_get_dirty_log_radix()\n\nThis fixes a typo where the intent was to assign to 'j' in order to\nskip some number of bits in the dirty bitmap for a guest.  The effect\nof the typo is benign since it means we just iterate through all the\nbits rather than skipping bits which we know will be zero.  This issue\nwas found by Coverity.\n\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/117647ff936e2d9684cc881d87c0291f46669c20"},{"sha":"4fcf361dbdbdb43038bb173e2391c4073e713745","author":{"name":"Paul Mackerras","email":"b848d7d196719b06ca69c3524d28631335b2ab79@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Remove useless statement\n\nThis removes a statement that has no effect.  It should have been\nremoved in commit 898b25b202f3 (\"KVM: PPC: Book3S HV: Simplify dynamic\nmicro-threading code\", 2017-06-22) along with the loop over the\npiggy-backed virtual cores.\n\nThis issue was reported by Coverity.\n\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/4fcf361dbdbdb43038bb173e2391c4073e713745"},{"sha":"c0093f1a38a0fd6c32a2269f0533bb13fb95143d","author":{"name":"Paul Mackerras","email":"b848d7d196719b06ca69c3524d28631335b2ab79@ozlabs.org"},"message":"KVM: PPC: Book3S HV: Fix conditions for starting vcpu\n\nThis corrects the test that determines whether a vcpu that has just\nbecome able to run in the guest (e.g. it has just finished handling\na hypercall or hypervisor page fault) and whose virtual core is\nalready running somewhere as a \"piggybacked\" vcore can start\nimmediately or not.  (A piggybacked vcore is one which is executing\nalong with another vcore as a result of dynamic micro-threading.)\n\nPreviously the test tried to lock the piggybacked vcore using\nspin_trylock, which would always fail because the vcore was already\nlocked, and so the vcpu would have to wait until its vcore exited\nthe guest before it could enter.\n\nIn fact the vcpu can enter if its vcore is in VCORE_PIGGYBACK state\nand not already exiting (or exited) the guest, so the test in\nVCORE_PIGGYBACK state is basically the same as for VCORE_RUNNING\nstate.\n\nCoverity detected this as a double unlock issue, which it isn't\nbecause the spin_trylock would always fail.  This will fix the\napparent double unlock as well.\n\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/c0093f1a38a0fd6c32a2269f0533bb13fb95143d"},{"sha":"9aa6825bbb7526a7fdec137b7cc3b042581cd2fc","author":{"name":"Paul Mackerras","email":"b848d7d196719b06ca69c3524d28631335b2ab79@ozlabs.org"},"message":"KVM: PPC: Book3S: Eliminate some unnecessary checks\n\nIn an excess of caution, commit 6f63e81bda98 (\"KVM: PPC: Book3S: Add\nMMIO emulation for FP and VSX instructions\", 2017-02-21) included\nchecks for the case that vcpu->arch.mmio_vsx_copy_nums is less than\nzero, even though its type is u8.  This causes a Coverity warning,\nso we remove the check for < 0.  We also adjust the associated\ncomment to be more accurate (\"4 or less\" rather than \"less than 4\").\n\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/9aa6825bbb7526a7fdec137b7cc3b042581cd2fc"},{"sha":"b38defdb44fb0377b38896e38ac1fc8482e68f76","author":{"name":"Brijesh Singh","email":"fb96e96eec1eea65854e114d3f7aa6ad09144303@amd.com"},"message":"Documentation/virtual/kvm: Add AMD Secure Encrypted Virtualization (SEV)\n\nCreate a Documentation entry to describe the AMD Secure Encrypted\nVirtualization (SEV) feature.\n\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Ingo Molnar <mingo@redhat.com>\nCc: \"H. Peter Anvin\" <hpa@zytor.com>\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Jonathan Corbet <corbet@lwn.net>\nCc: Borislav Petkov <bp@suse.de>\nCc: Tom Lendacky <thomas.lendacky@amd.com>\nCc: kvm@vger.kernel.org\nCc: x86@kernel.org\nCc: linux-kernel@vger.kernel.org\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>\nReviewed-by: Borislav Petkov <bp@suse.de>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/b38defdb44fb0377b38896e38ac1fc8482e68f76"},{"sha":"18c71ce9c8822d48d2b4c50242051535d46082ac","author":{"name":"Tom Lendacky","email":"aae724d943dd57e8b9dec8b455e9688272d2d782@amd.com"},"message":"x86/CPU/AMD: Add the Secure Encrypted Virtualization CPU feature\n\nUpdate the CPU features to include identifying and reporting on the\nSecure Encrypted Virtualization (SEV) feature.  SEV is identified by\nCPUID 0x8000001f, but requires BIOS support to enable it (set bit 23 of\nMSR_K8_SYSCFG and set bit 0 of MSR_K7_HWCR).  Only show the SEV feature\nas available if reported by CPUID and enabled by BIOS.\n\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Ingo Molnar <mingo@redhat.com>\nCc: \"H. Peter Anvin\" <hpa@zytor.com>\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Borislav Petkov <bp@suse.de>\nCc: kvm@vger.kernel.org\nCc: x86@kernel.org\nCc: linux-kernel@vger.kernel.org\nSigned-off-by: Tom Lendacky <thomas.lendacky@amd.com>\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>\nReviewed-by: Borislav Petkov <bp@suse.de>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/18c71ce9c8822d48d2b4c50242051535d46082ac"},{"sha":"cea3a19b007a690a40fac373f22bf34ea69761a2","author":{"name":"Tom Lendacky","email":"aae724d943dd57e8b9dec8b455e9688272d2d782@amd.com"},"message":"kvm: svm: prepare for new bit definition in nested_ctl\n\nCurrently the nested_ctl variable in the vmcb_control_area structure is\nused to indicate nested paging support. The nested paging support field\nis actually defined as bit 0 of the field. In order to support a new\nfeature flag the usage of the nested_ctl and nested paging support must\nbe converted to operate on a single bit.\n\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Ingo Molnar <mingo@redhat.com>\nCc: \"H. Peter Anvin\" <hpa@zytor.com>\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Joerg Roedel <joro@8bytes.org>\nCc: Borislav Petkov <bp@suse.de>\nCc: x86@kernel.org\nCc: kvm@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nSigned-off-by: Tom Lendacky <thomas.lendacky@amd.com>\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>\nReviewed-by: Borislav Petkov <bp@suse.de>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/cea3a19b007a690a40fac373f22bf34ea69761a2"},{"sha":"ba7c3398dc7eedbbe9d19a17ce3ab98349079fc7","author":{"name":"Tom Lendacky","email":"aae724d943dd57e8b9dec8b455e9688272d2d782@amd.com"},"message":"kvm: svm: Add SEV feature definitions to KVM\n\nDefine the SEV enable bit for the VMCB control structure. The hypervisor\nwill use this bit to enable SEV in the guest.\n\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Ingo Molnar <mingo@redhat.com>\nCc: \"H. Peter Anvin\" <hpa@zytor.com>\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Joerg Roedel <joro@8bytes.org>\nCc: Borislav Petkov <bp@suse.de>\nCc: x86@kernel.org\nCc: kvm@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nSigned-off-by: Tom Lendacky <thomas.lendacky@amd.com>\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>\nReviewed-by: Borislav Petkov <bp@suse.de>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/ba7c3398dc7eedbbe9d19a17ce3ab98349079fc7"},{"sha":"4faefff3241e02dd66bfb77bd7ca40f3aa08f62e","author":{"name":"Brijesh Singh","email":"fb96e96eec1eea65854e114d3f7aa6ad09144303@amd.com"},"message":"KVM: SVM: Prepare to reserve asid for SEV guest\n\nCurrently, ASID allocation start at 1. Add a svm_vcpu_data.min_asid\nwhich allows supplying a dynamic start ASID.\n\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Ingo Molnar <mingo@redhat.com>\nCc: \"H. Peter Anvin\" <hpa@zytor.com>\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Joerg Roedel <joro@8bytes.org>\nCc: Borislav Petkov <bp@suse.de>\nCc: Tom Lendacky <thomas.lendacky@amd.com>\nCc: x86@kernel.org\nCc: kvm@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>\nReviewed-by: Paolo Bonzini <pbonzini@redhat.com>\nReviewed-by: Borislav Petkov <bp@suse.de>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/4faefff3241e02dd66bfb77bd7ca40f3aa08f62e"},{"sha":"8765d75329a386dd7742f94a1ea5fdcdea8d93d0","author":{"name":"Brijesh Singh","email":"fb96e96eec1eea65854e114d3f7aa6ad09144303@amd.com"},"message":"KVM: X86: Extend CPUID range to include new leaf\n\nThis CPUID leaf provides the memory encryption support information on\nAMD Platform. Its complete description is available in APM volume 2,\nSection 15.34\n\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Ingo Molnar <mingo@redhat.com>\nCc: \"H. Peter Anvin\" <hpa@zytor.com>\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Joerg Roedel <joro@8bytes.org>\nCc: Borislav Petkov <bp@suse.de>\nCc: Tom Lendacky <thomas.lendacky@amd.com>\nCc: x86@kernel.org\nCc: kvm@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nReviewed-by: Borislav Petkov <bp@suse.de>\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/8765d75329a386dd7742f94a1ea5fdcdea8d93d0"},{"sha":"5acc5c063196b4a531a761a954023c1848ec832b","author":{"name":"Brijesh Singh","email":"fb96e96eec1eea65854e114d3f7aa6ad09144303@amd.com"},"message":"KVM: Introduce KVM_MEMORY_ENCRYPT_OP ioctl\n\nIf the hardware supports memory encryption then the\nKVM_MEMORY_ENCRYPT_OP ioctl can be used by qemu to issue a platform\nspecific memory encryption commands.\n\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Ingo Molnar <mingo@redhat.com>\nCc: \"H. Peter Anvin\" <hpa@zytor.com>\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Joerg Roedel <joro@8bytes.org>\nCc: Borislav Petkov <bp@suse.de>\nCc: Tom Lendacky <thomas.lendacky@amd.com>\nCc: x86@kernel.org\nCc: kvm@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>\nReviewed-by: Paolo Bonzini <pbonzini@redhat.com>\nReviewed-by: Borislav Petkov <bp@suse.de>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/5acc5c063196b4a531a761a954023c1848ec832b"},{"sha":"69eaedee411c1fc1cf123520897a96b7cf04d8a0","author":{"name":"Brijesh Singh","email":"fb96e96eec1eea65854e114d3f7aa6ad09144303@amd.com"},"message":"KVM: Introduce KVM_MEMORY_ENCRYPT_{UN,}REG_REGION ioctl\n\nIf hardware supports memory encryption then KVM_MEMORY_ENCRYPT_REG_REGION\nand KVM_MEMORY_ENCRYPT_UNREG_REGION ioctl's can be used by userspace to\nregister/unregister the guest memory regions which may contain the encrypted\ndata (e.g guest RAM, PCI BAR, SMRAM etc).\n\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Ingo Molnar <mingo@redhat.com>\nCc: \"H. Peter Anvin\" <hpa@zytor.com>\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Joerg Roedel <joro@8bytes.org>\nCc: Borislav Petkov <bp@suse.de>\nCc: Tom Lendacky <thomas.lendacky@amd.com>\nCc: x86@kernel.org\nCc: kvm@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nImprovements-by: Borislav Petkov <bp@suse.de>\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>\nReviewed-by: Borislav Petkov <bp@suse.de>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/69eaedee411c1fc1cf123520897a96b7cf04d8a0"},{"sha":"016db9c5c39fc7f1c766daf2083211318ef93d38","author":{"name":"Borislav Petkov","email":"eb590213a9667d8ba86dc1d7da45a37c724b7836@suse.de"},"message":"crypto: ccp: Build the AMD secure processor driver only with AMD CPU support\n\nThis is AMD-specific hardware so present it in Kconfig only when AMD\nCPU support is enabled or on ARM64 where it is also used.\n\nSigned-off-by: Borislav Petkov <bp@suse.de>\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>\nReviewed-by: Gary R Hook <gary.hook@amd.com>\nCc: Brijesh Singh <brijesh.singh@amd.com>\nCc: Tom Lendacky <thomas.lendacky@amd.com>\nCc: Gary Hook <gary.hook@amd.com>\nCc: Herbert Xu <herbert@gondor.apana.org.au>\nCc: \"David S. Miller\" <davem@davemloft.net>\nCc: linux-crypto@vger.kernel.org","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/016db9c5c39fc7f1c766daf2083211318ef93d38"},{"sha":"1d57b17c60ff245b8e50813bf0fd24143ecf26d4","author":{"name":"Brijesh Singh","email":"fb96e96eec1eea65854e114d3f7aa6ad09144303@amd.com"},"message":"crypto: ccp: Define SEV userspace ioctl and command id\n\nAdd a include file which defines the ioctl and command id used for\nissuing SEV platform management specific commands.\n\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Borislav Petkov <bp@suse.de>\nCc: Herbert Xu <herbert@gondor.apana.org.au>\nCc: Gary Hook <gary.hook@amd.com>\nCc: Tom Lendacky <thomas.lendacky@amd.com>\nCc: linux-crypto@vger.kernel.org\nCc: kvm@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nImprovements-by: Borislav Petkov <bp@suse.de>\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>\nReviewed-by: Borislav Petkov <bp@suse.de>\nAcked-by: Gary R Hook <gary.hook@amd.com>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/1d57b17c60ff245b8e50813bf0fd24143ecf26d4"},{"sha":"592d5e74ddb28f66c5f4acffcd36156b1621a7c4","author":{"name":"Brijesh Singh","email":"fb96e96eec1eea65854e114d3f7aa6ad09144303@amd.com"},"message":"crypto: ccp: Define SEV key management command id\n\nDefine Secure Encrypted Virtualization (SEV) key management command id\nand structure. The command definition is available in SEV KM spec\n0.14 (http://support.amd.com/TechDocs/55766_SEV-KM API_Specification.pdf)\n\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Borislav Petkov <bp@suse.de>\nCc: Herbert Xu <herbert@gondor.apana.org.au>\nCc: Gary Hook <gary.hook@amd.com>\nCc: Tom Lendacky <thomas.lendacky@amd.com>\nCc: linux-crypto@vger.kernel.org\nCc: kvm@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nImprovements-by: Borislav Petkov <bp@suse.de>\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>\nReviewed-by: Borislav Petkov <bp@suse.de>\nAcked-by: Gary R Hook <gary.hook@amd.com>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/592d5e74ddb28f66c5f4acffcd36156b1621a7c4"},{"sha":"2a6170dfe755b167ca8d6bba2e73695f08b37c54","author":{"name":"Brijesh Singh","email":"fb96e96eec1eea65854e114d3f7aa6ad09144303@amd.com"},"message":"crypto: ccp: Add Platform Security Processor (PSP) device support\n\nThe Platform Security Processor (PSP) is part of the AMD Secure\nProcessor (AMD-SP) functionality. The PSP is a dedicated processor\nthat provides support for key management commands in Secure Encrypted\nVirtualization (SEV) mode, along with software-based Trusted Execution\nEnvironment (TEE) to enable third-party trusted applications.\n\nNote that the key management functionality provided by the SEV firmware\ncan be used outside of the kvm-amd driver hence it doesn't need to\ndepend on CONFIG_KVM_AMD.\n\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Borislav Petkov <bp@suse.de>\nCc: Herbert Xu <herbert@gondor.apana.org.au>\nCc: Gary Hook <gary.hook@amd.com>\nCc: Tom Lendacky <thomas.lendacky@amd.com>\nCc: linux-crypto@vger.kernel.org\nCc: kvm@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nImprovements-by: Borislav Petkov <bp@suse.de>\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>\nReviewed-by: Borislav Petkov <bp@suse.de>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/2a6170dfe755b167ca8d6bba2e73695f08b37c54"},{"sha":"200664d5237f3f8cd2a2f9f5c5dea08502336bd1","author":{"name":"Brijesh Singh","email":"fb96e96eec1eea65854e114d3f7aa6ad09144303@amd.com"},"message":"crypto: ccp: Add Secure Encrypted Virtualization (SEV) command support\n\nAMD's new Secure Encrypted Virtualization (SEV) feature allows the\nmemory contents of virtual machines to be transparently encrypted with a\nkey unique to the VM. The programming and management of the encryption\nkeys are handled by the AMD Secure Processor (AMD-SP) which exposes the\ncommands for these tasks. The complete spec is available at:\n\nhttp://support.amd.com/TechDocs/55766_SEV-KM%20API_Specification.pdf\n\nExtend the AMD-SP driver to provide the following support:\n\n - an in-kernel API to communicate with the SEV firmware. The API can be\n   used by the hypervisor to create encryption context for a SEV guest.\n\n - a userspace IOCTL to manage the platform certificates.\n\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Borislav Petkov <bp@suse.de>\nCc: Herbert Xu <herbert@gondor.apana.org.au>\nCc: Gary Hook <gary.hook@amd.com>\nCc: Tom Lendacky <thomas.lendacky@amd.com>\nCc: linux-crypto@vger.kernel.org\nCc: kvm@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nImprovements-by: Borislav Petkov <bp@suse.de>\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/200664d5237f3f8cd2a2f9f5c5dea08502336bd1"},{"sha":"2960f9a51556f79a1f9a70c5ed5a52476f62f1a1","author":{"name":"Brijesh Singh","email":"fb96e96eec1eea65854e114d3f7aa6ad09144303@amd.com"},"message":"crypto: ccp: Implement SEV_FACTORY_RESET ioctl command\n\nThe SEV_FACTORY_RESET command can be used by the platform owner to\nreset the non-volatile SEV related data. The command is defined in\nSEV spec section 5.4\n\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: \"Radim Krčmář\" <rkrcmar@redhat.com>\nCc: Borislav Petkov <bp@suse.de>\nCc: Herbert Xu <herbert@gondor.apana.org.au>\nCc: Gary Hook <gary.hook@amd.com>\nCc: Tom Lendacky <thomas.lendacky@amd.com>\nCc: linux-crypto@vger.kernel.org\nCc: kvm@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nImprovements-by: Borislav Petkov <bp@suse.de>\nSigned-off-by: Brijesh Singh <brijesh.singh@amd.com>","distinct":true,"url":"https://api.github.com/repos/Llewellynvdm/linux/commits/2960f9a51556f79a1f9a70c5ed5a52476f62f1a1"}]}
{"actor":{"display_login":"Llewellynvdm"}}