{"push_id":2510152997,"size":63,"distinct_size":63,"ref":"refs/heads/master","head":"7f6d8f49aa916a526c2ce227606cc51eebd0c950","before":"02f8c03884d69c5915f07b82851f72fbacb448bd","commits":[{"sha":"f61262ac62796dfce642290f315dbd216c63074b","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: Add new function and node IDs\n\nAdd new function and node IDs supported by PMUFW in\nfunction list and node list respectively.\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/f61262ac62796dfce642290f315dbd216c63074b"},{"sha":"849ba7f7308f05159e0cc2fb8b281d926009394c","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: pm: Add wrappers for Pin control APIs\n\nAdd wrappers for pin control APIs. Actual implementation of\nthese APIs would be done in subsequent changes.\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/849ba7f7308f05159e0cc2fb8b281d926009394c"},{"sha":"e52e10add2adda2bd7bd5257ddf7ec15e40f0f26","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: pm: Implement pin control APIs for get/set functions\n\nImplement pin control APIs which uses MMIO operations\nto set/get functions for the given pin.\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/e52e10add2adda2bd7bd5257ddf7ec15e40f0f26"},{"sha":"d0e2c51ae3ff07a7039cd59cdd05ba4669c0e5b3","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: pm: Implement pin control APIs for configurations\n\nImplement pin control APIs which uses MMIO operations\nto set/get values of configuration parameters.\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/d0e2c51ae3ff07a7039cd59cdd05ba4669c0e5b3"},{"sha":"f76918a80602588408d6d7b6ba374df9c95d7261","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: pm: Implement IOCTL APIs for remoteproc\n\nImplement ioctl APIs which uses MMIO operations\nto control RPU operations. Below IOCTLs are supported\nin this patch:\n  * Get RPU operation mode\n  * Set RPU operation mode\n  * Configure RPU boot address (OCM/TCM)\n  * Configure TCM combined mode\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/f76918a80602588408d6d7b6ba374df9c95d7261"},{"sha":"1818c029252914b7d5c93915789c7cef32ffcfd7","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: pm: Implement IOCTL APIs for device control\n\nImplement ioctl APIs which uses MMIO operations\nto configure devices. Below IOCTLs are supported\nin this patch:\n  * Set tap delay bypass\n  * Set SGMII mode\n  * SD reset\n  * Set SD/MMC tap delay\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/1818c029252914b7d5c93915789c7cef32ffcfd7"},{"sha":"caae497dfcdc562accaa2bf92d01b5a0ece4ed66","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: pm: Add clock control EEMI API and ioctl functions\n\nThese are empty functions with no logic right now. Code\nwill be added in subsequent commits.\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/caae497dfcdc562accaa2bf92d01b5a0ece4ed66"},{"sha":"1a3f02b5a3fbf8b3fe3252ac5486b89be57ee50a","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: pm: Implement clock APIs\n\n- Add clock entries and information to clock database.\n- Implement APIs to provide clock topology and other\n  information to caller.\n- Implement APIs to control clocks and PLLs.\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/1a3f02b5a3fbf8b3fe3252ac5486b89be57ee50a"},{"sha":"63eb7a367d63526dbd15f3476b4bc2c6f852b48b","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: pm: Add IOCTLs for global storage access\n\nAdd IOCTLs to read/write global general storage and\npersistent global general storage registers access.\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/63eb7a367d63526dbd15f3476b4bc2c6f852b48b"},{"sha":"bd99265b06fa337fa6f33d374967019e3e9a1bdf","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: pm: Add APIs for pin control queries\n\nAdd pin control APIs which driver can use to query\npin information from firmware. Using these APIs,\ndriver do not need to maintain hard-coded pin database.\n\nMajor changes in patch are:\n- Add pin database with pins, functions and function groups\n  information\n- Implement APIs for pin information queries\n- Update pin control APIs for get/set functions to use new\n  pin control database. Remove pin database which was added\n  earlier.\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/bd99265b06fa337fa6f33d374967019e3e9a1bdf"},{"sha":"3077f8d96a6d8b92e6a6a8c9e57fefeed3a8a92f","author":{"name":"Jolly Shah","email":"1f7ae07382272b70f4501c1b197219b5511ac2fb@xilinx.com"},"message":"zynqmp: Use DDR memory when DEBUG is enabled\n\nDefine default DDR location to which ATF has to compiled\nif DEBUG option is enabled. This is required now, as the ATF cant fit\nin OCM with DEBUG option enabled. The default value is 0x1000 and can be\nused till 0x7ffff. User can still override as per wish/requirement\nusing current commandline options.\n\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/3077f8d96a6d8b92e6a6a8c9e57fefeed3a8a92f"},{"sha":"96d69865663656250aef9ed6e32136edcc2682e3","author":{"name":"Jolly Shah","email":"1f7ae07382272b70f4501c1b197219b5511ac2fb@xilinx.com"},"message":"zynqmp: pm: Update API version to 1.0\n\nWith new EEMI APIs addition, version is updated to 1.0\n\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/96d69865663656250aef9ed6e32136edcc2682e3"},{"sha":"f134200f1aac9a8d3ec211e61ba22246e484b04c","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: pm: Support ATF PM version check\n\nAdd SMC call to query ATF PM version. This version\ncan be used by Linux to match with expected version.\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/f134200f1aac9a8d3ec211e61ba22246e484b04c"},{"sha":"cc974c52c28e8de7079af71bd17de00e3dce1319","author":{"name":"Rajan Vaja","email":"958387e48e282671f29716c1b482329c5293cdb8@xilinx.com"},"message":"zynqmp: pm_service: Support multiple SDIO modes\n\nExisting database allows to set only single mode for SDIO.\nSDIO can have different groups (8 bit, 4 bit and 1 bit).\nAs there is only single SDIO group in each pin, it is not\n possible to use different mode groups for SDIO.\n\nExtend database in generic way to allow multiuple function\ngroups in single pin. Add different SDIO groups to pins and\ncreate separate functions for each modes.\n\nSigned-off-by: Rajan Vaja <rajanv@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/cc974c52c28e8de7079af71bd17de00e3dce1319"},{"sha":"37e1a68e583a1c3c29fb19c508caceb707c5cda6","author":{"name":"Jolly Shah","email":"1f7ae07382272b70f4501c1b197219b5511ac2fb@xilinx.com"},"message":"zynqmp: pm: Minor corrections for MISRA compliance\n\nVarious changes to comply with MISRA static analysis rules\n\nSigned-off-by: Jolly Shah <jollys@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/37e1a68e583a1c3c29fb19c508caceb707c5cda6"},{"sha":"0e24ea81564ef0444bd6e57f6dabc324284ec3b0","author":{"name":"Michalis Pappas","email":"d16f878578641dd2234e815f409f9c6f1ae8bdc0@fastmail.fm"},"message":"qemu: don't use C functions for the crash console callbacks\n\nUse the console_pl011_core_* functions directly in the crash console\ncallbacks.\n\nThis bypasses the MULTI_CONSOLE_API for the crash console (UART1), but\nallows using the crash console before the C runtime has been initialized\n(eg to call ASM_ASSERT). This retains backwards compatibility with respect\nto functionality when the old API is used.\n\nUse the MULTI_CONSOLE_API to register UART0 as the boot and runtime\nconsole.\n\nFixes ARM-software/tf-issues#572\n\nSigned-off-by: Michalis Pappas <mpappas@fastmail.fm>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/0e24ea81564ef0444bd6e57f6dabc324284ec3b0"},{"sha":"aafd8e1c9f48be0b4716f3ea6390736773c7fbdb","author":{"name":"Antonio Nino Diaz","email":"5c24ff39be768bf31f4deee44042a11772cfd02a@arm.com"},"message":"SPM: Assert value of `ENABLE_SPM` build flag\n\nThe Makefile was missing a check to verify that the value of\n`ENABLE_SPM` is boolean.\n\nChange-Id: I97222e4df9ae2fbd89cdb3263956dca52d360993\nSigned-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/aafd8e1c9f48be0b4716f3ea6390736773c7fbdb"},{"sha":"f11916bf1dfecd7ee76240eebd847681ce366a67","author":{"name":"Dimitris Papastamos","email":"5172875e934a989df22d22726b6d9d921b91fbdd@arm.com"},"message":"Merge pull request #1334 from michpappas/tf-issues#572_qemu_dont_use_C_for_crash_console\n\nqemu: don't use C functions for the crash console callbacks","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/f11916bf1dfecd7ee76240eebd847681ce366a67"},{"sha":"59dc4ef48757e4de2dc2de13d13e43acd5d91aa0","author":{"name":"Dimitris Papastamos","email":"5172875e934a989df22d22726b6d9d921b91fbdd@arm.com"},"message":"Fixup SMCCC_FEATURES return value for SMCCC_ARCH_WORKAROUND_1\n\nOnly return -1 if the workaround for CVE-2017-5715 is not compiled in.\n\nChange-Id: I1bd07c57d22b4a13cf51b35be141a1f1ffb065ff\nSigned-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/59dc4ef48757e4de2dc2de13d13e43acd5d91aa0"},{"sha":"93883a293145f6c85b3fc8c219f400e28b7d1491","author":{"name":"Dimitris Papastamos","email":"5172875e934a989df22d22726b6d9d921b91fbdd@arm.com"},"message":"Merge pull request #1338 from antonio-nino-diaz-arm/an/spm-flag-check\n\nSPM: Assert value of `ENABLE_SPM` build flag","distinct":true,"url":"https://api.github.com/repos/OpenTrustGroup/arm-trusted-firmware/commits/93883a293145f6c85b3fc8c219f400e28b7d1491"}]}
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