{"action":"closed","issue":{"url":"https://api.github.com/repos/cseed/arachne-pnr/issues/32","repository_url":"https://api.github.com/repos/cseed/arachne-pnr","labels_url":"https://api.github.com/repos/cseed/arachne-pnr/issues/32/labels{/name}","comments_url":"https://api.github.com/repos/cseed/arachne-pnr/issues/32/comments","events_url":"https://api.github.com/repos/cseed/arachne-pnr/issues/32/events","html_url":"https://github.com/cseed/arachne-pnr/issues/32","id":153491082,"number":32,"title":"arachne-pnr: Unknown Model: $_DLATCH_P_","user":{"login":"vpecanins","id":9090680,"avatar_url":"https://avatars.githubusercontent.com/u/9090680?v=3","gravatar_id":"","url":"https://api.github.com/users/vpecanins","html_url":"https://github.com/vpecanins","followers_url":"https://api.github.com/users/vpecanins/followers","following_url":"https://api.github.com/users/vpecanins/following{/other_user}","gists_url":"https://api.github.com/users/vpecanins/gists{/gist_id}","starred_url":"https://api.github.com/users/vpecanins/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/vpecanins/subscriptions","organizations_url":"https://api.github.com/users/vpecanins/orgs","repos_url":"https://api.github.com/users/vpecanins/repos","events_url":"https://api.github.com/users/vpecanins/events{/privacy}","received_events_url":"https://api.github.com/users/vpecanins/received_events","type":"User","site_admin":false},"labels":[],"state":"closed","locked":false,"assignee":null,"assignees":[],"milestone":null,"comments":2,"created_at":"2016-05-06T16:42:08Z","updated_at":"2016-07-10T20:00:42Z","closed_at":"2016-07-10T20:00:42Z","body":"Hello mates,\r\n\r\nI am trying to compile an Asynchronous FIFO for the ICE40. It is used to share data between 2 buses with different clock frequencies. The [model](http://www.asic-world.com/examples/verilog/asyn_fifo.html) is taken from the page World of ASIC. It has been copied&pasted and compiled with the commercial tool Ice Cube 2 and it works.\r\n\r\n\r\n\r\nI am trying to do the same with the open source toolchain. However, `arachne-pnr` fails with the following error:\r\n\r\n`[...] fatal error: unknown model '$_DLATCH_P_'`\r\n\r\nI assume the problem comes when trying to place the D LATCH described below:\r\n\r\n```\r\n//'Status' latch logic:\r\n    always @ (Set_Status, Rst_Status, Clear_in) //D Latch w/ Asynchronous Clear & Preset.\r\n        if (Rst_Status | Clear_in)\r\n            Status = 0;  //Going 'Empty'.\r\n        else if (Set_Status)\r\n            Status = 1;  //Going 'Full'.\r\n```\r\n\r\n`yosys` effectively synthetizes this as a D LATCH and writes the following line to the `.blif` file:\r\n```\r\n.attr src \"./aFifo.v:105|/usr/local/bin/../share/yosys/ice40/cells_map.v:18\"\r\n.gate $_DLATCH_P_ D=$abc$1111$n75 E=$abc$1111$n71 Q=afifo1.Status\r\n```\r\n\r\nThen, the problem must be that arachne-pnr does not know the model for the D latch. Any ideas?\r\n\r\nRegards"}}
{"actor":{"display_login":"cseed"}}