{"action":"created","issue":{"url":"https://api.github.com/repos/dotnet/coreclr/issues/3856","repository_url":"https://api.github.com/repos/dotnet/coreclr","labels_url":"https://api.github.com/repos/dotnet/coreclr/issues/3856/labels{/name}","comments_url":"https://api.github.com/repos/dotnet/coreclr/issues/3856/comments","events_url":"https://api.github.com/repos/dotnet/coreclr/issues/3856/events","html_url":"https://github.com/dotnet/coreclr/issues/3856","id":142562304,"number":3856,"title":"ARM/Linux Coreclr breaks with Roslyn.","user":{"login":"myungjoo","id":1109011,"avatar_url":"https://avatars.githubusercontent.com/u/1109011?v=3","gravatar_id":"","url":"https://api.github.com/users/myungjoo","html_url":"https://github.com/myungjoo","followers_url":"https://api.github.com/users/myungjoo/followers","following_url":"https://api.github.com/users/myungjoo/following{/other_user}","gists_url":"https://api.github.com/users/myungjoo/gists{/gist_id}","starred_url":"https://api.github.com/users/myungjoo/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/myungjoo/subscriptions","organizations_url":"https://api.github.com/users/myungjoo/orgs","repos_url":"https://api.github.com/users/myungjoo/repos","events_url":"https://api.github.com/users/myungjoo/events{/privacy}","received_events_url":"https://api.github.com/users/myungjoo/received_events","type":"User","site_admin":false},"labels":[{"url":"https://api.github.com/repos/dotnet/coreclr/labels/2%20-%20In%20Progress","name":"2 - In Progress","color":"CCCCCC"},{"url":"https://api.github.com/repos/dotnet/coreclr/labels/ARM","name":"ARM","color":"fbca04"}],"state":"open","locked":false,"assignee":{"login":"myungjoo","id":1109011,"avatar_url":"https://avatars.githubusercontent.com/u/1109011?v=3","gravatar_id":"","url":"https://api.github.com/users/myungjoo","html_url":"https://github.com/myungjoo","followers_url":"https://api.github.com/users/myungjoo/followers","following_url":"https://api.github.com/users/myungjoo/following{/other_user}","gists_url":"https://api.github.com/users/myungjoo/gists{/gist_id}","starred_url":"https://api.github.com/users/myungjoo/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/myungjoo/subscriptions","organizations_url":"https://api.github.com/users/myungjoo/orgs","repos_url":"https://api.github.com/users/myungjoo/repos","events_url":"https://api.github.com/users/myungjoo/events{/privacy}","received_events_url":"https://api.github.com/users/myungjoo/received_events","type":"User","site_admin":false},"milestone":{"url":"https://api.github.com/repos/dotnet/coreclr/milestones/5","html_url":"https://github.com/dotnet/coreclr/milestones/Future","labels_url":"https://api.github.com/repos/dotnet/coreclr/milestones/5/labels","id":1328081,"number":5,"title":"Future","description":"Milestone tracking the issues that have been triaged for after 1.0.0-rtm","creator":{"login":"joshfree","id":1302850,"avatar_url":"https://avatars.githubusercontent.com/u/1302850?v=3","gravatar_id":"","url":"https://api.github.com/users/joshfree","html_url":"https://github.com/joshfree","followers_url":"https://api.github.com/users/joshfree/followers","following_url":"https://api.github.com/users/joshfree/following{/other_user}","gists_url":"https://api.github.com/users/joshfree/gists{/gist_id}","starred_url":"https://api.github.com/users/joshfree/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/joshfree/subscriptions","organizations_url":"https://api.github.com/users/joshfree/orgs","repos_url":"https://api.github.com/users/joshfree/repos","events_url":"https://api.github.com/users/joshfree/events{/privacy}","received_events_url":"https://api.github.com/users/joshfree/received_events","type":"User","site_admin":false},"open_issues":395,"closed_issues":71,"state":"open","created_at":"2015-09-29T00:26:07Z","updated_at":"2016-03-30T14:48:13Z","due_on":null,"closed_at":null},"comments":27,"created_at":"2016-03-22T06:43:27Z","updated_at":"2016-03-31T09:57:29Z","closed_at":null,"body":"With some stability patches to libunwind that expands the patch of\r\nhttps://lists.nongnu.org/archive/html/libunwind-devel/2015-05/msg00002.html\r\nfor the case of read as well as write, we get the following error.\r\n(Without it, we just get \"segmentation fault\" without any information)\r\n\r\n```\r\nsh-3.2# ./corerun csc.exe\r\n\r\nAssert failure(PID 9230 [0x0000240e], Thread: 9230 [0x240e]): !\"Thread::VirtualUnwindToFirstManagedCallFrame: PAL_VirtualUnwind failed\"\r\n    File: /work/dotnet/arm32/coreclr/src/vm/stackwalk.cpp Line: 784\r\n    Image: /sdcard/hf/Release/dirty/corerun\r\n\r\n**** MessageBox invoked, title 'corerun - Assert Failure (PID 9230, Thread 9230/0x240e)' ****\r\n  !\"Thread::VirtualUnwindToFirstManagedCallFrame: PAL_VirtualUnwind failed\"\r\n\r\n/work/dotnet/arm32/coreclr/src/vm/stackwalk.cpp, Line: 784\r\n\r\nAbort - Kill program\r\nRetry - Debug\r\nIgnore - Keep running\r\n\r\n\r\nImage:\r\n/sdcard/hf/Release/dirty/corerun\r\n\r\n********\r\n\r\nAborted (core dumped)\r\nsh-3.2# \r\n```\r\n\r\n\r\nWhen we reach that point, the stack looks like this:\r\n```\r\nAssert failure(PID 12916 [0x00003274], Thread: 12916 [0x3274]): !\"Thread::VirtualUnwindToFirstManagedCallFrame: PAL_VirtualUnwind failed\"\r\n    File: /work/dotnet/arm32/coreclr/src/vm/stackwalk.cpp Line: 784\r\n    Image: /sdcard/hf/Release/dirty/corerun\r\n\r\n\r\nProgram received signal SIGABRT, Aborted.\r\n0xb6d9f8e6 in ?? () from /lib/arm-linux-gnueabihf/libc.so.6\r\n(gdb) bt\r\n#0  0xb6d9f8e6 in ?? () from /lib/arm-linux-gnueabihf/libc.so.6\r\n#1  0xb6dadf0e in raise () from /lib/arm-linux-gnueabihf/libc.so.6\r\n#2  0xb6db0766 in abort () from /lib/arm-linux-gnueabihf/libc.so.6\r\n#3  0xb6b62952 in PROCEndProcess (hProcess=0xffffff01, uExitCode=1, \r\n    bTerminateUnconditionally=1)\r\n    at /work/dotnet/arm32/coreclr/src/pal/src/thread/process.cpp:1338\r\n#4  0xb6b62aa6 in TerminateProcess (hProcess=0xffffff01, uExitCode=1)\r\n    at /work/dotnet/arm32/coreclr/src/pal/src/thread/process.cpp:1254\r\n#5  0xb6300edc in _DbgBreakCheck (\r\n    szFile=0xb6b9847c \"/work/dotnet/arm32/coreclr/src/vm/stackwalk.cpp\", \r\n    iLine=784, \r\n    szExpr=0xb6b9851d \"!\\\"Thread::VirtualUnwindToFirstManagedCallFrame: PAL_VirtualUnwind failed\\\"\", fConstrained=0)\r\n    at /work/dotnet/arm32/coreclr/src/utilcode/debug.cpp:492\r\n#6  0xb63011c4 in _DbgBreakCheckNoThrow (\r\n    szFile=0xb6b9847c \"/work/dotnet/arm32/coreclr/src/vm/stackwalk.cpp\", \r\n    iLine=784, \r\n    szExpr=0xb6b9851d \"!\\\"Thread::VirtualUnwindToFirstManagedCallFrame: PAL_VirtualUnwind failed\\\"\", fConstrained=0)\r\n    at /work/dotnet/arm32/coreclr/src/utilcode/debug.cpp:558\r\n#7  0xb63014da in DbgAssertDialog (\r\n    szFile=0xb6b9847c \"/work/dotnet/arm32/coreclr/src/vm/stackwalk.cpp\", \r\n    iLine=784, \r\n---Type <return> to continue, or q <return> to quit---\r\n    szExpr=0xb6b9851d \"!\\\"Thread::VirtualUnwindToFirstManagedCallFrame: PAL_VirtualUnwind failed\\\"\") at /work/dotnet/arm32/coreclr/src/utilcode/debug.cpp:745\r\n#8  0xb63be9b2 in Thread::VirtualUnwindToFirstManagedCallFrame (\r\n    pContext=0xbeffe720) at /work/dotnet/arm32/coreclr/src/vm/stackwalk.cpp:784\r\n#9  0xb6544c14 in DispatchManagedException (ex=...)\r\n    at /work/dotnet/arm32/coreclr/src/vm/exceptionhandling.cpp:4665\r\n#10 0xb672d474 in PreStubWorker (pTransitionBlock=0xbeffec84, pMD=0xb00c8390)\r\n    at /work/dotnet/arm32/coreclr/src/vm/prestub.cpp:1040\r\n#11 0xb6557768 in ThePreStub () at asmhelpers.S:787\r\n#12 0x7dd8252e in ?? ()\r\nBacktrace stopped: previous frame identical to this frame (corrupt stack?)\r\n(gdb)\r\n\r\n```\r\n\r\nThe problem is that the saved LR at Frame 11 (ThePreStub) is BROKEN (the PC of Frame 12 is incorrect)\r\n```\r\n(gdb) info frame 11\r\nStack frame at 0xbeffec64:\r\n pc = 0xb6557768 in ThePreStub (asmhelpers.S:787); saved pc = 0x7dd8252e\r\n called by frame at 0xbeffec64, caller of frame at 0xbeffec40\r\n source language asm.\r\n Arglist at 0xbeffec40, args: \r\n Locals at 0xbeffec40, Previous frame's sp is 0xbeffec64\r\n Saved registers:\r\n  r4 at 0xbeffec40, r5 at 0xbeffec44, r6 at 0xbeffec48, r7 at 0xbeffec4c,\r\n  r8 at 0xbeffec50, r9 at 0xbeffec54, r10 at 0xbeffec58, r11 at 0xbeffec5c,\r\n  lr at 0xbeffec60\r\n(gdb) p/x *0xbeffec60\r\n$1 = 0x7dd8252f\r\n(gdb) p/x *0x7dd8252f\r\nCannot access memory at address 0x7dd8252f\r\n(gdb) \r\n```\r\n\r\n\r\nLooking at the assembly of ThePreStub: (note that PC is located elsewhere in the following instance because I made a watchpoint at 0xbeffec60 this time, which means that 0xbeffec60 is being overwritten by \"+10 vstmia r6, {d0-d7]\")\r\n```\r\n<ThePreStub>                         push      {r0, r1, r2, r3}            �\r\n<ThePreStub+2>                       stmdb     sp!, {r4, r5, r6, r7, r8, r9�\r\n<ThePreStub+6>                       sub       sp, #68 ; 0x44              �\r\n<ThePreStub+8>                       add       r6, sp, #0                  �\r\n<ThePreStub+10>                      vstmia    r6, {d0-d7}                 �\r\n>>> <ThePreStub+14>                      push      {r0}                        �\r\n<ThePreStub+16>                      add       r0, sp, #4                  �\r\n<ThePreStub+18>                      tst.w     r0, #7                      �\r\n<ThePreStub+22>                      pop       {r0}                        �\r\n<ThePreStub+24>                      beq.n     0xb6557760 <ThePreStub+30>  �\r\n<ThePreStub+26>                      movs      r0, r0                      �\r\n<ThePreStub+28>                      udf       #1                          �\r\n<ThePreStub+30>              add       r0, sp, #68     ; 0x44              �\r\n<ThePreStub+32>              mov       r1, r12                             �\r\n<ThePreStub+34>              bl        0xb672d098 <PreStubWorker(Transition�\r\n<ThePreStub+38>              mov       r12, r0                             �\r\n<ThePreStub+40>              add       r6, sp, #0                          �\r\n<ThePreStub+42>              vldmia    r6, {d0-d7}                         �\r\n<ThePreStub+46>              add       sp, #68 ; 0x44                      �\r\n<ThePreStub+48>              ldmia.w   sp!, {r4, r5, r6, r7, r8, r9, r10, r�\r\n<ThePreStub+52>              pop       {r0, r1, r2, r3}                    �\r\n<ThePreStub+54>    \r\n(gdb) p/x $d4\r\n$28 = {u8 = {0x2f, 0x25, 0xd8, 0x7d, 0xba, 0x6f, 0xc9, 0xf}, u16 = {0x252f,\r\n    0x7dd8, 0x6fba, 0xfc9}, u32 = {0x7dd8252f, 0xfc96fba},\r\n  u64 = 0xfc96fba7dd8252f, f32 = {0xffffffff, 0x0}, f64 = 0x0}\r\n(gdb) p/x $r6\r\n$29 = 0xbeffec40\r\n\r\n```\r\n\r\nLater on, when CORECLR breaks with the exception above, the stored LR of ThePreStub is the value of stored D4 above. It is too strange to understand for now, but there seems to be some sort of buffer overrun, incorrect memory addressing, or sort of such things in coreclr regarding the assembly codes.\r\n\r\n~~My first guess is on the constant \"#68\" or 0x44, which seems to assume that storing {r4, r5, r6, r7, r8, r9, r10, r11, lr}, and {d0-d7} requires 11 words. Because D registers are \"double words\", it requires 19 words. However, this doesn't add up exactly because lr is stored where d8 is going to be located if it did `vstmia r6, {d0-d8}` instead of `vstmia r6, {d0-d7}`.~~\r\n\r\n~~I'm currently looking for the code that emitted `sub sp, #68`.~~\r\n\r\nps. I'm just using Roslyn as the first \"serious\" test case for ARM/Linux coreclr. I'm not actually trying to build things inside ARM/Linux box."},"comment":{"url":"https://api.github.com/repos/dotnet/coreclr/issues/comments/203858707","html_url":"https://github.com/dotnet/coreclr/issues/3856#issuecomment-203858707","issue_url":"https://api.github.com/repos/dotnet/coreclr/issues/3856","id":203858707,"user":{"login":"myungjoo","id":1109011,"avatar_url":"https://avatars.githubusercontent.com/u/1109011?v=3","gravatar_id":"","url":"https://api.github.com/users/myungjoo","html_url":"https://github.com/myungjoo","followers_url":"https://api.github.com/users/myungjoo/followers","following_url":"https://api.github.com/users/myungjoo/following{/other_user}","gists_url":"https://api.github.com/users/myungjoo/gists{/gist_id}","starred_url":"https://api.github.com/users/myungjoo/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/myungjoo/subscriptions","organizations_url":"https://api.github.com/users/myungjoo/orgs","repos_url":"https://api.github.com/users/myungjoo/repos","events_url":"https://api.github.com/users/myungjoo/events{/privacy}","received_events_url":"https://api.github.com/users/myungjoo/received_events","type":"User","site_admin":false},"created_at":"2016-03-31T09:57:29Z","updated_at":"2016-03-31T09:57:29Z","body":"The functional (but still a bit dirty) is up for #3990 .\r\n\r\nRoslyn (csc.exe) is moving further, but still gets an error (@manu-silicon's fixes of #3891 and disabling FEATURE_STUBS_AS_IL is applied in my environment):\r\n\r\n```\r\nAssert failure(PID 25260 [0x000062ac], Thread: 25260 [0x62ac]): Reached the \"unreachable\": FAILED: <unreachable>\r\n    File: /home/abuild/rpmbuild/BUILD/coreclr-0.0.1/src/vm/exceptionhandling.cpp Line: 4475\r\n    Image: /sdcard/sf/dirty/Debug/csccore/corerun\r\n\r\n\r\nProgram received signal SIGABRT, Aborted.\r\n__libc_do_syscall () at ../sysdeps/unix/sysv/linux/arm/libc-do-syscall.S:44\r\n44\t\tpop\t{r7, pc}\r\n(gdb) bt\r\n\r\n```"}}