{"push_id":1074520776,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"eb80403e809c96bbba0d7af9e3bf6a83fc118e42","before":"0c60bdacd3694842d2db20c6720e51aaa6e2bd6c","commits":[{"sha":"eb80403e809c96bbba0d7af9e3bf6a83fc118e42","author":{"email":"3472c6854feb1698f41ad7bd43f1e132a0d23032@gmail.com","name":"Norihiko Nakasato"},"message":"Verilog 比較器","distinct":true,"url":"https://api.github.com/repos/NakasatoNorihiko/RSA/commits/eb80403e809c96bbba0d7af9e3bf6a83fc118e42"}]}