{"action":"created","issue":{"url":"https://api.github.com/repos/OP-TEE/optee_os/issues/731","repository_url":"https://api.github.com/repos/OP-TEE/optee_os","labels_url":"https://api.github.com/repos/OP-TEE/optee_os/issues/731/labels{/name}","comments_url":"https://api.github.com/repos/OP-TEE/optee_os/issues/731/comments","events_url":"https://api.github.com/repos/OP-TEE/optee_os/issues/731/events","html_url":"https://github.com/OP-TEE/optee_os/issues/731","id":146473345,"number":731,"title":"How does OPTEE switches secondary cores to normal world on multi-core platforms, such as Hikey?","user":{"login":"bngabonziza","id":4721586,"avatar_url":"https://avatars.githubusercontent.com/u/4721586?v=3","gravatar_id":"","url":"https://api.github.com/users/bngabonziza","html_url":"https://github.com/bngabonziza","followers_url":"https://api.github.com/users/bngabonziza/followers","following_url":"https://api.github.com/users/bngabonziza/following{/other_user}","gists_url":"https://api.github.com/users/bngabonziza/gists{/gist_id}","starred_url":"https://api.github.com/users/bngabonziza/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/bngabonziza/subscriptions","organizations_url":"https://api.github.com/users/bngabonziza/orgs","repos_url":"https://api.github.com/users/bngabonziza/repos","events_url":"https://api.github.com/users/bngabonziza/events{/privacy}","received_events_url":"https://api.github.com/users/bngabonziza/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":null,"milestone":null,"comments":5,"created_at":"2016-04-07T00:25:24Z","updated_at":"2016-04-11T07:23:16Z","closed_at":null,"body":"Hi\r\n\r\nI am wondering how cpu core 1 ~ 7 switch to normal world on OPTEE Hikey board. It looks like only core 0 will execute the _start function at [https://github.com/OP-TEE/optee_os/blob/master/core/arch/arm/kernel/generic_entry_a64.S#L37](https://github.com/OP-TEE/optee_os/blob/master/core/arch/arm/kernel/generic_entry_a64.S#L37), which has the SMC instruction at the end [https://github.com/OP-TEE/optee_os/blob/master/core/arch/arm/kernel/generic_entry_a64.S#L144](https://github.com/OP-TEE/optee_os/blob/master/core/arch/arm/kernel/generic_entry_a64.S#L144).\r\n\r\nCore 1 ~ 7 will execute the function cpu_on_handler at [https://github.com/OP-TEE/optee_os/blob/master/core/arch/arm/kernel/generic_entry_a64.S#L37](https://github.com/OP-TEE/optee_os/blob/master/core/arch/arm/kernel/generic_entry_a64.S#L37), which does not include an SMC instruction.\r\n\r\nSo, my question has two parts 1) what triggers core 1 ~ 7 to execute cpu_on_handler? 2) where is the SMC instruction core 1 ~ 7 use to switch to normal world. I guess the answer is related to Trusted Firmware, but not sure.\r\n\r\nThank you very much.\r\n"},"comment":{"url":"https://api.github.com/repos/OP-TEE/optee_os/issues/comments/208197854","html_url":"https://github.com/OP-TEE/optee_os/issues/731#issuecomment-208197854","issue_url":"https://api.github.com/repos/OP-TEE/optee_os/issues/731","id":208197854,"user":{"login":"jenswi-linaro","id":6150306,"avatar_url":"https://avatars.githubusercontent.com/u/6150306?v=3","gravatar_id":"","url":"https://api.github.com/users/jenswi-linaro","html_url":"https://github.com/jenswi-linaro","followers_url":"https://api.github.com/users/jenswi-linaro/followers","following_url":"https://api.github.com/users/jenswi-linaro/following{/other_user}","gists_url":"https://api.github.com/users/jenswi-linaro/gists{/gist_id}","starred_url":"https://api.github.com/users/jenswi-linaro/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/jenswi-linaro/subscriptions","organizations_url":"https://api.github.com/users/jenswi-linaro/orgs","repos_url":"https://api.github.com/users/jenswi-linaro/repos","events_url":"https://api.github.com/users/jenswi-linaro/events{/privacy}","received_events_url":"https://api.github.com/users/jenswi-linaro/received_events","type":"User","site_admin":false},"created_at":"2016-04-11T07:23:16Z","updated_at":"2016-04-11T07:23:16Z","body":"My understanding now is that the primary cpu gets initialized first, then\n> passes control to ARM-TF which in turn initializes core 1 ~ 7.\n>\n\nCorrect.\n\n\n> My question is: in ARM-TF where is the code, if there is any, to put core\n> 1 ~ 7 to sleep when core #0 is being initialized, and where is the code to\n> wake them up, so they can also be initialize?\n>\nThis is platform specific, but typically the secondary cores are waiting in\na platform specific plat_secondary_cold_boot_setup() until\npsci_pm_ops.pwr_domain_on is called via PSCI_CPU_ON_AARCH32\nor PSCI_CPU_ON_AARCH64.\n"}}