{"push_id":1062828881,"size":7,"distinct_size":7,"ref":"refs/heads/jiri_devel","head":"ef10d0e6126f58bf202ec98ff5a3246d19ab9176","before":"f7ea30d5321618942cc0c398fc201b27ea90b78a","commits":[{"sha":"30a773e85d330b04b9954347888babf18a7038cc","author":{"email":"1b548d10035ae428195c41f5d55eedb1437ccd8a@mellanox.com","name":"Jiri Pirko"},"message":"mlxsw: core: Introduce support for asynchronous EMAD register access\n\nSo far it was possible to have one EMAD register access at a time,\nlocked by mutex. This patch extends this interface to allow multiple\nEMAD register accesses to be in fly at once. That allows faster\nprocessing on firmware side avoiding unused time in between EMADs.\nMeasured speedup is ~30% for shared occupancy snapshot operation.\n\nSigned-off-by: Jiri Pirko <jiri@mellanox.com>\nReviewed-by: Ido Schimmel <idosch@mellanox.com>","distinct":true,"url":"https://api.github.com/repos/jpirko/linux_mlxsw/commits/30a773e85d330b04b9954347888babf18a7038cc"},{"sha":"696e95fc20af4f037d604822042439160f51364f","author":{"email":"1b548d10035ae428195c41f5d55eedb1437ccd8a@mellanox.com","name":"Jiri Pirko"},"message":"mlxsw: spectrum_buffers: Implement occupancy monitoring\n\nImplement occupancy API introduced in devlink and mlxsw core. This is\ndone by accessing SBPM register for Port-Pool and SBSR for Port-TC\ncurrent and max occupancy values. Max clear is implemented using the\nsame registers.\n\nSigned-off-by: Jiri Pirko <jiri@mellanox.com>\nReviewed-by: Ido Schimmel <idosch@mellanox.com>","distinct":true,"url":"https://api.github.com/repos/jpirko/linux_mlxsw/commits/696e95fc20af4f037d604822042439160f51364f"},{"sha":"e236b662c5853cb85f1676f6f659fffea4f2a054","author":{"email":"1b548d10035ae428195c41f5d55eedb1437ccd8a@mellanox.com","name":"Jiri Pirko"},"message":"TEMPORARY!!! 8139cp: add devlink\n\nSigned-off-by: Jiri Pirko <jiri@mellanox.com>","distinct":true,"url":"https://api.github.com/repos/jpirko/linux_mlxsw/commits/e236b662c5853cb85f1676f6f659fffea4f2a054"},{"sha":"dabd135e750ffa76224da184f7f4bc454c266a6b","author":{"email":"1b548d10035ae428195c41f5d55eedb1437ccd8a@mellanox.com","name":"Jiri Pirko"},"message":"TEMPORARY!!! 8139cp: fake sharedbuffer implementation\n\nSigned-off-by: Jiri Pirko <jiri@mellanox.com>","distinct":true,"url":"https://api.github.com/repos/jpirko/linux_mlxsw/commits/dabd135e750ffa76224da184f7f4bc454c266a6b"},{"sha":"ce310501f7720c21979dc9e0f217e07f08d17961","author":{"email":"1b548d10035ae428195c41f5d55eedb1437ccd8a@mellanox.com","name":"Jiri Pirko"},"message":"TEMPORARY!!! 8139cp: fake sharedbuffer occupancy implementation\n\nSigned-off-by: Jiri Pirko <jiri@mellanox.com>","distinct":true,"url":"https://api.github.com/repos/jpirko/linux_mlxsw/commits/ce310501f7720c21979dc9e0f217e07f08d17961"},{"sha":"801dc4f48744dc73860f675cfa2d65d3560bb738","author":{"email":"1b548d10035ae428195c41f5d55eedb1437ccd8a@mellanox.com","name":"Jiri Pirko"},"message":"mlxsw: spectrum_buffers: Remove eg pool 3 default init and CPU port TC binding to it\n\nSince there is no congestion control for CPU port traffic, we can change\nthe CPU port TC binding to pool 0 with min_buff and max_buff zeroed.\nRemove initialization for pool egress pool 3 since it is no longer used\nby dafault\n\nSigned-off-by: Jiri Pirko <jiri@mellanox.com>","distinct":true,"url":"https://api.github.com/repos/jpirko/linux_mlxsw/commits/801dc4f48744dc73860f675cfa2d65d3560bb738"},{"sha":"ef10d0e6126f58bf202ec98ff5a3246d19ab9176","author":{"email":"1b548d10035ae428195c41f5d55eedb1437ccd8a@mellanox.com","name":"Jiri Pirko"},"message":"mlxsw: spectrum_buffers: Change initialization of PG 9\n\nBind PG 9 to dedicated pool 3. This won't be exposed to user.\n\nSigned-off-by: Jiri Pirko <jiri@mellanox.com>","distinct":true,"url":"https://api.github.com/repos/jpirko/linux_mlxsw/commits/ef10d0e6126f58bf202ec98ff5a3246d19ab9176"}]}