{"push_id":993529459,"size":70,"distinct_size":70,"ref":"refs/heads/master","head":"9931932bfd3429aa8e98c33a26dfafcdbda71a43","before":"84091c48167c3335c826b31c96c67a6e8ae7eeba","commits":[{"sha":"0e5dcdd254ef24d9d7ff9587e65dcc34d21c190e","author":{"email":"711b18fec662347f752d74e8b8af097eb6d5d5f8@arm.com","name":"Juan Castillo"},"message":"ARM plat: add build option to unlock access to non-secure timer\n\nCurrently, Trusted Firmware on ARM platforms unlocks access to the\ntimer frame registers that will be used by the Non-Secure world. This\nunlock operation should be done by the Non-Secure software itself,\ninstead of relying on secure firmware settings.\n\nThis patch adds a new ARM specific build option 'ARM_CONFIG_CNTACR'\nto unlock access to the timer frame by setting the corresponding\nbits in the CNTACR<N> register. The frame id <N> is defined by\n'PLAT_ARM_NSTIMER_FRAME_ID'. Default value is true (unlock timer\naccess).\n\nDocumentation updated accordingly.\n\nFixes ARM-software/tf-issues#170\n\nChange-Id: Id9d606efd781e43bc581868cd2e5f9c8905bdbf6","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/0e5dcdd254ef24d9d7ff9587e65dcc34d21c190e"},{"sha":"6b8d6720cc1fb8fcb2c21d3f6124e04aed889c11","author":{"email":"f9793267bd24439886cd4a142f9642a9bcc6364b@xilinx.com","name":"Soren Brinkmann"},"message":"cdefs.h: Use __deprecated__ instead of deprecated\n\nUse the form with underscores to define the '__deprecated' macro to avoid\ncollisions with potentially defined macros, as suggested in gcc docs\n(https://gcc.gnu.org/onlinedocs/gcc/Attribute-Syntax.html#Attribute-Syntax).\n\nSigned-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/6b8d6720cc1fb8fcb2c21d3f6124e04aed889c11"},{"sha":"9400b40ea4c71153a63c1f1cdaa416d45a325ec5","author":{"email":"711b18fec662347f752d74e8b8af097eb6d5d5f8@arm.com","name":"Juan Castillo"},"message":"Disable PL011 UART before configuring it\n\nThe PL011 TRM (ARM DDI 0183G) specifies that the UART must be\ndisabled before any of the control registers are programmed. The\nPL011 driver included in TF does not disable the UART, so the\ninitialization in BL2 and BL31 is violating this requirement\n(and potentially in BL1 if the UART is enabled after reset).\n\nThis patch modifies the initialization function in the PL011\nconsole driver to disable the UART before programming the\ncontrol registers.\n\nRegister clobber list and documentation updated.\n\nFixes ARM-software/tf-issues#300\n\nChange-Id: I839b2d681d48b03f821ac53663a6a78e8b30a1a1","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/9400b40ea4c71153a63c1f1cdaa416d45a325ec5"},{"sha":"01fc3f7300e86b0b672977133c3028d638d0c672","author":{"email":"f921e9c08311ccef2e6e7757de21685f66c391dc@arm.com","name":"danh-arm"},"message":"Merge pull request #495 from jcastillo-arm/jc/tf-issues/170\n\nARM plat: add build option to unlock access to non-secure timer","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/01fc3f7300e86b0b672977133c3028d638d0c672"},{"sha":"870d881ced126bd492fe96f6a7bedd0d869dd23a","author":{"email":"f921e9c08311ccef2e6e7757de21685f66c391dc@arm.com","name":"danh-arm"},"message":"Merge pull request #496 from Xilinx/attr-deprecated\n\ncdefs.h: Use __deprecated__ instead of deprecated","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/870d881ced126bd492fe96f6a7bedd0d869dd23a"},{"sha":"ac3986ef749b1256e0e5ca4f1520e2b8007883d7","author":{"email":"17b2f82a731dc28428cf577995da8b43f2f13d79@mediatek.com","name":"Jimmy Huang"},"message":"mt8173: Enable dynamic clock management\n\nThis patch enables dynamic clock management control to reduce power\nconsumption in various components.\n\nChange-Id: I8f66d9b72c8b1d70169ffe46cc361b16a0dadb77\nSigned-off-by: Jimmy Huang <jimmy.huang@mediatek.com>","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/ac3986ef749b1256e0e5ca4f1520e2b8007883d7"},{"sha":"cc04b843baa8162cb39204533f42f22a47e1f5b8","author":{"email":"17b2f82a731dc28428cf577995da8b43f2f13d79@mediatek.com","name":"Jimmy Huang"},"message":"mt8173: Fix USB remote wake up problem\n\nThis patch updates SPM driver settings and PCM code to fix USB remote\nwake up problem.\n\nChange-Id: I07a81cc64b1d226d111380580d09ae25879f4285\nSigned-off-by: yt.lee <yt.lee@mediatek.com>","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/cc04b843baa8162cb39204533f42f22a47e1f5b8"},{"sha":"3c454d52e1cb1d9412d5d9d4c491a5db1eca306a","author":{"email":"17b2f82a731dc28428cf577995da8b43f2f13d79@mediatek.com","name":"Jimmy Huang"},"message":"mt8173: Move SPM related PLL settings to ARM TF\n\nMove SPM related PLL settings to spm_boot_init in ARM TF SPM driver\n\nChange-Id: I414b896caae072570c8de33a25e06db4ae011f57\nSigned-off-by: yt.lee <yt.lee@mediatek.com>","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/3c454d52e1cb1d9412d5d9d4c491a5db1eca306a"},{"sha":"8e53ec53b6381fef325539cb13d6164dbc6c308e","author":{"email":"17b2f82a731dc28428cf577995da8b43f2f13d79@mediatek.com","name":"Jimmy Huang"},"message":"mt8173: support big/Little cluster power off for CPU idle(C2 state)\n\n1. add power control for both big and Little cluster in MCDI\n2. fix incorrect PCM_HOTPLUG_VALID_MASK in spm_hotplug.c\n3. check the power status of cpus in cluster before setting the cputop\n   power control\n\nChange-Id: Ifa85306a8bc218098667247904d281494c2f7bfe\nSigned-off-by: Weiyi Lu <weiyi.lu@mediatek.com>","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/8e53ec53b6381fef325539cb13d6164dbc6c308e"},{"sha":"1a1ff8b96282dd86705b3f697b1445916048a8e7","author":{"email":"17b2f82a731dc28428cf577995da8b43f2f13d79@mediatek.com","name":"Jimmy Huang"},"message":"mt8173: Implement subsystem power control logic in ARM TF\n\n1. Add SiP calls for subsystem power on/off and check support\n2. Add subsystem power control related initialization in\n   bl31_plat_setup.c\n3. Add subsystem power on/off and power ack waiting functions\n4. Update PCM code for subsystem physical power control logic\n\nChange-Id: Ia0ebb1964c8f9758159bcf17c1813d76ef52cf64\nSigned-off-by: yt.lee <yt.lee@mediatek.com>","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/1a1ff8b96282dd86705b3f697b1445916048a8e7"},{"sha":"44c49087905a9968b28f4b045c8b85fd002f21fd","author":{"email":"4553ff88aeaebaecb33db07319af0f9591b50fa4@mediatek.com","name":"Weiyi Lu"},"message":"mt8173: Improve performance by handling more interrupts during idle\n\n1. Set more wakeup source\n2. Update PCM code for control logic\n\nChange-Id: I2ad06bd85bd1c75a22c838eab4cf5566c443b89a\nSigned-off-by: Weiyi Lu <weiyi.lu@mediatek.com>","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/44c49087905a9968b28f4b045c8b85fd002f21fd"},{"sha":"bb99828deea51624adb635ea73a91adee1aad579","author":{"email":"796bc380c68daf5f741aee670276a21e37487655@mediatek.com","name":"Fan Chen"},"message":"mt8173: Fix long latency issue of mtcmos contorl\n\nWe found sometimes mtcmos operation is too long in spm (>1ms),\nso update a new version to fix it.\nI verified with 5 hours power_LoadTest, every mtcmos control\ncan finish in 500us (average is 100~200us).\n\nChange-Id: I47b712bf9898870f4abcecbea47e01b9786231d4\nSigned-off-by: Fan Chen <fan.chen@mediatek.com>","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/bb99828deea51624adb635ea73a91adee1aad579"},{"sha":"143fbef42eb13d6a2f9d55558a1628a1d4039284","author":{"email":"4b69fcfca8da45b0c11ecda5434c5da526575d9d@arm.com","name":"Sandrine Bailleux"},"message":"Clarify EL3 payload documentation\n\nThis patch reworks the section about booting an EL3 payload in the\nUser Guide:\n\n - Centralize all EL3 payload related information in the same\n   section.\n\n - Mention the possibility to program the EL3 payload in flash memory\n   and execute it in place.\n\n - Provide model parameters for both the Base and Foundation FVPs.\n\n - Provide some guidance to boot an EL3 payload on Juno.\n\nChange-Id: I975c8de6b9b54ff4de01a1154cba63271d709912","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/143fbef42eb13d6a2f9d55558a1628a1d4039284"},{"sha":"ef7fb9e48e6425be1efa569e951812902e2c843e","author":{"email":"4b69fcfca8da45b0c11ecda5434c5da526575d9d@arm.com","name":"Sandrine Bailleux"},"message":"Porting Guide: Clarify identity-mapping requirement\n\nThe memory translation library in Trusted Firmware supports\nnon-identity mappings for Physical to Virtual addresses since commit\nf984ce84ba. However, the porting guide hasn't been updated\naccordingly and still mandates the platform ports to use\nidentity-mapped page tables for all addresses.\n\nThis patch removes this out-dated information from the Porting Guide\nand clarifies in which circumstances non-identity mapping may safely\nbe used.\n\nFixes ARM-software/tf-issues#258\n\nChange-Id: I84dab9f3cabfc43794951b1828bfecb13049f706","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/ef7fb9e48e6425be1efa569e951812902e2c843e"},{"sha":"d30ac1c36f79588e7384cc56c69f885147a4286f","author":{"email":"4d7af7c5c404e07961f9e1e79d6f17409c1d7db7@arm.com","name":"Soby Mathew"},"message":"Use tf_printf() for debug logs from xlat_tables.c\n\nThe debug prints used to debug translation table setup in xlat_tables.c\nused the `printf()` standard library function instead of the stack\noptimized `tf_printf()` API. DEBUG_XLAT_TABLE option was used to enable\ndebug logs within xlat_tables.c and it configured a much larger stack\nsize for the platform in case it was enabled. This patch modifies these\ndebug prints within xlat_tables.c to use tf_printf() and modifies the format\nspecifiers to be compatible with tf_printf(). The debug prints are now enabled\nif the VERBOSE prints are enabled in Trusted Firmware via LOG_LEVEL build\noption.\n\nThe much larger stack size definition when DEBUG_XLAT_TABLE is defined\nis no longer required and the platform ports are modified to remove this\nstack size definition.\n\nChange-Id: I2f7d77ea12a04b827fa15e2adc3125b1175e4c23","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/d30ac1c36f79588e7384cc56c69f885147a4286f"},{"sha":"d41ebf6ee3a1bb19162c6a967df6dc946453e31f","author":{"email":"711b18fec662347f752d74e8b8af097eb6d5d5f8@arm.com","name":"Juan Castillo"},"message":"Improve memory layout documentation\n\nThis patch adds a brief explanation of the top/bottom load approach\nto the Firmware Design guide and how Trusted Firmware keeps track of\nthe free memory at boot time. This will help platform developers to\navoid unexpected results in the memory layout.\n\nFixes ARM-software/tf-issues#319\n\nChange-Id: I04be7e24c1f3b54d28cac29701c24bf51a5c00ad","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/d41ebf6ee3a1bb19162c6a967df6dc946453e31f"},{"sha":"7b46d0d81a5853051750b716d577c283619bd480","author":{"email":"f921e9c08311ccef2e6e7757de21685f66c391dc@arm.com","name":"danh-arm"},"message":"Merge pull request #497 from mtk09422/spm-v3\n\nupdate SPM/DCM/MTCMOS related code for power control logic","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/7b46d0d81a5853051750b716d577c283619bd480"},{"sha":"203cdfe26f0c17bf158ced08c71f9e9c99976b96","author":{"email":"4d7af7c5c404e07961f9e1e79d6f17409c1d7db7@arm.com","name":"Soby Mathew"},"message":"Fix PSCI CPU ON race when setting state to ON_PENDING\n\nWhen a CPU is powered down using PSCI CPU OFF API, it disables its caches\nand updates its `aff_info_state` to OFF. The corresponding cache line is\ninvalidated by the CPU so that the update will be observed by other CPUs\nrunning with caches enabled. There is a possibility that another CPU\nwhich has been trying to turn ON this CPU via PSCI CPU ON API,\nhas already seen the update to `aff_info_state` and proceeds to update\nthe state to ON_PENDING prior to the cache invalidation. This may result\nin the update of the state to ON_PENDING being discarded.\n\nThis patch fixes this issue by making sure that the update of `aff_info_state`\nto ON_PENDING sticks by reading back the value after the cache flush and\nretrying it if not updated. The patch also adds a dsbish() to\n`psci_do_cpu_off()` to ensure ordering of the update to `aff_info_state`\nprior to cache line invalidation.\n\nFixes ARM-software/tf-issues#349\n\nChange-Id: I225de99957fe89871f8c57bcfc243956e805dcca","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/203cdfe26f0c17bf158ced08c71f9e9c99976b96"},{"sha":"51b57481c1cca38bc9d11922e2cff33c13992892","author":{"email":"f921e9c08311ccef2e6e7757de21685f66c391dc@arm.com","name":"danh-arm"},"message":"Merge pull request #501 from jcastillo-arm/jc/tf-issues/300\n\nDisable PL011 UART before configuring it","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/51b57481c1cca38bc9d11922e2cff33c13992892"},{"sha":"6874e723c4273d986fb8cf0a50da9f09fa9ad39e","author":{"email":"f921e9c08311ccef2e6e7757de21685f66c391dc@arm.com","name":"danh-arm"},"message":"Merge pull request #503 from sandrine-bailleux/sb/clarify-doc-el3-payloads\n\nClarify EL3 payload documentation","distinct":true,"url":"https://api.github.com/repos/Caesar-github/arm-trusted-firmware/commits/6874e723c4273d986fb8cf0a50da9f09fa9ad39e"}]}