{"push_id":996834538,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"0677ff9cefa9d73fbf058b41d01e7b358a4c8678","before":"cd50f0196723942045f247e8f82245d3d266f9c7","commits":[{"sha":"0677ff9cefa9d73fbf058b41d01e7b358a4c8678","author":{"email":"3bae1b7d571c203acfb4d62748e2c04607e018fd@FreeBSD.org","name":"jhibbits"},"message":"Implement pmap_change_attr() for PowerPC (Book-E only for now)\n\nSummary:\nSome drivers need special memory requirements.  X86 solves this with a\npmap_change_attr() API, which DRM uses for changing the mapping of the GART and\nother memory regions.  Implement the same function for PowerPC.  AIM currently\ndoes not need this, but will in the future for DRM, so a default is added for\nthat, for business as usual.  Book-E has some drivers coming down that do\nrequire non-default memory coherency.  In this case, the Datapath Acceleration\nArchitecture (DPAA) based ethernet controller has 2 regions for the buffer\nportals: cache-inhibited, and cache-enabled.  By default, device memory is\ncache-inhibited.  If the cache-enabled memory regions are mapped\ncache-inhibited, an alignment exception is thrown on access.\n\nTest Plan:\nTested with a new driver to be added after this (DPAA dTSEC ethernet driver).\nNo alignment exceptions thrown, driver works as expected with this.\n\nReviewed By:\tnwhitehorn\nSponsored by:\tAlex Perez/Inertial Computing\nDifferential Revision: https://reviews.freebsd.org/D5471","distinct":true,"url":"https://api.github.com/repos/freebsd/freebsd/commits/0677ff9cefa9d73fbf058b41d01e7b358a4c8678"}]}