{"action":"opened","issue":{"url":"https://api.github.com/repos/Microsoft/ChakraCore/issues/773","repository_url":"https://api.github.com/repos/Microsoft/ChakraCore","labels_url":"https://api.github.com/repos/Microsoft/ChakraCore/issues/773/labels{/name}","comments_url":"https://api.github.com/repos/Microsoft/ChakraCore/issues/773/comments","events_url":"https://api.github.com/repos/Microsoft/ChakraCore/issues/773/events","html_url":"https://github.com/Microsoft/ChakraCore/issues/773","id":147183797,"number":773,"title":"SIMD.js: Shift amounts greater than lane width's causes simd lanes to be zeroed","user":{"login":"arunetm","id":13296674,"avatar_url":"https://avatars.githubusercontent.com/u/13296674?v=3","gravatar_id":"","url":"https://api.github.com/users/arunetm","html_url":"https://github.com/arunetm","followers_url":"https://api.github.com/users/arunetm/followers","following_url":"https://api.github.com/users/arunetm/following{/other_user}","gists_url":"https://api.github.com/users/arunetm/gists{/gist_id}","starred_url":"https://api.github.com/users/arunetm/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/arunetm/subscriptions","organizations_url":"https://api.github.com/users/arunetm/orgs","repos_url":"https://api.github.com/users/arunetm/repos","events_url":"https://api.github.com/users/arunetm/events{/privacy}","received_events_url":"https://api.github.com/users/arunetm/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":null,"milestone":null,"comments":0,"created_at":"2016-04-10T01:59:41Z","updated_at":"2016-04-10T01:59:41Z","closed_at":null,"body":"Shift operations can cause SIMD lanes to be zeroed when the shift amounts are set to be greater than the lane element widths. As per the latest spec shift amounts for simd types needs to be masked to be within the lane width. \r\n\r\n**Repro Case**\r\n```javascript\r\nvar v = SIMD.Int8x16(1,2,3,4,1,2,3,4,1,2,3,4,1,2,3,4);\r\nvar res = SIMD.Int8x16.shiftLeftByScalar(v, 9);\r\nprint(res);\r\nres = SIMD.Int8x16.shiftRightByScalar(v, 9);\r\nprint(res);\r\n```\r\n\r\n**Actual Result**\r\n>SIMD.Int8x16(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)\r\nSIMD.Int8x16(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0)\r\n\r\n\r\n\r\n**Expected Result**\r\n >SIMD.Int8x16(2, 4, 6, 8, 2, 4, 6, 8, 2, 4, 6, 8, 2, 4, 6, 8)\r\nSIMD.Int8x16(0, 1, 1, 2, 0, 1, 1, 2, 0, 1, 1, 2, 0, 1, 1, 2)"}}