{"push_id":1143499952,"size":2,"distinct_size":2,"ref":"refs/heads/master","head":"7f11e7cc6416dae02860e4e1c42b444d4f9894d2","before":"ce06d103037183c68137cc16890f89c684247368","commits":[{"sha":"7b85594efed45cfe2761aed67ae2cffca49b82ce","author":{"name":"Craig Topper","email":"6a75d0b5116f69c017582fb3bf52b5bed0a243c0@gmail.com"},"message":"[X86] Use X86ISD::ABS for lowering pabs SSSE3/AVX intrinsics to match AVX512. Should allow those intrinsics to use the EVEX encoded instructions and get the extra registers when available.","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm-project/commits/7b85594efed45cfe2761aed67ae2cffca49b82ce"},{"sha":"7f11e7cc6416dae02860e4e1c42b444d4f9894d2","author":{"name":"Craig Topper","email":"6a75d0b5116f69c017582fb3bf52b5bed0a243c0@gmail.com"},"message":"[X86] Use smaller types to shrink the intrinsic lowering tables by about 12K.","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm-project/commits/7f11e7cc6416dae02860e4e1c42b444d4f9894d2"}]}
{"actor":{"display_login":"chapuni"}}