{"push_id":1209241094,"size":3,"distinct_size":3,"ref":"refs/heads/i965-fp64-gen7-scalar-vec4-rc1","head":"7e2cfc8dfd66c90e9b7c3440d00b79959dbec680","before":"eba463af7a63b0194c009acd38858e76a457a595","commits":[{"sha":"0a3b618c5ec3862f1b77507cae63daa0b1de13d7","author":{"name":"Iago Toral Quiroga","email":"b2aa8582a4b36fb51a36a4a364fccaf9b6512a6d@igalia.com"},"message":"i965/vec4/scalarize_df: do not scalarize instructions with identity swizzles\n\nWe can implement them directly. Also, document other possible improvements\nfor future reference.","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/0a3b618c5ec3862f1b77507cae63daa0b1de13d7"},{"sha":"60a49544f02fafdc31b8a65ac5a73635b36e958c","author":{"name":"Iago Toral Quiroga","email":"b2aa8582a4b36fb51a36a4a364fccaf9b6512a6d@igalia.com"},"message":"i965/vec4: enable ARB_gpu_shader_fp64 for Haswell","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/60a49544f02fafdc31b8a65ac5a73635b36e958c"},{"sha":"7e2cfc8dfd66c90e9b7c3440d00b79959dbec680","author":{"name":"Iago Toral Quiroga","email":"b2aa8582a4b36fb51a36a4a364fccaf9b6512a6d@igalia.com"},"message":"i965/gen7: expose OpenGL 4.0 on Haswell\n\nARB_gpu_shader_fp64 was the last piece missing. Notice that some\nhardware and kernel combinations do not support pipelined register\nwrites, which are required for some OpenGL 4.0 features, in which\ncase the driver won't expose 4.0.","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/7e2cfc8dfd66c90e9b7c3440d00b79959dbec680"}]}
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