{"push_id":1342282000,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"aee9cf45ca3cef26905714594b6f85a3ec8b3afc","before":"7ceff83c696bf5a7fa97450f529e5f7b30d70982","commits":[{"sha":"aee9cf45ca3cef26905714594b6f85a3ec8b3afc","author":{"name":"Oliver Stannard","email":"cb4f64cc3bdb25ddd8599e75a98b1f99fb0467f3@arm.com"},"message":"[ARM] Fix registers clobbered by SjLj EH on soft-float targets\n\nCurrently, the Int_eh_sjlj_dispatchsetup intrinsic is marked as\nclobbering all registers, including floating-point registers that may\nnot be present on the target. This is technically true, as we could get\nlinked against code that does use the FP registers, but that will not\nactually work, as the soft-float code cannot save and restore the FP\nregisters. SjLj exception handling can only work correctly if either all\nor none of the code is built for a target with FP registers. Therefore,\nwe can assume that, when Int_eh_sjlj_dispatchsetup is compiled for a\nsoft-float target, it is only going to be linked against other\nsoft-float code, and so only clobbers the general-purpose registers.\nThis allows us to check that no non-savable registers are clobbered when\ngenerating the prologue/epilogue.\n\nDifferential Revision: https://reviews.llvm.org/D25180","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm-project-submodule/commits/aee9cf45ca3cef26905714594b6f85a3ec8b3afc"}]}
{"actor":{"display_login":"chapuni"}}