{"push_id":1075149962,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"53fd688dccd1e4d0d0efd93b5262df89d30215ca","before":"ec050f449d0a6550ea68c2bd62fdbbe4a6cf34c4","commits":[{"sha":"53fd688dccd1e4d0d0efd93b5262df89d30215ca","author":{"email":"2d175e52f01d9525da3b8bc9f366b015e8756ac8@amd.com","name":"Nikolay Haustov"},"message":"AMDGPU/SI: Assembler: improvements to support trap handlers.\n\nAdd ParseAMDGPURegister which can be invoked recursively for parsing lists.\nRename getRegForName to getSpecialRegForName.\nSupport legacy SP3 register list syntax: [s2,s3,s4,s5] or [flat_scratch_lo,flat_scratch_hi].\nAdd 64-bit registers TBA, TMA where missing.\nAdd some tests.\n\nDifferential Revision: http://reviews.llvm.org/D19163\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266865 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-beanz/llvm/commits/53fd688dccd1e4d0d0efd93b5262df89d30215ca"}]}