{"push_id":1051083602,"size":91,"distinct_size":91,"ref":"refs/heads/master","head":"3e135728268cf36a176dcd915108ad7dc0f4e457","before":"972054f5bfa3f0349a44db7cf508d611a0832e52","commits":[{"sha":"f72de6f3863049106288b7dd66efeb64c822fb17","author":{"email":"61b5a29db2c0650f7c8510f93eece059c1b09320@vmware.com","name":"Jose Fonseca"},"message":"gallivm: Prevent disassembly debug output from being truncated.\n\nBy using os_log_message directly, as _debug_vprintf truncates messages\nto 4K.\n\nAlso cleanup the disassemble interface.\n\nSpotted by Roland.\n\nTrivial.","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/f72de6f3863049106288b7dd66efeb64c822fb17"},{"sha":"debd9105122586ee00c0d20a73bb4e3191c50e70","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0: bind driver cb for compute on c7[] for Kepler\n\nInstead of using the screen->parm buffer object which will be removed,\nupload auxiliary constants to uniform_bo to be consistent regarding\nwhat we already do for Fermi.\n\nThis breaks surfaces support (for compute only) but this will be\nproperly re-introduced later for ARB_shader_image_load_store.\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/debd9105122586ee00c0d20a73bb4e3191c50e70"},{"sha":"1828d90a0084a4bfce4f1bff8cac8a87d1dfcd40","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0: bind shader buffers for compute on Kepler\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/1828d90a0084a4bfce4f1bff8cac8a87d1dfcd40"},{"sha":"12aa047c98e597a109b387e9b71cd87bff0dea0a","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0: bind user uniforms for compute on Kepler\n\nUniform buffer objects will be sticked to the driver constant buffer\nlike buffers because the launch descriptor only allows 8 CBs.\n\nInput kernel parameters for OpenCL are still uploaded to screen->parm\nwhich is bound on c0, but this will be changed later with a new series.\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/12aa047c98e597a109b387e9b71cd87bff0dea0a"},{"sha":"e2e8085fac13a7af33feaf11a9c085467d257490","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0: store ubo info to the driver constbuf on Kepler\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/e2e8085fac13a7af33feaf11a9c085467d257490"},{"sha":"7797d5f7d9b367f96200093cbe166c4478eae65e","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0: reduce likelihood of collision for real buffers on Kepler\n\nReduce likelihood of collision with real buffers by placing the\nhole at the top of the 4G area. This fixes some indirect draw+compute\ntests with large buffers.\n\nSuggested by Ilia Mirkin.\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/7797d5f7d9b367f96200093cbe166c4478eae65e"},{"sha":"3b246a71d7fe12c4b0670a9dadf566ea3eca1128","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0: add indirect compute support on Kepler\n\nThe grid size is stored as three 32-bits integers in the indirect\nbuffer but the launch descriptor uses a 32-bits integer for both\ngriddim_y and griddim_z like this (z << 16) | y. To make it work,\nthe 16 high bits of griddim_y are overwritten by griddim_z.\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/3b246a71d7fe12c4b0670a9dadf566ea3eca1128"},{"sha":"4f58b78c309db372d408912ca87e88d319b895da","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0/ir: add support for compute UBOs on Kepler\n\nMake sure to avoid out of bounds access in presence of indirect\narray indexing by loading the size from the driver constant buffer.\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/4f58b78c309db372d408912ca87e88d319b895da"},{"sha":"275019d7db033286e41eb4983ac50d3d3d335586","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0/ir: fix wrong pred emission for ld lock on GK104\n\nThis fixes 84b9b8f (nvc0/ir: add missing emission of locked load\npredicate).\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/275019d7db033286e41eb4983ac50d3d3d335586"},{"sha":"543fb95473e404b7212eea3f00a23dd0d23758d5","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0/ir: add atomics support on shared memory for Kepler\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/543fb95473e404b7212eea3f00a23dd0d23758d5"},{"sha":"839a469166b9c0b9959620eda85a6481f9efa15f","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0/ir: do not lower shared+atomics on GM107+\n\nFor Maxwell, the ATOMS instruction can be used to perform atomic\noperations on shared memory instead of this load/store lowering pass.\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/839a469166b9c0b9959620eda85a6481f9efa15f"},{"sha":"71f327aa21d095f848c2162247476612eca1ed73","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0: bump the maximum number of UBOs for compute on Kepler\n\nThe maximum number of uniform blocks (MAX_COMPUTE_UNIFORM_BLOCKS)\nper compute program must be at least 12.\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/71f327aa21d095f848c2162247476612eca1ed73"},{"sha":"60e1c6a7fce82e48a36e3a5605222009c47f59bb","author":{"email":"506e97eed81d9e59d22f4c73fb51123bb62b4a30@gmail.com","name":"Samuel Pitoiset"},"message":"nvc0: enable compute shaders on GK104 and GM107+\n\nCompute support on GK110 is still unstable for weird reasons, but\nthis can be fixed later as the NVF0_COMPUTE envvar prevent using\ncompute.\n\nSigned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/60e1c6a7fce82e48a36e3a5605222009c47f59bb"},{"sha":"de60e250f5095a9237727a3188eb0c092a4e6a05","author":{"email":"b186559eaedf698788888c8a2559b4efb4db10d6@intel.com","name":"Jason Ekstrand"},"message":"nir: Add an opcode for stomping a 32-bit value to 16-bit precision\n\nThis correlates directly to the SPIR-V opcode OpQuantizeToF16\n\nReviewed-by: Rob Clark <robdclark@gmail.com>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/de60e250f5095a9237727a3188eb0c092a4e6a05"},{"sha":"14c46954c910efb1db94a068a866c7259deaa9d9","author":{"email":"b186559eaedf698788888c8a2559b4efb4db10d6@intel.com","name":"Jason Ekstrand"},"message":"i965: Add an implemnetation of nir_op_fquantize2f16\n\nReviewed-by: Matt Turner <mattst88@gmail.com>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/14c46954c910efb1db94a068a866c7259deaa9d9"},{"sha":"5ea825f55652ba9e91ab683308dcd6392cc32a97","author":{"email":"5dd83789ef3714029244367ba1ca09f1d7627408@collabora.com","name":"Timothy Arceri"},"message":"glsl: remove tabs and fix some other style issues in glcpp-parse.y\n\nNote there are still tabs left in the parser rules.\n\nAcked-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/5ea825f55652ba9e91ab683308dcd6392cc32a97"},{"sha":"ea8f4a6b13b94eb060bff4ccc6c13efc01d2b682","author":{"email":"1d31d94f30d40df7951505d1034e1e923d02ec49@basnieuwenhuizen.nl","name":"Bas Nieuwenhuizen"},"message":"gallium: add compute shader IR type\n\nSigned-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>\nReviewed-by: Dave Airlie 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barrier bit\n\nCurrently radeonsi synchronizes after every dispatch and Clover\ndoes nothing to synchronize. This is overzealous, especially with\nGL compute, so add a barrier for global buffers.\n\nSigned-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/be5899dcf9a337548d8095a00060d4451b0df222"},{"sha":"1a5c8c24b5791efa02a7beefa4ba1c49ae033c73","author":{"email":"1d31d94f30d40df7951505d1034e1e923d02ec49@basnieuwenhuizen.nl","name":"Bas Nieuwenhuizen"},"message":"gallium: distinguish between shader IR in get_compute_param\n\nFor radeonsi, native and TGSI use different compilers and this results\nin different limits for different IR's.\n\nThe set we strictly need for radeonsi is only the MAX_BLOCK_SIZE\nand MAX_THREADS_PER_BLOCK params, but I added a few others as shader\nrelated that seemed like they would also typically depend on the\ncompiler.\n\nSigned-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>\nReviewed-by: Dave Airlie <airlied@redhat.com>","distinct":true,"url":"https://api.github.com/repos/freedreno/mesa/commits/1a5c8c24b5791efa02a7beefa4ba1c49ae033c73"}]}