{"action":"closed","issue":{"url":"https://api.github.com/repos/Koheron/koheron-sdk/issues/364","repository_url":"https://api.github.com/repos/Koheron/koheron-sdk","labels_url":"https://api.github.com/repos/Koheron/koheron-sdk/issues/364/labels{/name}","comments_url":"https://api.github.com/repos/Koheron/koheron-sdk/issues/364/comments","events_url":"https://api.github.com/repos/Koheron/koheron-sdk/issues/364/events","html_url":"https://github.com/Koheron/koheron-sdk/issues/364","id":195507966,"number":364,"title":"Building new fpga cores for the SDK","user":{"login":"grahamnaylorccfe","id":11391609,"avatar_url":"https://avatars.githubusercontent.com/u/11391609?v=3","gravatar_id":"","url":"https://api.github.com/users/grahamnaylorccfe","html_url":"https://github.com/grahamnaylorccfe","followers_url":"https://api.github.com/users/grahamnaylorccfe/followers","following_url":"https://api.github.com/users/grahamnaylorccfe/following{/other_user}","gists_url":"https://api.github.com/users/grahamnaylorccfe/gists{/gist_id}","starred_url":"https://api.github.com/users/grahamnaylorccfe/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/grahamnaylorccfe/subscriptions","organizations_url":"https://api.github.com/users/grahamnaylorccfe/orgs","repos_url":"https://api.github.com/users/grahamnaylorccfe/repos","events_url":"https://api.github.com/users/grahamnaylorccfe/events{/privacy}","received_events_url":"https://api.github.com/users/grahamnaylorccfe/received_events","type":"User","site_admin":false},"labels":[],"state":"closed","locked":false,"assignee":null,"assignees":[],"milestone":null,"comments":7,"created_at":"2016-12-14T11:34:48Z","updated_at":"2016-12-16T14:28:09Z","closed_at":"2016-12-16T14:28:09Z","body":"According to the documentation, a new fpga core can be built and tested using a command such as:\r\n$ make CORE=my_core test_core\r\nWhat are the pre-requisites to be able to run this command? Does it expect a verilog file called my_core in a subdirectory to fpga/cores/test_core along with a core_config.tcl file? When I try this mix I either get an error - \"*** No rule to make target...\", or if I am in the directory fpga/cores I get the error \"Nothing to be done\" (and no cores built in the tmp/cores directory). Is something else expected before it will build the core?\r\nthanks\r\nGraham"}}
{"actor":{"display_login":"grahamnaylorccfe"}}