{"push_id":1310918490,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"a6ac3d340257125c6026cbf68435a573fb631e66","before":"9e999e56e6e00e30db8978f94d2b5430f4f00d66","commits":[{"sha":"a6ac3d340257125c6026cbf68435a573fb631e66","author":{"name":"Craig Topper","email":"6a75d0b5116f69c017582fb3bf52b5bed0a243c0@gmail.com"},"message":"[AVX-512] Add support for commuting VPTERNLOG instructions.\n\nVPTERNLOG is a ternary instruction with an immediate specifying the logical operation to perform. For each bit position in the 3 source vectors the bit from each source is concatenated together and the resulting 3-bit value is used to select a bit in the immediate. This bit value is written to the result vector.\n\nWe can commute this by swapping operands and modifying the immediate. To modify the immediate we need to swap two pairs of bits. The pairs correspond to the locations in the immediate where the commuted operands bits have opposite values and the uncommuted operand has the same value. Bits 0 and 7 will never be swapped since the relevant bits from all sources are the same value.\n\nThis refactors and reuses parts of the FMA3 commuting code which is also a three operand instruction.","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm-project-submodule/commits/a6ac3d340257125c6026cbf68435a573fb631e66"}]}
{"actor":{"display_login":"chapuni"}}