{"push_id":1169588517,"size":22,"distinct_size":1,"ref":"refs/heads/master","head":"058d9bb071f6a0a38893dd254a616b6594aa8048","before":"bc773aa31c7dbcc3618f3471f5c07a5bb6d52dbd","commits":[{"sha":"63094ac196d66a625f858a726cac04e93ad588cc","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Minor tiding-up of the functions that fetch a tile from the disk.","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/63094ac196d66a625f858a726cac04e93ad588cc"},{"sha":"6988756bdbd6c16c6ae9f96ddc4278903e11e1a6","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Finished parameterizing read/write methods. Now MPI-IO is supported.","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/6988756bdbd6c16c6ae9f96ddc4278903e11e1a6"},{"sha":"d8480eb9111f7ffb4e03c856c5c28b03a5aae777","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Minor typo fix","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/d8480eb9111f7ffb4e03c856c5c28b03a5aae777"},{"sha":"aa5ce0fa2b23b9eff5ec6b597b229c55f5e4ffc5","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Optimized reset subarray to cache the already read tiles from the previous subarray query.","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/aa5ce0fa2b23b9eff5ec6b597b229c55f5e4ffc5"},{"sha":"9d496016ecb0d428e9843c1bcd16d3c7289c7b63","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Implemented asynchronous array reads/writes","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/9d496016ecb0d428e9843c1bcd16d3c7289c7b63"},{"sha":"954d367753e27de3f5f4cfcfdf1afe4f9df4009d","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Small bug fix","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/954d367753e27de3f5f4cfcfdf1afe4f9df4009d"},{"sha":"ea8597a5d43171429e2f5c6df2fd85bbfbde362f","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Minor edit","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/ea8597a5d43171429e2f5c6df2fd85bbfbde362f"},{"sha":"d0d0b242b754c37d93998cb0742f47b4c2d4dd7f","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Important bug fix","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/d0d0b242b754c37d93998cb0742f47b4c2d4dd7f"},{"sha":"91742bb624bdea28ea1c1207e15f538de9453a91","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Bug fix","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/91742bb624bdea28ea1c1207e15f538de9453a91"},{"sha":"89a2bd6e9fca281d538c9d69ad8c8f7a607065b8","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Added support for clang","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/89a2bd6e9fca281d538c9d69ad8c8f7a607065b8"},{"sha":"453a98a766a86b6db9f28cb241e021bfc74f655d","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Fix for clang","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/453a98a766a86b6db9f28cb241e021bfc74f655d"},{"sha":"a9a0bf62afcf1a658e4345b3eb415de9201bfc6e","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Fix for clang and removed some warnings","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/a9a0bf62afcf1a658e4345b3eb415de9201bfc6e"},{"sha":"30b9a61e54a2caee323bbe0f0bd4b4929e7c1122","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Removing warnings","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/30b9a61e54a2caee323bbe0f0bd4b4929e7c1122"},{"sha":"b736b0b863bb71e4b9762395886f64f06f11838d","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Bug fix and removed warnings","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/b736b0b863bb71e4b9762395886f64f06f11838d"},{"sha":"c12c52ec23fbb8bea33d812974854ce45c3c8f61","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Removed warnings","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/c12c52ec23fbb8bea33d812974854ce45c3c8f61"},{"sha":"4bb33957c9e28f9f338f70ff4995598f0672e508","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Removed warnings","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/4bb33957c9e28f9f338f70ff4995598f0672e508"},{"sha":"0683f2025b8de676dd6052500fc6b2358eb70515","author":{"name":"Karthik Gururaj","email":"143f7aa7e19bca19cb0cdfabf38740af8bc403dc@intel.com"},"message":"Include INCLUDE_PATHS while generating dependencies","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/0683f2025b8de676dd6052500fc6b2358eb70515"},{"sha":"81da5ba6388f368c7acfcc3fb94c63fc66a46a71","author":{"name":"Stavros Papadopoulos","email":"b95302e5859926279de964aa0cef8de4c1b4aa5b@gmail.com"},"message":"Merge pull request #1 from stavrospapadopoulos/makefile\n\nInclude INCLUDE_PATHS while generating dependencies","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/81da5ba6388f368c7acfcc3fb94c63fc66a46a71"},{"sha":"8724b0d8bd949244a873cbadcbb81dd1006b6538","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"- Significantly improved the multi-fragment read algorithm.\n- Various bug fixes.\n- Added more examples, and modified some older ones to comply with the website tutorial examples.","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/8724b0d8bd949244a873cbadcbb81dd1006b6538"},{"sha":"06dcbbccfcf04010a2e5e5fd69fc590b1097c588","author":{"name":"spapadop","email":"ae5eade24db18f715cc39fa716ecb7c8aeef15e9@csail.mit.edu"},"message":"Fixing the Travis file to work with MPI","distinct":false,"url":"https://api.github.com/repos/Intel-HLS/TileDB/commits/06dcbbccfcf04010a2e5e5fd69fc590b1097c588"}]}
{"actor":{"display_login":"stavrospapadopoulos"}}