{"push_id":943142163,"size":5,"distinct_size":5,"ref":"refs/heads/master","head":"7d7998d2c1ba4be364debfb5ded038f262a22890","before":"ab5d26e4033e42b268637eff2ca28664bc9aa657","commits":[{"sha":"4bc4ffb15c18c10fc7a8ebbfe23003f8e5f6e963","author":{"email":"6b31706989f3cf9466bfddbf48eab0c43e646ba8@gmail.com","name":"Rafael Espindola"},"message":"Accept subtractions involving a weak symbol.\n\nWhen a symbol S shows up in an expression in assembly there are two\npossible interpretations\n* The expression is referring to the value of S in this file.\n* The expression is referring to the value after symbol resolution.\n\nIn the first case the assembler can reason about the value and try to\nproduce a relocation.\nIn the second case, that is only possible if the symbol cannot be\npreempted.\n\nAssemblers are not very consistent about which interpretation gets used.\nThis changes MC to agree with GAS in the case of an expression of the\nform \"Sym - WeakSym\".\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258329 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/4bc4ffb15c18c10fc7a8ebbfe23003f8e5f6e963"},{"sha":"3ca15175d43fefd940dcce9a7d4d5318cef46a2d","author":{"email":"4a8dfeb3a1c6b90c15fd5a5a91e8e25ea46ffe0b@rotateright.com","name":"Sanjay Patel"},"message":"fix formatting; NFC\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258330 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/3ca15175d43fefd940dcce9a7d4d5318cef46a2d"},{"sha":"2151fc5b30c149a1bb8b35ec8faef1f63a3c4299","author":{"email":"4a8dfeb3a1c6b90c15fd5a5a91e8e25ea46ffe0b@rotateright.com","name":"Sanjay Patel"},"message":"fix typo; NFC\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258332 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/2151fc5b30c149a1bb8b35ec8faef1f63a3c4299"},{"sha":"dec9f1a31f4a91b949ee903ad43d5b391905d691","author":{"email":"7d288e6836572ae72b1427e06e061fd492aa8050@apple.com","name":"Quentin Colombet"},"message":"[GlobalISel] Add a generic machine opcode for ADD.\nThe selection process being split into separate passes, we need generic opcodes\nto translate the LLVM IR to target independent code.\n\nThis patch adds an opcode for addition: G_ADD.\n\nDifferential Revision: http://reviews.llvm.org/D15472\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258333 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/dec9f1a31f4a91b949ee903ad43d5b391905d691"},{"sha":"7d7998d2c1ba4be364debfb5ded038f262a22890","author":{"email":"088e16a1019277b15d58faf0541e11910eb756f6@atanasyan.com","name":"Simon Atanasyan"},"message":"[llvm-readobj][ELF] Teach llvm-readobj to show arch specific ELF section's flags\n\nSome architecture specific ELF section flags might have the same value\n(for example SHF_X86_64_LARGE and SHF_HEX_GPREL) and we have to check\nmachine architectures to select an appropriate set of possible flags.\n\nThe patch selects architecture specific flags into separate arrays\n`ElfxxxSectionFlags` and combines `ElfSectionFlags` and `ElfxxxSectionFlags`\nbefore pass to the `StreamWriter::printFlags()` method.\n\nDifferential Revision: http://reviews.llvm.org/D16269\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258334 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/7d7998d2c1ba4be364debfb5ded038f262a22890"}]}