{"push_id":1137770682,"size":99,"distinct_size":99,"ref":"refs/heads/debugger-fixes","head":"ac2dfc97f3b5971bf3dcf6143797c65b3afbfafa","before":"1c865388d62e82b5dc497cc09729d8fa77509ef2","commits":[{"sha":"1cffc55fe0bd104ac52f0953b6d685a89b7d37f0","author":{"name":"Chinmay Deshpande","email":"abad3fafe67983bb7251c9097b1f756e9c9111ab@gmail.com"},"message":"Adds autocompletion for afan (#5016)\n\n* Adds autocompletion for afan\r\n\r\n* Removes duplication","distinct":true,"url":"https://api.github.com/repos/jduck/radare2/commits/1cffc55fe0bd104ac52f0953b6d685a89b7d37f0"},{"sha":"f5ca358aee88b6278008d465139f19aeea0e85bf","author":{"name":"Sushant Dinesh","email":"ea453ab2a23bc7d2d19717beeb0cf17da76eefa1@gmail.com"},"message":"Fixes x86 to ESIL lifting memory operands (#5029)\n\nCloses #5027\r\nCloses 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(#5032)","distinct":true,"url":"https://api.github.com/repos/jduck/radare2/commits/238cf897b813995998ad1ed2ba169e4f9e0153b1"},{"sha":"18ffea18ccdcf3cf2450b9f8660795115ce0f698","author":{"name":"Duncan Ogilvie","email":"7485586317011d2455503f57aad19c3cad724dc8@gmail.com"},"message":"added/fixed various cmovXX opcodes (#5033)\n\n\r\n\r\nAs per the Intel manual:\r\n\r\n```\r\nCMOVcc - Conditional Move:\r\n| Opcode          | Instruction       | Op/En| 64-Bit Mode| Compat/Leg Mode| Description                            \r\n| 0F 47 /r        | CMOVA r16, r/m16  | RM   | Valid      | Valid          | Move if above (CF=0 and ZF=0).         \r\n| REX.W + 0F 43 /r| CMOVAE r64, r/m64 | RM   | Valid      | N.E.           | Move if above or equal (CF=0).         \r\n| 0F 42 /r        | CMOVB r16, r/m16  | RM   | Valid      | Valid          | Move if below (CF=1).                  \r\n| REX.W + 0F 46 /r| CMOVBE r64, r/m64 | RM   | Valid      | N.E.           | Move if below or equal (CF=1 or ZF=1). \r\n| 0F 42 /r        | CMOVC r16, r/m16  | RM   | Valid      | Valid          | Move if carry (CF=1).                  \r\n| REX.W + 0F 44 /r| CMOVE r64, r/m64  | RM   | Valid      | N.E.           | Move if equal (ZF=1).                  \r\n| 0F 4F /r        | CMOVG r16, r/m16  | RM   | Valid      | Valid          | Move if greater (ZF=0 and SF=OF).      \r\n| REX.W + 0F 4D /r| CMOVGE r64, r/m64 | RM   | Valid      | N.E.           | Move if greater or equal (SF=OF).      \r\n| 0F 4C /r        | CMOVL r16, r/m16  | RM   | Valid      | Valid          | Move if less (SF!= OF).                 \r\n| REX.W + 0F 4E /r| CMOVLE r64, r/m64 | RM   | Valid      | N.E.           | Move if less or equal (ZF=1 or SF!= OF).\r\n| 0F 46 /r        | CMOVNA r16, r/m16 | RM   | Valid      | Valid          | Move if not above (CF=1 or ZF=1).      \r\n| REX.W + 0F 42 /r| CMOVNAE r64, r/m64| RM   | Valid      | N.E.           | Move if not above or equal (CF=1).     \r\n| 0F 43 /r        | CMOVNB r16, r/m16 | RM   | Valid      | Valid          | Move if not below (CF=0).              \r\n| REX.W + 0F 47 /r| CMOVNBE r64, r/m64| RM   | Valid      | N.E.           | Move if not below or equal (CF=0 and   \r\n|                 |                   |      |            |                | ZF=0).                                 \r\n| 0F 43 /r        | CMOVNC r16, r/m16 | RM   | Valid      | Valid          | Move if not carry (CF=0).              \r\n| REX.W + 0F 45 /r| CMOVNE r64, r/m64 | RM   | Valid      | N.E.           | Move if not equal (ZF=0).              \r\n| 0F 4E /r        | CMOVNG r16, r/m16 | RM   | Valid      | Valid          | Move if not greater (ZF=1 or SF!= OF).  \r\n| REX.W + 0F 4C /r| CMOVNGE r64, r/m64| RM   | Valid      | N.E.           | Move if not greater or equal (SF!= OF). \r\n| 0F 4D /r        | CMOVNL r16, r/m16 | RM   | Valid      | Valid          | Move if not less (SF=OF).              \r\n| REX.W + 0F 4F /r| CMOVNLE r64, r/m64| RM   | Valid      | N.E.           | Move if not less or equal (ZF=0 and    \r\n|                 |                   |      |            |                | SF=OF).                                \r\n| 0F 41 /r        | CMOVNO r16, r/m16 | RM   | Valid      | Valid          | Move if not overflow (OF=0).           \r\n| REX.W + 0F 4B /r| CMOVNP r64, r/m64 | RM   | Valid      | N.E.           | Move if not parity (PF=0).             \r\n| 0F 49 /r        | CMOVNS r16, r/m16 | RM   | Valid      | Valid          | Move if not sign (SF=0).               \r\n| REX.W + 0F 45 /r| CMOVNZ r64, r/m64 | RM   | Valid      | N.E.           | Move if not zero (ZF=0).               \r\n| 0F 40 /r        | CMOVO r16, r/m16  | RM   | Valid      | Valid          | Move if overflow (OF=1).               \r\n| REX.W + 0F 4A /r| CMOVP r64, r/m64  | RM   | Valid      | N.E.           | Move if parity (PF=1).                 \r\n| 0F 4A /r        | CMOVPE r16, r/m16 | RM   | Valid      | Valid          | Move if parity even (PF=1).            \r\n| REX.W + 0F 4B /r| CMOVPO r64, r/m64 | RM   | Valid      | N.E.           | Move if parity odd (PF=0).             \r\n| 0F 48 /r        | CMOVS r16, r/m16  | RM   | Valid      | Valid          | Move if sign (SF=1).                   \r\n| REX.W + 0F 44 /r| CMOVZ r64, r/m64  | RM   | Valid      | N.E.           | Move if zero (ZF=1).\r\n```\r\n\r\n* fixed typo\r\n\r\n* or -> nor","distinct":true,"url":"https://api.github.com/repos/jduck/radare2/commits/18ffea18ccdcf3cf2450b9f8660795115ce0f698"},{"sha":"021a3ea8b2f87f0490d65548ea33c150d216dd12","author":{"name":"Duncan Ogilvie","email":"7485586317011d2455503f57aad19c3cad724dc8@gmail.com"},"message":"Update x86 (#5035)","distinct":true,"url":"https://api.github.com/repos/jduck/radare2/commits/021a3ea8b2f87f0490d65548ea33c150d216dd12"},{"sha":"216de66e68130fb9953b916a5d102ddb1bce19ee","author":{"name":"Duncan Ogilvie","email":"7485586317011d2455503f57aad19c3cad724dc8@gmail.com"},"message":"fixed jcc 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