{"push_id":1231644110,"size":7,"distinct_size":7,"ref":"refs/heads/master","head":"ca2a8fe0273c3b4701a9f213721df54706c08bcf","before":"468da113eb8000a12226211da0025a4979019a76","commits":[{"sha":"80826e9cecee8064c6e81e4b8fc8b6b687ab7ed7","author":{"name":"Krzysztof Parzyszek","email":"40979b2c4eb65586fe7bead22e2c9fb24795e47a@codeaurora.org"},"message":"[Hexagon] Improvements to address mode checks in TargetLowering\n\n- Implement getOptimalMemOpType.\n- Check BaseOffset in isLegalAddressingMode.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277494 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/80826e9cecee8064c6e81e4b8fc8b6b687ab7ed7"},{"sha":"a4768dd4d6d184ab4957971fd48aba9b361bc704","author":{"name":"Krzysztof Parzyszek","email":"40979b2c4eb65586fe7bead22e2c9fb24795e47a@codeaurora.org"},"message":"[Hexagon] Remove unused option\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277496 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/a4768dd4d6d184ab4957971fd48aba9b361bc704"},{"sha":"887045e6364dbd92800ae1c33d9181fc88c88067","author":{"name":"Krzysztof Parzyszek","email":"40979b2c4eb65586fe7bead22e2c9fb24795e47a@codeaurora.org"},"message":"[Hexagon] Prefer _io over _rr for 64-bit store with constant offset\n\nIdentify patterns where the address is aligned to an 8-byte boundary,\nbut both the base address and the constant offset are both proper\nmultiples of 4. In such cases, extract Base+4 into a separate instruc-\ntion, and use S2_storerd_io, instead of using S4_storerd_rr.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277497 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/887045e6364dbd92800ae1c33d9181fc88c88067"},{"sha":"ad029b1606cdb5b7b34614acab71e47481203102","author":{"name":"Ahmed Bougacha","email":"f94c8c31282d444042829284d0628a0bd66a3a17@gmail.com"},"message":"[AArch64] Remove useless 'import re' from CodeGen lit.local.cfg. NFC.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277498 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/ad029b1606cdb5b7b34614acab71e47481203102"},{"sha":"12be53e60b8aedb68eaa236bfca9730083add28e","author":{"name":"Ahmed Bougacha","email":"f94c8c31282d444042829284d0628a0bd66a3a17@gmail.com"},"message":"[AArch64][GlobalISel] Replace test REQUIRES with lit.local.cfg. NFC.\n\nI forgot the REQUIRES once (see r277486).\nLet's prevent it from happening again.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277499 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/12be53e60b8aedb68eaa236bfca9730083add28e"},{"sha":"a5b081966819cd83346c3ddde16bedb0e53b3960","author":{"name":"Nicolai Hahnle","email":"4e56b600684d1796fade77a494abd6e807914572@gmail.com"},"message":"AMDGPU: Track physical registers in SIWholeQuadMode\n\nSummary:\nThere are cases where uniform branch conditions are computed in VGPRs, and\nwe didn't correctly mark those as WQM.\n\nThe stray change in basic-branch.ll is because invoking the LiveIntervals\nanalysis leads to the detection of a dead register that would otherwise not\nbe seen at -O0.\n\nThis is a candidate for the 3.9 branch, as it fixes a possible hang.\n\nReviewers: arsenm, tstellarAMD, mareko\n\nSubscribers: arsenm, llvm-commits, kzhuravl\n\nDifferential Revision: https://reviews.llvm.org/D22673\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277500 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/a5b081966819cd83346c3ddde16bedb0e53b3960"},{"sha":"ca2a8fe0273c3b4701a9f213721df54706c08bcf","author":{"name":"Nirav Dave","email":"e5fe09cb04eb873e6b01e3b4b0812f816df536f9@google.com"},"message":"Fix handling of end-of-line preprocessor comments Attempt 2\n\nAttempt 2: Retryign after Tsan.mman test fix.\n\nAttempt 1: Recommitting after fixing test.\n\nWhen parsing assembly where the line comment syntax is not hash, the\nlexer cannot distinguish between hash's that start a hash line comment\nand one that is part of an assembly statement and must be distinguished\nduring parsing. Previously, this was incompletely handled by not checking\nfor EndOfStatement at the end of statements and interpreting hash\nprefixed statements as comments.\n\nChange EndOfStatement Parsing to check for Hash comments and reintroduce\nHash statement parsing to catch previously handled cases.\n\nReviewers: rnk, majnemer\n\nSubscribers: llvm-commits\n\nDifferential Revision: https://reviews.llvm.org/D23017\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277501 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/earl/llvm-mirror/commits/ca2a8fe0273c3b4701a9f213721df54706c08bcf"}]}
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