{"push_id":1406811277,"size":144,"distinct_size":143,"ref":"refs/heads/master","head":"5ea13a8fc6090d672074100a9e7dc1b9a1deffa0","before":"df79a9c8cb2d075cd28d72097e78f4dbe4e6bfc5","commits":[{"sha":"63165f6ae3bac1623be36d4b3ce63afa1d51a30a","author":{"name":"Bob Wilson","email":"7c5eae777f2f931b88276c193af2692b92e72e0a@apple.com"},"message":"Use _Unwind_Backtrace on Apple platforms.\n\nDarwin's backtrace() function does not work with sigaltstack (which was\nenabled when available with r270395) — it does a sanity check to make\nsure that the current frame pointer is within the expected stack area\n(which it is not when using an alternate stack) and gives up otherwise.\nThe alternative of _Unwind_Backtrace seems to work fine on macOS, so use\nthat when backtrace() fails. Note that we then use backtrace_symbols_fd()\nwith the addresses from _Unwind_Backtrace, but I’ve tested that and it\nalso seems to work fine. rdar://problem/28646552\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286851 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":false,"url":"https://api.github.com/repos/jvesely/llvm/commits/63165f6ae3bac1623be36d4b3ce63afa1d51a30a"},{"sha":"3b7c9b9cdb4f15e7cacf17a99fd97a1400ebc329","author":{"name":"Zachary Turner","email":"8eb50e0e9adf1181ea7c0e90037815a870ea54ae@google.com"},"message":"[PDB] Add documentation for the PDB Stream.\n\nhttps://reviews.llvm.org/D26516\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286852 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/3b7c9b9cdb4f15e7cacf17a99fd97a1400ebc329"},{"sha":"576eea861d3acf2909e1122797624347836da49f","author":{"name":"Zachary Turner","email":"8eb50e0e9adf1181ea7c0e90037815a870ea54ae@google.com"},"message":"[PDB] Add documentation for the DBI Stream.\n\nDifferential Revision: https://reviews.llvm.org/D26552\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286853 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/576eea861d3acf2909e1122797624347836da49f"},{"sha":"b0a9b661224c1ba8f00a8569245daabcccac1eea","author":{"name":"Zvi Rackover","email":"b45251dd610b3e43e78bd6a8012e8d1de2fc00e4@intel.com"},"message":"[X86] Adding reproducer for pr30981\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286855 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/b0a9b661224c1ba8f00a8569245daabcccac1eea"},{"sha":"af761456000bd5061a70daf4885c1e2cf3da07bc","author":{"name":"Changpeng Fang","email":"592b11ff12b5daadf262f688a042d7e6849cf412@gmail.com"},"message":"AMDGPU/SI: Support data types other than V4f32 in image intrinsics\n\nSummary:\n  Extend image intrinsics to support data types of V1F32 and V2F32.\n\n  TODO: we should define a mapping table to change the opcode for data type of V2F32 but just one channel is active,\n  even though such case should be very rare.\n\nReviewers:\n  tstellarAMD\n\nDifferential Revision:\n  http://reviews.llvm.org/D26472\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286860 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/af761456000bd5061a70daf4885c1e2cf3da07bc"},{"sha":"f9632454797b43a6c53922de2236af5fab85eef7","author":{"name":"Adam Nemet","email":"83a6a0c0be29416f5c01d64e7a687006e7b3bf4b@apple.com"},"message":"[opt-viewer] Don't fail with remarks without debug location\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286861 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/f9632454797b43a6c53922de2236af5fab85eef7"},{"sha":"41723f358e48ab18edc86636d46ac1c91dcc9a98","author":{"name":"Sean Fertile","email":"8a1ac7333fe78ebce04723c8b429b562dfb649b9@ca.ibm.com"},"message":"[PPC] Add intrinsic mapping to the xscvhpsp instruction\n\nadd an intrinsic to expose the 'VSX Scalar Convert Half-Precision to\nSingle-Precision' instruction.\n\nDifferential review: https://reviews.llvm.org/D26536\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286862 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/41723f358e48ab18edc86636d46ac1c91dcc9a98"},{"sha":"b13bcfd92141f31782952f7b16bdefedab5b21b5","author":{"name":"Michael Kuperstein","email":"03ce15697219703fd50a2fdabb7e1a0083bf664b@google.com"},"message":"Give SLP vectorizer credit where it's due.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286865 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/b13bcfd92141f31782952f7b16bdefedab5b21b5"},{"sha":"c822bf16138bf54ba230d11e2e2ea1a9c9147494","author":{"name":"Tim Northover","email":"f2f324cbf35679814b7526a760f2841b68589222@apple.com"},"message":"ARM: sort register lists by encoding in push/pop instructions.\n\nFor example we were producing\n\n    push {r8, r10, r11, r4, r5, r7, lr}\n\nThis is misleading (r4, r5 and r7 are actually pushed before the rest), and\nother components (stack folding recently) often forget to deal with the extra\ncomplexity coming from the different order, leading to miscompiles. Finally, we\nwarn about our own code in -no-integrated-as mode without this, which is really\nnot a good idea.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286866 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/c822bf16138bf54ba230d11e2e2ea1a9c9147494"},{"sha":"561fa2fb3a1e8dddb2a4d0e8fc547eb29a99a905","author":{"name":"Tim Northover","email":"f2f324cbf35679814b7526a760f2841b68589222@apple.com"},"message":"Revert \"ARM: sort register lists by encoding in push/pop instructions.\"\n\nThis reverts commit 286866. It broke a bot, something to do with exactly which\ntemplates std::sort accepts.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286867 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/561fa2fb3a1e8dddb2a4d0e8fc547eb29a99a905"},{"sha":"ab5d486ddeefd16b0efcfb3d05d6acdfabc3e2f0","author":{"name":"Daniel Sanders","email":"345ca064068ab0041c7263b072954722ba7b7c8d@gmail.com"},"message":"Test commit\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286868 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/ab5d486ddeefd16b0efcfb3d05d6acdfabc3e2f0"},{"sha":"1505b20964a67e045c1f1c17dd76612ee21b6eb9","author":{"name":"Daniel Sanders","email":"345ca064068ab0041c7263b072954722ba7b7c8d@gmail.com"},"message":"Revert: r286868 - Test commit\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286869 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/1505b20964a67e045c1f1c17dd76612ee21b6eb9"},{"sha":"43aeb78cb8068723e61f6cb832cd008d3efe8401","author":{"name":"Kostya Serebryany","email":"929ea1a85e127c0f9ffdb8680cf24d3fc1a6e9ce@google.com"},"message":"[libFuzzer] replace 'auto' with 'auto *' to better follow the LLVM style\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286870 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/43aeb78cb8068723e61f6cb832cd008d3efe8401"},{"sha":"52fb4f34b6f595c9995d5cc5884c27e398205780","author":{"name":"Teresa Johnson","email":"86073e34b918e7c41ae3dc36d84d2a9e60368583@google.com"},"message":"[ThinLTO] Only promote exported locals as marked in index\n\nSummary:\nWe have always speculatively promoted all renamable local values\n(except const non-address taken variables) for both the exporting\nand importing module. We would then internalize them back based on\nthe ThinLink results if they weren't actually exported. This is\ninefficient, and results in unnecessary renames. It also meant we\nhad to check the non-renamability of a value in the summary, which\nwas already checked during function importing analysis in the ThinLink.\n\nMade renameModuleForThinLTO (which does the promotion/renaming) instead\nuse the index when exporting, to avoid unnecessary renames/promotions.\nFor importing modules, we can simply promoted all values as any local\nwe import by definition is exported and needs promotion.\n\nThis required changes to the method used by the FunctionImport pass\n(only invoked from 'opt' for testing) and when invoked from llvm-link,\nsince neither does a ThinLink. We simply conservatively mark all locals\nin the index as promoted, which preserves the current aggressive\npromotion behavior.\n\nI also needed to change an llvm-lto based test where we had previously\nbeen aggressively promoting values that weren't importable (aliasees),\nbut now will not promote.\n\nReviewers: mehdi_amini\n\nSubscribers: llvm-commits\n\nDifferential Revision: https://reviews.llvm.org/D26467\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286871 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/52fb4f34b6f595c9995d5cc5884c27e398205780"},{"sha":"0763004de3308dfbaf354489441c4988923e1d40","author":{"name":"Geoff Berry","email":"2c3726c5ed4c5d6270c4d02b9a957d919a1974ad@codeaurora.org"},"message":"[AArch64] Factor out transform code from split16BStore.  NFC.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286874 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/0763004de3308dfbaf354489441c4988923e1d40"},{"sha":"9640691bf4a4a6a3eda0634526e46fa1b270b867","author":{"name":"Geoff Berry","email":"2c3726c5ed4c5d6270c4d02b9a957d919a1974ad@codeaurora.org"},"message":"[AArch64] Split 0 vector stores into scalar store pairs.\n\nSummary:\nReplace a splat of zeros to a vector store by scalar stores of WZR/XZR.\nThe load store optimizer pass will merge them to store pair stores.\nThis should be better than a movi to create the vector zero followed by\na vector store if the zero constant is not re-used, since one\ninstructions and one register live range will be removed.\n\nFor example, the final generated code should be:\n\n  stp xzr, xzr, [x0]\n\ninstead of:\n\n  movi v0.2d, #0\n  str q0, [x0]\n\nReviewers: t.p.northover, mcrosier, MatzeB, jmolloy\n\nSubscribers: aemerson, rengolin, llvm-commits\n\nDifferential Revision: https://reviews.llvm.org/D26561\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286875 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/9640691bf4a4a6a3eda0634526e46fa1b270b867"},{"sha":"2c2c719b70dd52faa4d3ed4d65e2cf96df6a6786","author":{"name":"Michael Kuperstein","email":"03ce15697219703fd50a2fdabb7e1a0083bf664b@google.com"},"message":"[X86] Tests exhibiting bad parial reloading behavior. NFC.\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286878 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/2c2c719b70dd52faa4d3ed4d65e2cf96df6a6786"},{"sha":"bf09fb4d18c6b86cb6996bca1d1b4c4a3fd39dce","author":{"name":"Geoff Berry","email":"2c3726c5ed4c5d6270c4d02b9a957d919a1974ad@codeaurora.org"},"message":"[AArch64] Change some pointers to references. NFC.\n\nFollow-up change to r286875.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286879 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/bf09fb4d18c6b86cb6996bca1d1b4c4a3fd39dce"},{"sha":"fcc03ff315b34590d26ec77144def6e7d08564ea","author":{"name":"Tim Northover","email":"f2f324cbf35679814b7526a760f2841b68589222@apple.com"},"message":"Recommit: ARM: sort register lists by encoding in push/pop instructions.\n\nFor example we were producing\n\n    push {r8, r10, r11, r4, r5, r7, lr}\n\nThis is misleading (r4, r5 and r7 are actually pushed before the rest), and\nother components (stack folding recently) often forget to deal with the extra\ncomplexity coming from the different order, leading to miscompiles. Finally, we\nwarn about our own code in -no-integrated-as mode without this, which is really\nnot a good idea.\n\nFixed usage of std::sort so that we (hopefully) use instantiations that\nactually exist in GCC 4.8.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286881 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/fcc03ff315b34590d26ec77144def6e7d08564ea"},{"sha":"b5aa1e1bb02b7a8d2c468d939c3a120de9f7e49c","author":{"name":"Tim Northover","email":"f2f324cbf35679814b7526a760f2841b68589222@apple.com"},"message":"ARM: try to fix GCC 4.8 compilation again after r286881.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286882 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/jvesely/llvm/commits/b5aa1e1bb02b7a8d2c468d939c3a120de9f7e49c"}]}
{"actor":{"display_login":"jvesely"}}