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Usage count = 1\n\nHere is a script to reproduce the problem:\n\nip link set dev ntfp2 up\nip addr add dev ntfp2 2001::1/64\nip link add vti6_test type vti6 local 2001::1 remote 2001::2 key 1\nip netns add secure\nip link set vti6_test netns secure\nip netns exec secure ip link set vti6_test up\nip netns exec secure ip link s lo up\nip netns exec secure ip addr add dev vti6_test 2003::1/64\nip -6 xfrm policy add dir out tmpl src 2001::1 dst 2001::2 proto esp \\\n\t   mode tunnel mark 1\nip -6 xfrm policy add dir in tmpl src 2001::2 dst 2001::1 proto esp \\\n\t   mode tunnel mark 1\nip xfrm state add src 2001::1 dst 2001::2 proto esp spi 1 mode tunnel \\\n\t   enc des3_ede 0x112233445566778811223344556677881122334455667788 mark 1\nip xfrm state add src 2001::2 dst 2001::1 proto esp spi 1 mode tunnel \\\n\t   enc des3_ede 0x112233445566778811223344556677881122334455667788 mark 1\nip netns exec secure  ping6 -c 4 2003::2\nip netns del secure\n\nCC: Lance Richardson <lrichard@redhat.com>\nSigned-off-by: Nicolas Dichtel <nicolas.dichtel@6wind.com>\nAcked-by: Lance Richardson <lrichard@redhat.com>\nSigned-off-by: Steffen Klassert <steffen.klassert@secunet.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/7f92083eb58f85ea114d97f65fcbe22be5b0468d"},{"sha":"c699995663b40d61afcc14ca27f0106f13151772","author":{"name":"Axel Lin","email":"439824e56c03fefbb279ae8bcff31e6846195d73@ingics.com"},"message":"pwm: meson: Add missing spin_lock_init()\n\nThe driver uses the spin_lock but does not initialize it. Fix it.\n\nSigned-off-by: Axel Lin <axel.lin@ingics.com>\nAcked-by: Neil Armstrong <narmstrong@baylibre.com>\nSigned-off-by: Thierry Reding <thierry.reding@gmail.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/c699995663b40d61afcc14ca27f0106f13151772"},{"sha":"18eddaedc940a49425364df98abda218ce1e771c","author":{"name":"Wei Yongjun","email":"cea121043064f325ec96cf17db61a214210a3ed7@huawei.com"},"message":"mvsas: fix error return code in mvs_task_prep()\n\nFix to return error code -ENOMEM from the error handling\ncase instead of 0, as done elsewhere in this function.\n\nSigned-off-by: Wei Yongjun <weiyongjun1@huawei.com>\nSigned-off-by: Tejun Heo <tj@kernel.org>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/18eddaedc940a49425364df98abda218ce1e771c"},{"sha":"e0029dcb5b6e1c23e68f578ce7a3d6c5caba0501","author":{"name":"Hannes Reinecke","email":"c802d579f78de31b50f3cfc7051ff9bf41402746@suse.de"},"message":"libata-scsi: Fixup ata_gen_passthru_sense()\n\nThere's a typo in ata_gen_passthru_sense(), where the first byte\nwould be overwritten incorrectly later on.\n\nReported-by: Charles Machalow <csm10495@gmail.com>\nSigned-off-by: Hannes Reinecke <hare@suse.com>\nFixes: 11093cb1ef56 (\"libata-scsi: generate correct ATA pass-through sense\")\nCc: stable@vger.kernel.org # v4.7+\nSigned-off-by: Tejun Heo <tj@kernel.org>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/e0029dcb5b6e1c23e68f578ce7a3d6c5caba0501"},{"sha":"53b963b603d7839556ea51cbb1db755882796e95","author":{"name":"Rex Zhu","email":"3a9d080477182c2d7ee7ba2fadfb0f22cd28ae80@amd.com"},"message":"drm/amd/powerplay: add new bit mask to ctrl clock stretch feature.\n\nSigned-off-by: Rex Zhu <Rex.Zhu@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/53b963b603d7839556ea51cbb1db755882796e95"},{"sha":"a08d8c929f770d16fcff04ee0c30a29270cc2b94","author":{"name":"Rex Zhu","email":"3a9d080477182c2d7ee7ba2fadfb0f22cd28ae80@amd.com"},"message":"drm/amd/powerplay: make CAC feature controlled by module parameter.\n\nuse same module parameter with powercontainment\n\nSigned-off-by: Rex Zhu <Rex.Zhu@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/a08d8c929f770d16fcff04ee0c30a29270cc2b94"},{"sha":"a414cd708b1617d6b31acdc74a6cfecbae2a172f","author":{"name":"Huang Rui","email":"36c602cf7858180bb4e235877d5b1b89d8b31880@amd.com"},"message":"drm/amdgpu: cleanup amdgpu_cs_ioctl to make code logicality clear\n\nSigned-off-by: Huang Rui <ray.huang@amd.com>\nReviewed-by: Christian König <christian.koenig@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/a414cd708b1617d6b31acdc74a6cfecbae2a172f"},{"sha":"47ecd3c4e09ee8dfd1dbd2728278ccec78ab43b9","author":{"name":"Huang Rui","email":"36c602cf7858180bb4e235877d5b1b89d8b31880@amd.com"},"message":"drm/amdgpu: remove amdgpu_cs_handle_lockup\n\nIn fence waiting, it never return -EDEADLK yet, so drop this function\nhere.\n\nSigned-off-by: Huang Rui <ray.huang@amd.com>\nReviewed-by: Christian König <christian.koenig@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/47ecd3c4e09ee8dfd1dbd2728278ccec78ab43b9"},{"sha":"72a16a9d59ee0de87d9899959978b8e8f6da8438","author":{"name":"Grazvydas Ignotas","email":"05f4863900d7e96122f996a9659796ff4f4fd501@gmail.com"},"message":"drm/amd/powerplay: export a function to read fan rpm\n\nPowerplay hwmgr already has an implementation, all we need to do is to call it.\n\nSigned-off-by: Grazvydas Ignotas <notasas@gmail.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/72a16a9d59ee0de87d9899959978b8e8f6da8438"},{"sha":"81c1514bf8db9aee71bc6e610a62d64a865e06a4","author":{"name":"Grazvydas Ignotas","email":"05f4863900d7e96122f996a9659796ff4f4fd501@gmail.com"},"message":"drm/amd/amdgpu: expose fan rpm though hwmon\n\nOnly for cards that are supported by powerplay.\n\nSigned-off-by: Grazvydas Ignotas <notasas@gmail.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/81c1514bf8db9aee71bc6e610a62d64a865e06a4"},{"sha":"f8bdce3e868742f32ebab2e377fb35ace47415c4","author":{"name":"Maruthi Srinivas Bayyavarapu","email":"9aad9e28b066c1b59e9ddcdaa573af35d131f85d@amd.com"},"message":"drm/amdgpu: enable UVD clockgating in Polaris-10/11\n\nUVD clocks are set to be disabled, when not in use.\n\nSigned-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nReviewed-by: Tom StDenis <Tom.StDenis@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/f8bdce3e868742f32ebab2e377fb35ace47415c4"},{"sha":"2068751d094104ab3f396c754ffc65058340f70e","author":{"name":"Trigger Huang","email":"42bb0c91db32914d874a8498d9819113ecd31d5b@amd.com"},"message":"drm/amdgpu: Add a ring type KIQ definition\n\nAdd a new ring type definition for KIQ. KIQ is used for interaction\nbetween driver and CP.\n\nSigned-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>\nSigned-off-by: Trigger Huang <trigger.huang@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/2068751d094104ab3f396c754ffc65058340f70e"},{"sha":"e22504425f72cf8a6d43884e4080e534e4919e61","author":{"name":"Trigger Huang","email":"42bb0c91db32914d874a8498d9819113ecd31d5b@amd.com"},"message":"drm/amdgpu:no gpu scheduler for KIQ\n\nKIQ is used for interaction between driver and\nCP, and not exposed to outside client, as such it\ndoesn't need to be handled by GPU scheduler.\n\nSigned-off-by: Monk Liu <Monk.Liu@amd.com>\nSigned-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>\nSigned-off-by: Trigger Huang <trigger.huang@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nReviewed-by: Christian König <christian.koenig@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/e22504425f72cf8a6d43884e4080e534e4919e61"},{"sha":"acd546b9fda695e97473d0fb8e744aba6b274789","author":{"name":"Trigger Huang","email":"42bb0c91db32914d874a8498d9819113ecd31d5b@amd.com"},"message":"drm/amdgpu:bypass avfs event manager for sriov\n\nThis patch is used for virtualization support. In virtualization case,\nthe initialization sequences are not totally the same as\nnon-Virtualization's. The avfs event manager should be bypassed if in\nSRIOV virtualization case. At the same, this patch will also bypass\nstarting SMC within SRIOV in FIJI, so the SMU firmware loading will be\navoid, which is required in SRIOV.\n\nSigned-off-by: Frank Min <Frank.Min@amd.com>\nSigned-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>\nSigned-off-by: Trigger Huang <trigger.huang@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/acd546b9fda695e97473d0fb8e744aba6b274789"},{"sha":"ba5f884cfa3d7fef06b9487679cc8472bf51aa25","author":{"name":"Rex Zhu","email":"3a9d080477182c2d7ee7ba2fadfb0f22cd28ae80@amd.com"},"message":"drm/amdgpu/powerplay: pp module only enable smu when dpm disabled.\n\nSigned-off-by: Rex Zhu <Rex.Zhu@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/ba5f884cfa3d7fef06b9487679cc8472bf51aa25"},{"sha":"55ff54837845ddb5387e70b0ae1231e499b85c69","author":{"name":"Rex Zhu","email":"3a9d080477182c2d7ee7ba2fadfb0f22cd28ae80@amd.com"},"message":"drm/amd/powerplay: use mask bit for deepsleep/power tune feature.\n\nSigned-off-by: Rex Zhu <Rex.Zhu@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/55ff54837845ddb5387e70b0ae1231e499b85c69"},{"sha":"801caaf66309fdd084fc170dc1bea5140389747a","author":{"name":"Rex Zhu","email":"3a9d080477182c2d7ee7ba2fadfb0f22cd28ae80@amd.com"},"message":"drm/amdgpu: use mask bit for deep sleep feature on dpm.\n\nSigned-off-by: Rex Zhu <Rex.Zhu@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/801caaf66309fdd084fc170dc1bea5140389747a"},{"sha":"3ca67300acb510f3d79688eb3c7c74d3d1984e9a","author":{"name":"Rex Zhu","email":"3a9d080477182c2d7ee7ba2fadfb0f22cd28ae80@amd.com"},"message":"drm/amdgpu: delete duplicate module parameter.\n\nSigned-off-by: Rex Zhu <Rex.Zhu@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/3ca67300acb510f3d79688eb3c7c74d3d1984e9a"},{"sha":"ce4286bfa7123d779a58c3b88481bf6dc0a54090","author":{"name":"Rex Zhu","email":"3a9d080477182c2d7ee7ba2fadfb0f22cd28ae80@amd.com"},"message":"drm/amd/powerplay: fix code style\n\nSigned-off-by: Rex Zhu <Rex.Zhu@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/ce4286bfa7123d779a58c3b88481bf6dc0a54090"},{"sha":"4c696ecf4f87617f3bfd8fb8ecf20e879b635954","author":{"name":"Rex Zhu","email":"3a9d080477182c2d7ee7ba2fadfb0f22cd28ae80@amd.com"},"message":"drm/amd/powerplay: enable voltage control by default for dgpu.\n\nSigned-off-by: Rex Zhu <Rex.Zhu@amd.com>\nReviewed-by: Alex Deucher <alexander.deucher@amd.com>\nSigned-off-by: Alex Deucher <alexander.deucher@amd.com>","distinct":false,"url":"https://api.github.com/repos/mkahola/drm-intel-mika/commits/4c696ecf4f87617f3bfd8fb8ecf20e879b635954"}]}
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