{"push_id":980798673,"size":24,"distinct_size":24,"ref":"refs/heads/LA.BR.1.3.2.c2","head":"3d2ed096a7e8520b13b4666be9651fe91dbae9f1","before":"4f70f735f7b4c03b41146c668806ff384767e913","commits":[{"sha":"5c7aeb2a55093a38074edd6fcec1b907136c3417","author":{"email":"70becbe43127a4bc17dee0650a3bb96353930cd0@codeaurora.org","name":"Venkat Gopalakrishnan"},"message":"mmc: block: fix DCMD timeout err handling\n\nDCMD requests don't have data, check for the data pointer before\naccessing it to prevent null pointer dereference in case of DCMD\ntimeout err. Also signal a completion event for non flush requests\nlike discard that wait for the completion of DCMD request.\n\nChange-Id: Ia71a5f1e278a039ba22f6ac42614d9ae79dba7e9\nSigned-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/5c7aeb2a55093a38074edd6fcec1b907136c3417"},{"sha":"3fbebf50addc37be7549431fb492b77c4e0afb7c","author":{"email":"9dca834b0a38e96a2a5a05425ca5e3d7c89ca765@codeaurora.org","name":"Ritesh Harjani"},"message":"mmc: sdhci: Handle cmdq_irq before clearing error interrupt.\n\ncmdq_irq should be handled before clearning error interrupt.\nBecause in case of an error CQE needs to be halted/disabled\nin cmdq_irq, before we clear the error interrupt.\nOtherwise, CQE might start processing other requests whose\ndoorbell is set, even in case of error in previous completed\nrequest.\n\nChange-Id: I8c77ca08dcf440293844120c1b59d2dada84bac5\nSigned-off-by: Ritesh Harjani <riteshh@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/3fbebf50addc37be7549431fb492b77c4e0afb7c"},{"sha":"e112665327ac07c762c75d51e90ba6b57394c48d","author":{"email":"9dca834b0a38e96a2a5a05425ca5e3d7c89ca765@codeaurora.org","name":"Ritesh Harjani"},"message":"mmc: cmdq_hci: Helper API/info in cmdq for halt\n\nThis patch adds following helper API/info -\n\n1. cmdq_halt_poll to halt the controller using polling\nmethod. This is to be mainly used in case of an error\nfrom cmdq_irq context.\n\n2. Adds num_cq_slots & dcmd_cq_slot info to\nmmc_host structure. This can be useful info\nfor mmc host structure like in case of handling\nof multiple error requests\n\n3. Adds CMDQ_STATE_CQ_DISABLE for cmdq host.\nIn case of an error if halt also fails, CQE error handling\ncode will disable CQ. So block layer needs to know\n- to not pull any requests in such case.\n\nChange-Id: I8e9a8d5094db82336917fcca4361ce84316c34ef\nSigned-off-by: Ritesh Harjani <riteshh@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/e112665327ac07c762c75d51e90ba6b57394c48d"},{"sha":"30b3c6019d4f3b50621c8f7bcb38eb21babdd5e8","author":{"email":"9dca834b0a38e96a2a5a05425ca5e3d7c89ca765@codeaurora.org","name":"Ritesh Harjani"},"message":"mmc: queue: Check for CQE disable state and remove requeuing\n\n1. Add a check in mmc_cmdq_should_pull_reqs to not pull.\nAny requests in case if CQE is disabled and card is not suspended.\nThis means that CQE must be in error state and so mmc_cmdq_thread\nshould stop issuing requests.\n\n2. Do not requeue the request in case of error in issue path.\nIdeally there should not be any error in the issue path\nof request. Even if there is an error, we should not\nrequeue this request as (like in case of DCMD,\nblk_end_request with partial bytes of completion will\nmake sure that request is not finished and still can be\nfetched). So requeing the same request which is still in\nelevator is illegal.\n\nChange-Id: I0c5e6556d3d881f1a675db4fff4f995de024ddf8\nSigned-off-by: Ritesh Harjani <riteshh@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/30b3c6019d4f3b50621c8f7bcb38eb21babdd5e8"},{"sha":"69e5f7e74a9641902d45f5a5eeabaaf059c32f52","author":{"email":"9dca834b0a38e96a2a5a05425ca5e3d7c89ca765@codeaurora.org","name":"Ritesh Harjani"},"message":"mmc: cmdq_hci: Add CQE WA for CQE HW bugs\n\nThis adds WA to handle few CQE error which\ncan cause HALT to fail or can give CQTERRI info\nas NULL.\nLike - currently there is a HW bug that in\ncase of ADMA error CQE will not stop and CQTERRI\nregister will not be updated with any valid values.\nHalt will also most likely fail in case of ADMA error.\n\nThus possible WA for this is to disable CQE,\ndo reset_all and requeue all the requests in flight.\n\nChange-Id: I5aaddbb7bec1de7dbc959144dc2f1a5ad16789ff\nSigned-off-by: Ritesh Harjani <riteshh@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/69e5f7e74a9641902d45f5a5eeabaaf059c32f52"},{"sha":"5f478ddc9b9d0251159a21ada5f3d15a5604c2c2","author":{"email":"9dca834b0a38e96a2a5a05425ca5e3d7c89ca765@codeaurora.org","name":"Ritesh Harjani"},"message":"mmc: core: Call cmdq_post_req with tag info instead of mrq\n\nCall mmc_/cmdq_post_req with tag number instead of\nmrq. This is needed in error handling as part of multiple\nrequest error handling.\n\nChange-Id: I175432639d28378ec74669e31deb4d1667c49bb8\nSigned-off-by: Ritesh Harjani <riteshh@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/5f478ddc9b9d0251159a21ada5f3d15a5604c2c2"},{"sha":"25abd1bfeeb527dcbf27c25237c4dc3d5ea04fce","author":{"email":"9dca834b0a38e96a2a5a05425ca5e3d7c89ca765@codeaurora.org","name":"Ritesh Harjani"},"message":"mmc: core: cmdq helper for reset and claim host context\n\nThis patch does following-\n\nThis adds an API(mmc_cmdq_hw_reset), for RESET_ALL\nof SDHCI, power cycle mmc card and\nreintialize it, which enables cmdq as well(if supported).\n\nThis acquires claim_host before calling mmc_power_restore.\nmmc_power_restore should be called with claim_host acquired,\nsince this function is required from non-claim-host context in\ncmdq error handling.\n\nChange-Id: I31c4449dead1d4ad4e10a4822cce2298ec5fb4b6\nSigned-off-by: Ritesh Harjani <riteshh@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/25abd1bfeeb527dcbf27c25237c4dc3d5ea04fce"},{"sha":"455a89447aafe4d001b90e09e61bf1cadf9699f6","author":{"email":"9dca834b0a38e96a2a5a05425ca5e3d7c89ca765@codeaurora.org","name":"Ritesh Harjani"},"message":"mmc: block: Error handling fixes and support of reset_all\n\nThis does following:\n\n1. Adds support to handle multiple cmdq software requests timeout.\n   Currently we schedule error handling work for the first timedout\n   request. We requeue all pending tasks, knock off all tasks from\n   device queue and reset card and controller as part of this, then\n   for all other software requests timeout, if it comes while executing\n   error work, we return BLK_EH_NOT_HANDLED.\n   This fixes BUG_ON in case of multiple requests timesout together.\n\n2. Current code resets CQE, power cycle the card and requeue all the\n   requests in case of any error.\n\n3. mmc_blk_cmdq_err work takes care freeing up all resource allocation\n   like clk and rpm hold, in case of reset_all.\n\n4. Currently we were never clearing error CMDQ_STATE_ERR in case of any\n   error. This patch takes care of this bug.\n\nChange-Id: I83d483c11fe2d7f2e462086cc3c0932057304c0d\nSigned-off-by: Ritesh Harjani <riteshh@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/455a89447aafe4d001b90e09e61bf1cadf9699f6"},{"sha":"08706581a304f4af57837dc1ceb7c79ad08ab874","author":{"email":"9dca834b0a38e96a2a5a05425ca5e3d7c89ca765@codeaurora.org","name":"Ritesh Harjani"},"message":"mmc: block: cmdq discard should use softirq completion path\n\nCurrently cmdq discard requests are not using same\nsoftirq completion path as other cmdq request. So there\nis no way to detect any error and handle it in case\nof error of DCMD requests.\n\nMake cmdq discard requests use blk_complete_requests\nwhich complete via softirq completion path.\n\nChange-Id: I1e03c81bc6fee8266cf1c86bada015e548770d7a\nSigned-off-by: Ritesh Harjani <riteshh@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/08706581a304f4af57837dc1ceb7c79ad08ab874"},{"sha":"aeacd2bce4c02520ebe09af8b57a669ea3220bf3","author":{"email":"9dca834b0a38e96a2a5a05425ca5e3d7c89ca765@codeaurora.org","name":"Ritesh Harjani"},"message":"mmc: block: Do not call post_req in DCMD case\n\nNo need to call post_req if it's a DCMD request\ncompletion.\n\nChange-Id: Id11165967e316b1e556aaeb6d67bd18844cee6e1\nSigned-off-by: Ritesh Harjani <riteshh@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/aeacd2bce4c02520ebe09af8b57a669ea3220bf3"},{"sha":"ec13c77b630abe095c751dc2439f5a19632ae1e5","author":{"email":"70becbe43127a4bc17dee0650a3bb96353930cd0@codeaurora.org","name":"Venkat Gopalakrishnan"},"message":"mmc: cmdq_hci: Add a memory barrier before ringing doorbell\n\nEnsure the task descriptor list memory is flushed before ringing\nthe doorbell by adding a memory barrier. Also commit the doorbell\nwrite immediately to help improve performance.\n\nChange-Id: I321d5bed95b802d4bcc00836ce9cdede316b29f5\nSigned-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/ec13c77b630abe095c751dc2439f5a19632ae1e5"},{"sha":"d8dc1b246b274134b80d4b98a74be9be44120a6f","author":{"email":"3dfdb3c373a87da388d8e2ffb6d98ee856e99a5c@codeaurora.org","name":"Sayali Lokhande"},"message":"mmc: sdhci: Add eMMC fw version and manfid in sdhci_dump_state\n\nAdding eMMC FW version and Manfid as a part of register dump\nfor debugging purpose and getting fw related information.\n\nChange-Id: Iac26ca8f054b18da3a7e13f4d28b6f16a2c8d790\nSigned-off-by: Sayali Lokhande <sayalil@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/d8dc1b246b274134b80d4b98a74be9be44120a6f"},{"sha":"dd9188fc72d2913ba2450b586c57a1160483b014","author":{"email":"9f0ed6d3046b5ad75baeafdf1880f13bc02a9180@codeaurora.org","name":"Sahitya Tummala"},"message":"mmc: sdhci-msm: Fix recursive tuning issue\n\nFor any commands, that are sent during tuning sequence\nCRC errors are expected. But if SDHCI_NEEDS_RETUNING flag\nis set, then it will recursively do the tuning and gets\nstuck in tuning. Fix this by not allowing the re-tuning\nto happen while it is already in tuning process.\n\nChange-Id: I9cc39f03a01c34f2f5639d4c20776fd575c25231\nSigned-off-by: Sahitya Tummala <stummala@codeaurora.org>\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/dd9188fc72d2913ba2450b586c57a1160483b014"},{"sha":"01af88d8c40751fd9c95e7f013c335c9aa457a85","author":{"email":"2d6c043958707047c4ef01bb953c0d91667d988e@codeaurora.org","name":"Pavan Anamula"},"message":"mmc: cmdq_hci: use %pad to print dma_addr_t to avoid 32 bit warnings\n\nInside  cmdq_dump_adma_mem(), use %pad to print dma_addr_t returned\nfrom get_trans_desc_dma(),which is to avoid 32 bit\narchitecture-dependent warnings.\n\nChange-Id: I377321342d2469618631908cceff4f152f054d50\nSigned-off-by: Pavan Anamula <pavana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/01af88d8c40751fd9c95e7f013c335c9aa457a85"},{"sha":"31f29e42cce39b40b450110a0691b3c855e44bf2","author":{"email":"d3c7bae90ce2477533ec852edf38b65198016249@localhost","name":"Linux Build Service Account"},"message":"Merge \"mmc: cmdq_hci: use %pad to print dma_addr_t to avoid 32 bit warnings\"","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/31f29e42cce39b40b450110a0691b3c855e44bf2"},{"sha":"591aeaeca64d2f5d8055ecfce4e39b15ce6845bc","author":{"email":"d3c7bae90ce2477533ec852edf38b65198016249@localhost","name":"Linux Build Service Account"},"message":"Merge \"mmc: sdhci: Add eMMC fw version and manfid in sdhci_dump_state\"","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/591aeaeca64d2f5d8055ecfce4e39b15ce6845bc"},{"sha":"bee7a7551624e12e5405b1764310c5e56da86b36","author":{"email":"d3c7bae90ce2477533ec852edf38b65198016249@localhost","name":"Linux Build Service Account"},"message":"Merge \"mmc: sdhci-msm: Fix recursive tuning issue\"","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/bee7a7551624e12e5405b1764310c5e56da86b36"},{"sha":"a45d08d79a6889552dc16db16cee8e07f3447163","author":{"email":"ed689b62f258aca7b8c4cfe3bd37072f12cbc0cd@codeaurora.org","name":"Prakash Kamliya"},"message":"msm: kgsl: Avoid L2PC on CPU big cluster\n\nIf any of the GPU rendering threads are running on\nBIG CPU cluster, avoid L2PC for some duration. This\nreduces latency on CPU and helps on performance. This\nchange uses pm_qos_update_request_timeout() API.\n\nChange-Id: I37700da6d8a3685e1a8956a2a92eadf21cc4c191\nSigned-off-by: Prakash Kamliya <pkamliya@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/a45d08d79a6889552dc16db16cee8e07f3447163"},{"sha":"e9d32f041781c4a2e8ec5df79de847f97d670f64","author":{"email":"c2628bef6ffa0036fb3a0b3cff089a3ba875af2e@codeaurora.org","name":"Dinesh K Garg"},"message":"crypto: ice: fix ICE HW setup sequence\n\nICE driver should setup ICE hardware before any caller can configure\nkeys in ICE hardware. Currently, ICE sets up clocks, bus vote and power\nregulator respectively. This order is a little wrong as setting up\nclocks could fail if power regulator is not enabled.\n\nChange-Id: I980abd9c55ce22dac1272d57c4d1af7e8960d4da\nSigned-off-by: Dinesh K Garg <dineshg@codeaurora.org>\nSigned-off-by: AnilKumar Chimata <anilc@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/e9d32f041781c4a2e8ec5df79de847f97d670f64"},{"sha":"155d4cc0c4fd07b4cc3d617438eb4aa850179eeb","author":{"email":"c2628bef6ffa0036fb3a0b3cff089a3ba875af2e@codeaurora.org","name":"Dinesh K Garg"},"message":"crypto: ice: Check right bit for BYPASS status\n\nICE driver is checking wrong bit for ICE BYPASS Status. Adding code\nto check right bit.\n\nChange-Id: Idb7f9609b3e125b2bf0b1f084960958cd01b1033\nSigned-off-by: Dinesh K Garg <dineshg@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/dianlujitao/CAF_kernel_msm-3.10/commits/155d4cc0c4fd07b4cc3d617438eb4aa850179eeb"}]}