{"push_id":1471897266,"size":55,"distinct_size":55,"ref":"refs/heads/mi5","head":"2568069da403b5937b8606c456aec761b38cdd9e","before":"b948aa5c5dbc47b84d780a7bbe728e319c4e41a1","commits":[{"sha":"8394dd94ea3832d24e90449521ec61f7d881704e","author":{"name":"Wei Fang","email":"5fdc52313a025466b5afba5df0051b6972cdfbbe@huawei.com"},"message":"scsi: avoid a permanent stop of the scsi device's request queue\n\nA race between scanning and fc_remote_port_delete() may result in a\npermanent stop if the device gets blocked before scsi_sysfs_add_sdev()\nand unblocked after.  The reason is that blocking a device sets both the\nSDEV_BLOCKED state and the QUEUE_FLAG_STOPPED.  However,\nscsi_sysfs_add_sdev() unconditionally sets SDEV_RUNNING which causes the\ndevice to be ignored by scsi_target_unblock() and thus never have its\nQUEUE_FLAG_STOPPED cleared leading to a device which is apparently\nrunning but has a stopped queue.\n\nWe actually have two places where SDEV_RUNNING is set: once in\nscsi_add_lun() which respects the blocked flag and once in\nscsi_sysfs_add_sdev() which doesn't.  Since the second set is entirely\nspurious, simply remove it to fix the problem.\n\nCc: <stable@vger.kernel.org>\nReported-by: Zengxi Chen <chenzengxi@huawei.com>\nSigned-off-by: Wei Fang <fangwei1@huawei.com>\nReviewed-by: Ewan D. Milne <emilne@redhat.com>\nSigned-off-by: Martin K. Petersen <martin.petersen@oracle.com>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/8394dd94ea3832d24e90449521ec61f7d881704e"},{"sha":"ac54b8e8ada9790d3e0d61cf56a24ed7bf09846b","author":{"name":"Aleksa Sarai","email":"4c40c10a8dd4ee84d57d38f925d73a477aa1ad53@suse.de"},"message":"fs: exec: apply CLOEXEC before changing dumpable task flags\n\nIf you have a process that has set itself to be non-dumpable, and it\nthen undergoes exec(2), any CLOEXEC file descriptors it has open are\n\"exposed\" during a race window between the dumpable flags of the process\nbeing reset for exec(2) and CLOEXEC being applied to the file\ndescriptors. This can be exploited by a process by attempting to access\n/proc/<pid>/fd/... during this window, without requiring CAP_SYS_PTRACE.\n\nThe race in question is after set_dumpable has been (for get_link,\nthough the trace is basically the same for readlink):\n\n[vfs]\n-> proc_pid_link_inode_operations.get_link\n   -> proc_pid_get_link\n      -> proc_fd_access_allowed\n         -> ptrace_may_access(task, PTRACE_MODE_READ_FSCREDS);\n\nWhich will return 0, during the race window and CLOEXEC file descriptors\nwill still be open during this window because do_close_on_exec has not\nbeen called yet. As a result, the ordering of these calls should be\nreversed to avoid this race window.\n\nThis is of particular concern to container runtimes, where joining a\nPID namespace with file descriptors referring to the host filesystem\ncan result in security issues (since PRCTL_SET_DUMPABLE doesn't protect\nagainst access of CLOEXEC file descriptors -- file descriptors which may\nreference filesystem objects the container shouldn't have access to).\n\nCc: dev@opencontainers.org\nCc: <stable@vger.kernel.org> # v3.2+\nReported-by: Michael Crosby <crosbymichael@gmail.com>\nSigned-off-by: Aleksa Sarai <asarai@suse.de>\nSigned-off-by: Al Viro <viro@zeniv.linux.org.uk>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/ac54b8e8ada9790d3e0d61cf56a24ed7bf09846b"},{"sha":"a9e558d9230ee8cba6337074819abd0abe090c94","author":{"name":"Al Viro","email":"2a537e97523ffee458777df5f34a2f8c9964f945@zeniv.linux.org.uk"},"message":"sg_write()/bsg_write() is not fit to be called under KERNEL_DS\n\nBoth damn things interpret userland pointers embedded into the payload;\nworse, they are actually traversing those.  Leaving aside the bad\nAPI design, this is very much _not_ safe to call with KERNEL_DS.\nBail out early if that happens.\n\nCc: stable@vger.kernel.org\nSigned-off-by: Al Viro <viro@zeniv.linux.org.uk>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/a9e558d9230ee8cba6337074819abd0abe090c94"},{"sha":"099b3dbac4e28b130a0fe9a0a98b136cd6b9576d","author":{"name":"Vamsi Krishna Samavedam","email":"8000888114facfe1c6c4e0bf029cd93152f92e21@codeaurora.org"},"message":"ARM: dts: msm: update qusb tune1 param for msm8996pro\n\nUpdate qusb tune1/tune5 parameter to pass USB electrical\ncompliance tests.\n\nChange-Id: I1a1eebb7c14660f9fe5336df711f1a1c9016602e\nSigned-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/099b3dbac4e28b130a0fe9a0a98b136cd6b9576d"},{"sha":"777f5864d496fff04f64a74db4fc97521d65aa5d","author":{"name":"Sheetal Sahasrabudhe","email":"3917d7e469496fa60184ba7c44031751c8f957c1@codeaurora.org"},"message":"Perf: Enable pmuv3 on 32 bit kernel\n\nAdd mechanism to detect and enable pmuv3 on 32 bit kernel.\n\nChange-Id: I56e0c5a0bb2dbc2dc1445fb578782ec5e8c98def\nSigned-off-by: Sheetal Sahasrabudhe <sheetals@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/777f5864d496fff04f64a74db4fc97521d65aa5d"},{"sha":"236748113f0c88b3411c0c3e77077d407c815ce3","author":{"name":"Srinivas Ramana","email":"e11bacfa2a24df4b2803f85b0e913ed0b7d10b7c@codeaurora.org"},"message":"soc: qcom: build kryo perf events only for MSM8996\n\nkryo perf events are specific to MSM8996 soc. So build\nthis file only when MSM8996 is enabled.\n\nChange-Id: I95aacab201d51ffb4eb8e94d2e400578cab37fc8\nSigned-off-by: Srinivas Ramana <sramana@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/236748113f0c88b3411c0c3e77077d407c815ce3"},{"sha":"04a3251da80751e772e0bba53ccfe50ea9268a1b","author":{"name":"Gaurav Kohli","email":"fa4cdfced2da09fc1995c8120f35829c0db547a8@codeaurora.org"},"message":"defconfig: msm: Enable Hardware perf event for 8937/8953 32 bit\n\nEnabling hardware perf event for 8937/8953 32 bit kernel\n\nChange-Id: I0c517aa76415c2fad3fda4f8b80e22324c3d4de6\nSigned-off-by: Gaurav Kohli <gkohli@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/04a3251da80751e772e0bba53ccfe50ea9268a1b"},{"sha":"c29ecc18ce7d4cebdb65c319c6543662fa87cc8d","author":{"name":"Harshdeep Dhatt","email":"5f7a64f998112e3b6a2da841ae7022ced31237fe@codeaurora.org"},"message":"msm: kgsl: Add and link gpu sysfs nodes\n\nAdd new sysfs nodes which satisfy a generic format requested\nby customer. Also add a new node to track GPU temperature.\nCreate links to these nodes at a generic location:\n\n/sys/kernel/gpu/\n\nCRs-Fixed: 1064728\nChange-Id: I414a07ff4f9ee14b8f882d15644b06a73d5fcf76\nSigned-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>\nSigned-off-by: Sunil Khatri <sunilkh@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/c29ecc18ce7d4cebdb65c319c6543662fa87cc8d"},{"sha":"82bdce479e2940972e7e424eea65653f5613409a","author":{"name":"Sunil Khatri","email":"c2fa09c6a63ee27656efbed7bd5e770f84d009d0@codeaurora.org"},"message":"ARM: dts: msm: Specify the temperature sensor name for msm8996\n\nSpecify the name of GPU temperature sensor in the device tree.\nThis name is used to get the sensor's temperature by querying the\nthermal driver API.\n\nCRs-Fixed: 1064728\nChange-Id: Ia93d93a442aa848cbd42a5fb8ecad5ef875f9abf\nSigned-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>\nSigned-off-by: Sunil Khatri <sunilkh@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/82bdce479e2940972e7e424eea65653f5613409a"},{"sha":"ee66bc96486d4f1ae2e9df7a8caa4b610c681923","author":{"name":"Smriti Gupta","email":"ce2c5014a7c87f18352fa2e2c644740d5da796c8@codeaurora.org"},"message":"radio: initialize spacing to default value.\n\nInitialize spacing to default value 0 to avoid undefined behaviour in some\ncode branches.\n\nChange-Id: I072e507b005236a4d08fa192135b37e32780d59c\nCRs-fixed: 1070487\nSigned-off-by: Smriti Gupta <smritig@codeaurora.org>\nSigned-off-by: Rupesh Tatiya <rtatiya@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/ee66bc96486d4f1ae2e9df7a8caa4b610c681923"},{"sha":"3277ca0decd9e20614830d5c90f29089e88daa15","author":{"name":"Suzuki K. Poulose","email":"239e6ad0fed873c6240fa61c5ed99f611cd6b279@arm.com"},"message":"ARM: perf: reject groups spanning multiple hardware PMUs\n\nThe perf core implicitly rejects events spanning multiple HW PMUs, as in\nthese cases the event->ctx will differ. However this validation is\nperformed after pmu::event_init() is called in perf_init_event(), and\nthus pmu::event_init() may be called with a group leader from a\ndifferent HW PMU.\n\nThe ARM PMU driver does not take this fact into account, and when\nvalidating groups assumes that it can call to_arm_pmu(event->pmu) for\nany HW event. When the event in question is from another HW PMU this is\nwrong, and results in dereferencing garbage.\n\nThis patch updates the ARM PMU driver to first test for and reject\nevents from other PMUs, moving the to_arm_pmu and related logic after\nthis test. Fixes a crash triggered by perf_fuzzer on Linux-4.0-rc2, with\na CCI PMU present:\n\n ---\nCPU: 0 PID: 1527 Comm: perf_fuzzer Not tainted 4.0.0-rc2 #57\nHardware name: ARM-Versatile Express\ntask: bd8484c0 ti: be676000 task.ti: be676000\nPC is at 0xbf1bbc90\nLR is at validate_event+0x34/0x5c\npc : [<bf1bbc90>]    lr : [<80016060>]    psr: 00000013\n...\n[<80016060>] (validate_event) from [<80016198>] (validate_group+0x28/0x90)\n[<80016198>] (validate_group) from [<80016398>] (armpmu_event_init+0x150/0x218)\n[<80016398>] (armpmu_event_init) from [<800882e4>] (perf_try_init_event+0x30/0x48)\n[<800882e4>] (perf_try_init_event) from [<8008f544>] (perf_init_event+0x5c/0xf4)\n[<8008f544>] (perf_init_event) from [<8008f8a8>] (perf_event_alloc+0x2cc/0x35c)\n[<8008f8a8>] (perf_event_alloc) from [<8009015c>] (SyS_perf_event_open+0x498/0xa70)\n[<8009015c>] (SyS_perf_event_open) from [<8000e420>] (ret_fast_syscall+0x0/0x34)\nCode: bf1be000 bf1bb380 802a2664 00000000 (00000002)\n---[ end trace 01aff0ff00926a0a ]---\n\nAlso cleans up the code to use the arm_pmu only when we know that\nwe are dealing with an arm pmu event.\n\nCc: Will Deacon <will.deacon@arm.com>\nAcked-by: Mark Rutland <mark.rutland@arm.com>\nAcked-by: Peter Ziljstra (Intel) <peterz@infradead.org>\nSigned-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>\nSigned-off-by: Will Deacon <will.deacon@arm.com>\nGit-commit: e429817b401f095ac483fcb02524b01faf45dad6\nGit-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git\nChange-Id: I3b9a0078f7a4cd5370ed177c8bd1438c09425eb4\nSigned-off-by: Patrick Fay <pfay@codeaurora.com>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/3277ca0decd9e20614830d5c90f29089e88daa15"},{"sha":"1eb56637f39a5ea602113d5409483bc109d9e727","author":{"name":"Odelu Kukatla","email":"8238859a300ef077b9fa1b0a53872231c69a4982@codeaurora.org"},"message":"clk: msm: gcc: Add support for 650MHz for GPU clock for MSM8920\n\nMSM8920 requires to support the maximum frequnecy of 650MHz for\nGPU clock, so update the list of supported frequencies and fmax\ntables accordingly.\n\nChange-Id: I89defc0e832093b88bfbbfceeaf2f68dc98a9d19\nSigned-off-by: Odelu Kukatla <okukatla@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/1eb56637f39a5ea602113d5409483bc109d9e727"},{"sha":"9cb1e410941d1e9118836ac4b2007da8bad8a638","author":{"name":"Tirupathi Reddy","email":"a9f0d0d9b6ed76774d5554658dc85c9a79fad49e@codeaurora.org"},"message":"ARM: dts: msm: Update APC CPR configuration for msm8940pro\n\nUpdate APC CPR static open-loop and closed-loop voltage margins\nfor msm8940pro as per voltage characterization results.\n\nCRs-Fixed: 1083415\nChange-Id: I83a955dc0dc23a689158121f2d7c787421a345ff\nSigned-off-by: Tirupathi Reddy <tirupath@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/9cb1e410941d1e9118836ac4b2007da8bad8a638"},{"sha":"badbf0653fa3f4d93bffd7e4312e6325c491f776","author":{"name":"Utkarsh Saxena","email":"a77f4916ff39fc133abd3bb49cf55a0c1b56ef54@codeaurora.org"},"message":"ARM: dts: msm: Modify IPA poll parameters for MSM8940\n\nThroughput KPI's are impacted with the current poll parameters.\nMake a change to use 2ms poll sleep and 5 empty poll iterations\nwhich satisfies both power and performance kpi's.\n\nChange-Id: Ic64f1e682de6fc0eb98ae28b7f9b27d086b5b3ed\nAcked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>\nSigned-off-by: Utkarsh Saxena <usaxena@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/badbf0653fa3f4d93bffd7e4312e6325c491f776"},{"sha":"9d6ac3bde663b16f4269a0bcc2392753c907ef4d","author":{"name":"Odelu Kukatla","email":"8238859a300ef077b9fa1b0a53872231c69a4982@codeaurora.org"},"message":"clk: msm: gcc: Update the number of bases for MSM8920\n\nNumber of hwio bases needs to be updated to correct value\nfor MSM8920, so update the same.\n\nChange-Id: I9d1ab64b6e2da4cb1d271309697b3474f638ddba\nSigned-off-by: Odelu Kukatla <okukatla@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/9d6ac3bde663b16f4269a0bcc2392753c907ef4d"},{"sha":"168c3ec0076c5c45591ad7b72141db2d11be7550","author":{"name":"Manoj Prabhu B","email":"ddf4043a996bf7f608ab271ea96052c669b1253b@codeaurora.org"},"message":"ARM: dts: msm: Enable memory allocation for diag client for 8920\n\nThe new diag client requires additional memory from hlos. This\npatch caters to diag memory requirement.\n\nCRs-Fixed: 1082450\nChange-Id: Icde1959982ad83d202d8d19683f26e0d989b88c0\nSigned-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/168c3ec0076c5c45591ad7b72141db2d11be7550"},{"sha":"b9f17e9ad7fb490cd666f451f78af5752a859d7d","author":{"name":"Lijuan Gao","email":"426eb63395c317025b36d061903a21f42041ce31@codeaurora.org"},"message":"ARM: dts: msm: Add initial support for MSM8920 QRD SKU7 board\n\nAdd initial set of device tree to build the MSM8920 QRD board.\n\nCRs-Fixed: 1081383\nChange-Id: If15b8bc9c6953ff6d649bf7f48142c84b9be568a\nSigned-off-by: Lijuan Gao <lijuang@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/b9f17e9ad7fb490cd666f451f78af5752a859d7d"},{"sha":"b38526ecaae2f33bdf1b99026172c161caefba3b","author":{"name":"Manaf Meethalavalappu Pallikunhi","email":"c206658a52c2fe0fb598c46fb7b56eaea5d1c35e@codeaurora.org"},"message":"ARM: dts: msm: Add bandwidth monitor devicetree under soc for msm8920\n\nCurrently bandwidth monitor devicetree entries are enabled under\nbus driver node. Update bandwidth monitor devicetree entries at\nappropriate place for msm8920.\n\nChange-Id: If66188f4d80b5f7b181f46fe1124b6049486c55b\nSigned-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/b38526ecaae2f33bdf1b99026172c161caefba3b"},{"sha":"492e0c688a95bdd13922608aeb839ab445e535c5","author":{"name":"Krishna Chaitanya Devarakonda","email":"4878b4e3fb579771f50b64b8bbcc500c54927f81@codeaurora.org"},"message":"msm: mdss: Add support for direct secure dispaly transition\n\nIn the current implementation, during secure to non secure\nand non secure to secure transitions, a NULL commit will be\nissued by the framework to make sure that the previous settings\nare completely cleared. This is not required for command mode\npanels, as we can wait for the frame transfer when the transition\nhappens.\n\nAdding support to wait for the previous frame transfer completion,\nduring the non secure to secure and vice-versa transitions.\n\nChange-Id: Id17b456b5b0744cff2f53688b7857569e4d257d6\nSigned-off-by: Krishna Chaitanya Devarakonda <kdevarak@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/492e0c688a95bdd13922608aeb839ab445e535c5"},{"sha":"4e311a0485f94114f2795923e26a6ff46560a879","author":{"name":"Tirupathi Reddy","email":"a9f0d0d9b6ed76774d5554658dc85c9a79fad49e@codeaurora.org"},"message":"ARM: dts: msm: update APCC/GFX CPR regulator configuration for msm8996pro\n\nAs per the hardware documentation, update the regulator\nconfiguration for apc0, apc1, gfx CPR regulators to support new\nspeed bins in msm8996pro.\n\nCRs-Fixed: 1083423\nChange-Id: I97b9b98305e3478012664b636df26299eca66f26\nSigned-off-by: Tirupathi Reddy <tirupath@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/hohoxu/n5kernel/commits/4e311a0485f94114f2795923e26a6ff46560a879"}]}
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