{"push_id":1201251626,"size":57,"distinct_size":57,"ref":"refs/heads/4.1-1.0.x-imx","head":"3477bd7c6da28563567d4cce98582ea6b21f354e","before":"960f493cce161ddc2ba3ffe82c061496e5771829","commits":[{"sha":"cf0a95b8d8a189e497dbf1c4102d575c1c827643","author":{"name":"Teo Hall","email":"a081c16eb855f3b0a1415e7b382881b89093493a@nxp.com"},"message":" MLK-11262-5: ARM: imx: Change A7 MU ready timing\n\n Change when A7 signal M4 to make sure busfreq is\n always up when the M4 send high bus release.\n This prevents race condition for Low Power Demo\n\nSigned-off-by: Teo Hall <teo.hall@nxp.com>","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/cf0a95b8d8a189e497dbf1c4102d575c1c827643"},{"sha":"8ad59887532549d3e9fe9158814ca971854ca12a","author":{"name":"Anson Huang","email":"179ef82d441ac04a1b4453aaebdb3906d832770d@nxp.com"},"message":"MLK-12761 ARM: imx: add mu as wakeup source for i.mx7d\n\nWhen A7 platform is in low power mode while M4 is NOT,\nM4 should be able to send message to wake up A7, so\nMU must be always as wake up source.\n\nSigned-off-by: Anson Huang <Anson.Huang@nxp.com>","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/8ad59887532549d3e9fe9158814ca971854ca12a"},{"sha":"07184c531e5035e73358ce6bf87483fac78106fa","author":{"name":"Anson Huang","email":"179ef82d441ac04a1b4453aaebdb3906d832770d@nxp.com"},"message":"MLK-12748-1 ARM: dts: imx7d: correct usdhc1 cd pin setting\n\ni.MX7D 19x19 LPDDR2 ARM2 board's uSDHC1 CD pin should be\nLOW active, correct it.\n\nSigned-off-by: Anson Huang <Anson.Huang@nxp.com>","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/07184c531e5035e73358ce6bf87483fac78106fa"},{"sha":"adfc24cc412df58c81b570259d0aa29b6b957649","author":{"name":"Anson Huang","email":"179ef82d441ac04a1b4453aaebdb3906d832770d@nxp.com"},"message":"MLK-12748-2 ARM: imx: remove IOMUXC GPR setting for i.mx7d TO1.2\n\ni.MX7D TO1.2 removes the DDR PAD retention mode setting\nin IOMUXC GPR, it is same as TO1.0, so only apply the\nIOMUXC GPR setting for TO1.1.\n\nSigned-off-by: Anson Huang <Anson.Huang@nxp.com>","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/adfc24cc412df58c81b570259d0aa29b6b957649"},{"sha":"a38a53d401de5d583ca8aca8825ef338cee7f33f","author":{"name":"Anson Huang","email":"179ef82d441ac04a1b4453aaebdb3906d832770d@nxp.com"},"message":"MLK-12748-3 ARM: imx: adjust imx7d lpddr3 retention exit flow\n\nOn i.MX7D lpddr3, retention mode exit flow should restore\nmore registers to make sure the ddr controller and ddr phy\nsettings restored properly, otherwise, some of the boards\ncan NOT pass memtester after retention mode exited.\n\nSigned-off-by: Anson Huang <Anson.Huang@nxp.com>","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/a38a53d401de5d583ca8aca8825ef338cee7f33f"},{"sha":"07c9f26b19b3ce05719d5634f1f56790b7ecf6af","author":{"name":"Anson Huang","email":"179ef82d441ac04a1b4453aaebdb3906d832770d@nxp.com"},"message":"MLK-12765 ARM: imx: make sure DLL is locked on i.MX7D\n\nOn i.MX7D, per design team's require, need to make sure\nDLL is locked after DDR frequency scaled done. Although\nnormally there should be no issue, but it is better to\nadd it.\n\nSigned-off-by: Anson Huang <Anson.Huang@nxp.com>","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/07c9f26b19b3ce05719d5634f1f56790b7ecf6af"},{"sha":"9f0881fc0f0bca372bdf84217748c0599ca5c388","author":{"name":"Andy Duan","email":"1b2675d9accacc3ebf63f721e75be3c10187c022@nxp.com"},"message":"MLK-12763 ARM: imx7d: iomux: correct uart input sel option value\n\nGPIO0~GPIO7 part:\n- Commit(c8cabda5ab07) add some wrong input sel value for uart, return\n  them to origin setting.\n- Add uart DTE pin mode setting.\n\nUART2_TX_DATA pin part:\n- RM doc \"iMX7D_RM_Rev0_Approval.pdf\" (2016.04.25 updated in compass)\n  updated input sel define for UART2_RX_DATA, then set the correct input\n  sel for the pin.\n\nSigned-off-by: Fugang Duan <fugang.duan@nxp.com>\n(cherry picked from commit: 90a8b06b9735dd5b8d2023ff3b95886441e0e8d9)","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/9f0881fc0f0bca372bdf84217748c0599ca5c388"},{"sha":"c02abe717ed9f9843d2791d04ef41d6260e4e295","author":{"name":"Sandor Yu","email":"cbddb7d3f1408a973edd2b2044e2aa9657c1ad4b@nxp.com"},"message":"MLK-12432-01: ov5640 mipi: support more platform and reduce support mode\n\n-Support no power and reset pins platform.\n-Remove specific power and reset pin setting for ov5640 daughter card.\n-Put sensor in software power down state when streamoff.\n-Remove unsupported video modes, keep 640x480, 720x480, 720p, 1080p 30fps\nvideo modes in driver.\n\nSigned-off-by: Sandor Yu <Sandor.yu@nxp.com>\n(cherry picked from commit 6a6c44e2406dcd9481e3103ca2710a319265c52a)","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/c02abe717ed9f9843d2791d04ef41d6260e4e295"},{"sha":"488fd31c0f0015c077bce098d5e1e46ef1d4bf0c","author":{"name":"Sandor Yu","email":"cbddb7d3f1408a973edd2b2044e2aa9657c1ad4b@nxp.com"},"message":"MLK-12432-02: capture: Add support for mipi input\n\nCombine csi image setting function for 32-bit,16-bit,8-bit format.\nFor parallel 8-bit sensor input, when bit per pixel is 16,\ncsi image width should been doubled.\nBut for mipi input, the csi image width and height should align\nwith mipi whatever data width.\n\nSigned-off-by: Sandor Yu <Sandor.yu@nxp.com>\n(cherry picked from commit caa8725e713691b42aa112a6e51f12e7d595f139)","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/488fd31c0f0015c077bce098d5e1e46ef1d4bf0c"},{"sha":"517f750e7eb9b04895d05fb02a33e046680c75ce","author":{"name":"Sandor Yu","email":"cbddb7d3f1408a973edd2b2044e2aa9657c1ad4b@nxp.com"},"message":"MLK-12432-03: arm: dts: Replace ov5647 mipi sensor with ov5640\n\nov5647 mipi camera sensor is replaced by ov5640\non imx7D SDB RevB board.\n\nSigned-off-by: Sandor Yu <Sandor.yu@nxp.com>\n(cherry picked from commit aef2ab14e91ccd173086a9849cf64619e078ed6f)","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/517f750e7eb9b04895d05fb02a33e046680c75ce"},{"sha":"9504f7436f6f555ae6616829eed0765699c75a97","author":{"name":"Sandor Yu","email":"cbddb7d3f1408a973edd2b2044e2aa9657c1ad4b@nxp.com"},"message":"MLK-12688-01: mipi csi: Add clk_settle setting\n\nAdd clk_settle variable to compliance more mipi sensor.\nMipi controller should setting by followed value\naccording mipi sensor support D-phy version.\n\nSlave Clock Lane Control Register for TCLK-SETTLE.\n2'b0x = 110 ns to 280ns (v0.87 to v1.00)\n2'b10 = 150 ns to 430ns (v0.83 to v0.86)\n2'b11 = 60 ns to 140ns (v0.82)\n\nSigned-off-by: Sandor Yu <Sandor.yu@nxp.com>\n(cherry picked from commit 928103ba7d28a7dbddf950892cb9d49ec2b192d3)","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/9504f7436f6f555ae6616829eed0765699c75a97"},{"sha":"3268392176e761ecef35c84e0ebff324fcfa9030","author":{"name":"Sandor Yu","email":"cbddb7d3f1408a973edd2b2044e2aa9657c1ad4b@nxp.com"},"message":"MLK-12688-02: arm dts: Add csis-clk-settle property\n\nAdd csis-clk-settle property to imx7D SDB mipi csi.\n\nSigned-off-by: Sandor Yu <Sandor.yu@nxp.com>\n(cherry picked from commit 01365628fdfadc4f8343722a2d5c69d5d8037540)","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/3268392176e761ecef35c84e0ebff324fcfa9030"},{"sha":"b1e060d88f18ee636df74a98e2eba65d7153c824","author":{"name":"Peter Chen","email":"1bd50f75c460ec6fb073f71822628b73bde58ca9@nxp.com"},"message":"MLK-12731-1 usb: chipidea: imx: add missing HSIC initialization for imx6qdl/sl\n\nThis piece of code is existed at imx_3.10, but missing at imx_3.14 and\nimx_4.1, port it from imx_3.10.\n\nSigned-off-by: Peter Chen <peter.chen@nxp.com>\n(cherry picked from commit 901f278a08baf6e5109bcf538f1f78cdbbccd389)","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/b1e060d88f18ee636df74a98e2eba65d7153c824"},{"sha":"e6ea96a8fc8176dbb83484cfedef1ec04daa4ca4","author":{"name":"Peter Chen","email":"1bd50f75c460ec6fb073f71822628b73bde58ca9@nxp.com"},"message":"MLK-12731-2 ARM: dts: Makefile: add dts entry for imx6q-arm2-hsic\n\nThis dts is only for USB HSIC controller test which needs\nValidation Port Card on it.\n\nDisable controller 3 due to strange signal on it at arm2 board.\n\nSigned-off-by: Peter Chen <peter.chen@nxp.com>\n(cherry picked from commit 8bd0739d81719ed8a09ca4e45393bb1c5ce3de83)","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/e6ea96a8fc8176dbb83484cfedef1ec04daa4ca4"},{"sha":"5db98a4109ac40418b9bb825fd2bbe916a80de20","author":{"name":"Fancy Fang","email":"cd8932ba027ba1202a38af646cf0efe032c743b5@nxp.com"},"message":"MLK-12420 fix potential head list corruption.\n\nThe head list may be corrupted when two requests from\nthe same 'pxp_chan' are issued sequentially. So change\nthe issue_pending function to strictly serialized the\nrequests to avoid this kind of issue.\n\nSigned-off-by: Fancy Fang <chen.fang@nxp.com>\n(cherry picked from commit 3ed71dcdd8ceeb3725399053f31c1930d2e7a08d)","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/5db98a4109ac40418b9bb825fd2bbe916a80de20"},{"sha":"8b381036631a5704b4f1fab18ee7fe4184655523","author":{"name":"Robin Gong","email":"bce3a9c996942298cec27dd424a5260f4d2bcd43@nxp.com"},"message":"MLK-12371: ARM: imx: suspend-imx7: correct HW_ANADIG_SNVS_MISC_CTRL set\n\nTo avoid touch other bits of HW_ANADIG_SNVS_MISC_CTRL , use set/clear register\n, and correct the bit29 setting:\n  --before: write 1 to toggle DDR power pin to high before enter DDR retention,\n            and write 1 again to pull pin to low when exit from DDR retention.\n  --now: write 1 to pull DDR power pin to high and write 0 to low.\n\nSigned-off-by: Robin Gong <yibin.gong@nxp.com>","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/8b381036631a5704b4f1fab18ee7fe4184655523"},{"sha":"4198b7bad81e6cec30c4008c235945da1f5e7129","author":{"name":"Han Xu","email":"43be6feec72472d2f53ea19569848d095483218a@nxp.com"},"message":"MLK-12448: mtd: gpmi: fix nand double free issue\n\nfix the raw_buffer pointer double free issue found by coverify.\n\nSigned-off-by: Han Xu <han.xu@nxp.com>","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/4198b7bad81e6cec30c4008c235945da1f5e7129"},{"sha":"83f0dd33f5b9491b32906a2a417674cce98acb7e","author":{"name":"Han Xu","email":"43be6feec72472d2f53ea19569848d095483218a@nxp.com"},"message":"MLK-12449: mtd: gpmi: fix integer overflow issue\n\nfix the potential integer overflow issue found by coverify.\n\nSigned-off-by: Han Xu <han.xu@nxp.com>","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/83f0dd33f5b9491b32906a2a417674cce98acb7e"},{"sha":"e3a5bdf8fefbd4feaaebb4a11b9fcac77eb0063d","author":{"name":"Fancy Fang","email":"cd8932ba027ba1202a38af646cf0efe032c743b5@nxp.com"},"message":"MLK-12509-1 video: mipi_dsi_samsung: create a new dts for mipi dsi.\n\nCreate a new dts for the 'TFT3P5079E' mipi panel on\nimx7d sabresd revb board.\n\nSigned-off-by: Fancy Fang <chen.fang@nxp.com>","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/e3a5bdf8fefbd4feaaebb4a11b9fcac77eb0063d"},{"sha":"00382217e80e04e0d234257f4d860c6a5124a94e","author":{"name":"Fancy Fang","email":"cd8932ba027ba1202a38af646cf0efe032c743b5@nxp.com"},"message":"MLK-12509-2 video: mipi_dsi_samsung: add 'TFT3P5079E' panel driver.\n\nThe 'otm8018b' is the Source Driver IC for 'TFT3P5079E'\nmipi panel. This patch is the kernel driver for 'otm8018b'.\nNo backlight brightness adjustment function, since this is\nnot supported by imx7d sdb revb board.\n\nSigned-off-by: Fancy Fang <chen.fang@nxp.com>\nSigned-off-by: Frank Li <frank.li@nxp.com>","distinct":true,"url":"https://api.github.com/repos/Freescale/linux-fslc/commits/00382217e80e04e0d234257f4d860c6a5124a94e"}]}
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