{"push_id":1232073179,"size":183,"distinct_size":1,"ref":"refs/heads/N10.4.y","head":"93a85d86eabf8635fbaa794100ce2f9b3fb785b6","before":"0fad482aca8af00b6ffd73dafbbfe198de884bc8","commits":[{"sha":"a5aec140cc98dcdd3f91ff26c50f123e36a1f01f","author":{"name":"Vijayakumar","email":"95f77eb08c844c6297e1c879be4e53d3144e57b3@nvidia.com"},"message":"gpu: nvgpu: optimize fecs status polling\n\nbug 200078367\n\nusing udelay for fecs status polling\nduring GR init phase brings down fecs\ntransaction time to < 20usec from few\nhundred usec.\n\nChange-Id: I61a27daaf1187ac086a42779b46aa3fbee3b37f2\nSigned-off-by: Vijayakumar <vsubbu@nvidia.com>\nReviewed-on: http://git-master/r/691918\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>\nTested-by: Terje Bergstrom <tbergstrom@nvidia.com>\n\nConflicts:\n\tdrivers/gpu/nvgpu/gk20a/gr_gk20a.c\n\tdrivers/gpu/nvgpu/gk20a/gr_gk20a.h\n\tdrivers/gpu/nvgpu/gm20b/gr_gm20b.c","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/a5aec140cc98dcdd3f91ff26c50f123e36a1f01f"},{"sha":"3555627dec5da31bc2605ed9cbe7fbd625641ab5","author":{"name":"Anders Kugler","email":"3ff19f6fd777c70fdb5c93948c94e808abdfcfd8@nvidia.com"},"message":"gpu: nvgpu: 3d.emc frequency scaling\n\no QoS notifier\n  Refresh the gpu load query because we may update the emc target\n  if gpu load changed.\n\no tegra_postscale()\n  Scaling the emc clock to a new target may be necessary\n  if the gpu load changed at low gpu frequencies.\n\nBug 1591643\n\nChange-Id: Ibc6f73c02eaf6cedb7f0f579d5f4d90c735d354a\nSigned-off-by: Anders Kugler <akugler@nvidia.com>\nReviewed-on: http://git-master/r/680929\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Arto Merilainen <amerilainen@nvidia.com>\nReviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>\nReviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/3555627dec5da31bc2605ed9cbe7fbd625641ab5"},{"sha":"7c4085f18b918870ef53dc483340ffd34531c61b","author":{"name":"Seshendra Gadagottu","email":"07f326d089cdb023b6d6c66b16cb1cb3024e93e1@nvidia.com"},"message":"gpu: nvgpu: reduce gr delays\n\nThe delay value used in gr usleep_range calls is\ntoo high. We can start at a much lower value.\n\nChange-Id: Id141df70b8892bc1ed1b49623c4aa125d541a636\nSigned-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>\nReviewed-on: http://git-master/r/715928\nReviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>\nTested-by: Terje Bergstrom <tbergstrom@nvidia.com>\nReviewed-by: Automatic_Commit_Validation_User","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/7c4085f18b918870ef53dc483340ffd34531c61b"},{"sha":"b4f9ecedc6762755868b161d3f07fe4516517977","author":{"name":"Arto Merilainen","email":"44dfd31a87176e2c1c7a7502e6706e828a45f252@nvidia.com"},"message":"gpu: nvgpu: Create load sysfs node always\n\nCurrently creation of the load sysfs node is bound to devfreq\nprofile initialisation, however, this information is useful even\nif the scaling is not enabled. This patch modifies the code to create\nthe sysfs node always.\n\nBug 1485489\n\nChange-Id: Id20433344aa81108f89a36cd56c9a73dd9d2e1c8\nSigned-off-by: Arto Merilainen <amerilainen@nvidia.com>\nReviewed-on: http://git-master/r/399474\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>\n\nConflicts:\n\tdrivers/gpu/nvgpu/gk20a/gk20a_scale.c","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/b4f9ecedc6762755868b161d3f07fe4516517977"},{"sha":"971ed03b221621064253fe054aaca59fc0541da8","author":{"name":"Arto Merilainen","email":"44dfd31a87176e2c1c7a7502e6706e828a45f252@nvidia.com"},"message":"gpu: nvgpu: Add sw shadow for load value\n\nReading the load value may increase CPU power consumption\ntemprorarily. In most cases we are ok with a value that\nwas read a moment earlier.\n\nThis patch introduces a software shadow for gpu load. The shadow\nis updated before starting scaling and all scaling code paths use\nthe sw shadow.\n\nChange-Id: I53d2ccb8e7f83147f411a14d3104d890dd9af9a3\nSigned-off-by: Arto Merilainen <amerilainen@nvidia.com>\nReviewed-on: http://git-master/r/453347\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/971ed03b221621064253fe054aaca59fc0541da8"},{"sha":"a086db8d975af1a59f261a4cd75e4740ac166cb0","author":{"name":"Vartom","email":"5be26a9f52b6304811278d7f8ee2b1ea2bd1c1a2@mail.ru"},"message":"fix for gpu: nvgpu: optimize fecs status polling 48e570b89c85494eaf09a920ed11e2a6515204d4","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/a086db8d975af1a59f261a4cd75e4740ac166cb0"},{"sha":"4a7811aa08dce1af3485b4fffb0c2d180079680d","author":{"name":"Alex Frid","email":"ccc56bec26f241824480f8ecd255c806db490ba6@nvidia.com"},"message":"gpu: nvgpu: Use 1kHz resolution for GPCPLL programming\n\nUsed 1kHz resolution (instead of 1 MHz) for GPCPLL programming:\nlimits specifications, calculating GPCPLL settings, storing target\nfrequency values, and proving output from debug monitor. Updated\ncomments in clock header to properly reflect frequency units.\n\nBug 1450787\n\nChange-Id: Ica58f794b82522288f2883c40626d82dbd794902\nSigned-off-by: Alex Frid <afrid@nvidia.com>\nReviewed-on: http://git-master/r/437943\nReviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>\nTested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>\nGVS: Gerrit_Virtual_Submit\nReviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/4a7811aa08dce1af3485b4fffb0c2d180079680d"},{"sha":"fbadfe94e1aae84c797cd0579aa3fd6358f7eeb5","author":{"name":"Alex Frid","email":"ccc56bec26f241824480f8ecd255c806db490ba6@nvidia.com"},"message":"gpu: nvgpu: Remove unused GK20A cooling device\n\nRemoved unused, obsolete GK20A cooling device.\n\nBug 1450787\n\nChange-Id: I5b02546d0405dd518ec841d903e650a8d38db8f2\nSigned-off-by: Alex Frid <afrid@nvidia.com>\nReviewed-on: http://git-master/r/437942\nReviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/fbadfe94e1aae84c797cd0579aa3fd6358f7eeb5"},{"sha":"a2449d93562049fed01c70d9f097b1f7a4f01e0d","author":{"name":"Mahantesh Kumbar","email":"6dfae6749eeff7fa1dbacbe105d1a23e2c3f31a7@nvidia.com"},"message":"gpu:nvgpu:sysfs node to update aelpg parameter\n\nAdded sysfs node to update aelpg parameter.\nPass parameter as below sequence,\nSAMPLING_PERIOD_PG_DEFAULT_US, MINIMUM_IDLE_FILTER_DEFAULT_US,\nMINIMUM_TARGET_SAVING_DEFAULT_US, POWER_BREAKEVEN_DEFAULT_US,\nCYCLES_PER_SAMPLE_MAX_DEFAULT\n\nBug 1464737\n\nChange-Id: I46873c463820f30f190c722d7ed038622cb2710f\nSigned-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>\nReviewed-on: http://git-master/r/422702\nReviewed-by: Bharat Nihalani <bnihalani@nvidia.com>\nTested-by: Bharat Nihalani <bnihalani@nvidia.com>\n\nConflicts:\n\tdrivers/gpu/nvgpu/gk20a/gk20a_sysfs.c\n\tdrivers/gpu/nvgpu/gk20a/pmu_gk20a.h","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/a2449d93562049fed01c70d9f097b1f7a4f01e0d"},{"sha":"871c051599b9c5b1ab7014acdcf8d3edeca59493","author":{"name":"Mahantesh Kumbar","email":"6dfae6749eeff7fa1dbacbe105d1a23e2c3f31a7@nvidia.com"},"message":"gpu:nvgpu:sysfs node to enable/disable aelpg\n\nAdded \"aelpg_enable\" sysfs node to enable/disable aelpg.\n\nBug 1464737\n\nChange-Id: Ia0eadbea59e2f9373ab5f413fa6e28780aff3c3c\nSigned-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>\n\nConflicts:\n\tdrivers/gpu/nvgpu/gk20a/gk20a_sysfs.c","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/871c051599b9c5b1ab7014acdcf8d3edeca59493"},{"sha":"3ba9180c5ff8ba45e7d2cf03f2a0b5b6bab32570","author":{"name":"Samuel Russell","email":"e30e514554d244004fb1dd28a2d78472250c0953@nvidia.com"},"message":"gpu: nvgpu: 3d.emc bandwidth ratio policy\n\nModify the 3d.emc policy to use a formula based on bandwidth and\nutilization instead of the current sku-dependent policy.\n\nBug 1364894\n\nChange-Id: Id97f765a48f0aa9f5ebeb0c82bccb22db474a1ae\nSigned-off-by: Samuel Russell <samuelr@nvidia.com>\nReviewed-on: http://git-master/r/453586\nReviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>\nTested-by: Terje Bergstrom <tbergstrom@nvidia.com>\n\nConflicts:\n\tdrivers/gpu/nvgpu/gk20a/gk20a_sysfs.c","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/3ba9180c5ff8ba45e7d2cf03f2a0b5b6bab32570"},{"sha":"e56a99c5ba2facce0c428fa87262386b1c7a4c65","author":{"name":"Mahantesh Kumbar","email":"6dfae6749eeff7fa1dbacbe105d1a23e2c3f31a7@nvidia.com"},"message":"gpu:nvgpu: update aelpg parameter\n\nUpdated aelpg parameter APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT\ndefault value to 200\n\nBug 1536384\n\nChange-Id: I090e50d0025f16c006429455d161bee26fc64173\nSigned-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>\nReviewed-on: http://git-master/r/455440\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>\nGVS: Gerrit_Virtual_Submit\nReviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/e56a99c5ba2facce0c428fa87262386b1c7a4c65"},{"sha":"d84c61c3ae9e3e0fae1d11c0a32988a60c9b4887","author":{"name":"Samuel Russell","email":"e30e514554d244004fb1dd28a2d78472250c0953@nvidia.com"},"message":"gpu: nvgpu: Fix gpu identification for 3demc\n\nModify GPU detection in 3demc-bw-ratio to use the SOC Id.\n\nBug 1364894\n\nChange-Id: If52e8c5153e76b29d67d28c52303b095df2e8bf0\nSigned-off-by: Samuel Russell <samuelr@nvidia.com>\nReviewed-on: http://git-master/r/542770\nReviewed-by: Automatic_Commit_Validation_User\nGVS: Gerrit_Virtual_Submit\nReviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>\nTested-by: Terje Bergstrom <tbergstrom@nvidia.com>","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/d84c61c3ae9e3e0fae1d11c0a32988a60c9b4887"},{"sha":"2f34d7797aa725b004125c28c525b5ab76e082f6","author":{"name":"Anders Kugler","email":"3ff19f6fd777c70fdb5c93948c94e808abdfcfd8@nvidia.com"},"message":"gpu: nvgpu: tegra gpu to emc frequency mapping\n\no emc clock scaling\n  Only take the gpu load into account for gpu frequencies below\n  fmax @ Vmin.\n  The granularity of frequency steps is much larger in the gpu\n  frequency range below fmax @ Vmin than in the upper frequency range.\n  Above fmax @ Vmin, keep the gpu unblocked and disregard the gpu load\n  when evaluating the emc target.\n\no tegra_postscale()\n  Round the new emc target to nearest discrete frequency.\n  Set the emc frequency only if the new emc target is different\n  from the previously requested emc frequency to avoid the penalty\n  of the locks inside clk_set_rate().\n\nBug 1591643\n\nChange-Id: I1a1a8734a74569c4d57b6e2bda4c11b2bda3f5f3\nSigned-off-by: Anders Kugler <akugler@nvidia.com>\nReviewed-on: http://git-master/r/680937\nReviewed-by: Automatic_Commit_Validation_User\nReviewed-by: Ilan Aelion <iaelion@nvidia.com>\nReviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>\n\nConflicts:\n\tdrivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/2f34d7797aa725b004125c28c525b5ab76e082f6"},{"sha":"0c06f01bd4d81810bbb5856e57b9597cf1493055","author":{"name":"sujeet baranwal","email":"c19d53ae2d63189f3169d24106e811c2798bec6e@nvidia.com"},"message":"gpu: sysfs mode for allowing access to registers\n\nThrough this sysfs entry, the register space becomes accessible.\nThis is be accessible root-only.\n\nBug 1523403\n\nChange-Id: Ia46f130a0cfd8324c5b675d19e7cbfba9dcb17ca\nSigned-off-by: sujeet baranwal <sbaranwal@nvidia.com>\nReviewed-on: http://git-master/r/454198\nReviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>\nTested-by: Terje Bergstrom <tbergstrom@nvidia.com>\n\nConflicts:\n\tdrivers/gpu/nvgpu/gk20a/gk20a.h\n\tdrivers/gpu/nvgpu/gk20a/gk20a_sysfs.c\n\tdrivers/gpu/nvgpu/gk20a/hw_ctxsw_prog_gk20a.h","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/0c06f01bd4d81810bbb5856e57b9597cf1493055"},{"sha":"4fa490ed6e8defa66ac164bdb0cd9f6e315655c9","author":{"name":"Vartom","email":"5be26a9f52b6304811278d7f8ee2b1ea2bd1c1a2@mail.ru"},"message":"Revert \"gpu: nvgpu: tegra gpu to emc frequency mapping\"\n\nThis reverts commit 5f5f12bc29ece594e9f9f8bbe749a05d6068b1d8.","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/4fa490ed6e8defa66ac164bdb0cd9f6e315655c9"},{"sha":"ab38a39dd51ad37e4662639412109f5dcd089dfc","author":{"name":"Vartom","email":"5be26a9f52b6304811278d7f8ee2b1ea2bd1c1a2@mail.ru"},"message":"fix gpu: nvgpu: Remove unused","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/ab38a39dd51ad37e4662639412109f5dcd089dfc"},{"sha":"aa42695067634714c929302984e656f3b35e6db2","author":{"name":"Terje Bergstrom","email":"ac3b952b1d287950f44942bfc9ee60898027c32c@nvidia.com"},"message":"gpu: nvgpu: Remove unused symbols\n\nRemove unused symbols in platform file and gk20a.c.\n\nBug 1558739\n\nChange-Id: If160a75061ecb4ad9cbc4abfb9bc409457299738\nSigned-off-by: Terje Bergstrom <tbergstrom@nvidia.com>","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/aa42695067634714c929302984e656f3b35e6db2"},{"sha":"1b01999f97a3b37b41ef1c34a127dcb5e69ba117","author":{"name":"Rick Song","email":"aed2e5a601ddc94a09a94bdfc6c73f95bcc9ab1c@nvidia.com"},"message":"video: tegra: host: maintain current freq if time interval is zero\n\nIf time interval between two freq estimation calls is zero,\nthen maintain current frequency for later one. Without this check,\nwe get below divide by zero error for dev_stat.total_time :\n\n[20141227_01:25:49][26408.871183] c0 151 (surfaceflinger) Division by zero in kernel.\n[20141227_01:25:49][26408.877372] c0 151 (surfaceflinger) CPU: 0 PID: 151 Comm: surfaceflinger Not tainted 3.10.24-ge6dc604 #1\n[20141227_01:25:49][26408.887623] c0 151 (surfaceflinger) [<c0016bf8>] (unwind_backtrace+0x0/0x140) from [<c0012e94>] (show_stack+0x18/0x1c)\n[20141227_01:25:49][26408.899199] c0 151 (surfaceflinger) [<c0012e94>] (show_stack+0x18/0x1c) from [<c02bab94>] (Ldiv0+0x8/0x10)\n[20141227_01:25:49][26408.909324] c0 151 (surfaceflinger) [<c02bab94>] (Ldiv0+0x8/0x10) from [<c0324c40>] (nvhost_pod_estimate_freq+0x170/0x3e8)\n[20141227_01:25:49][26408.921231] c0 151 (surfaceflinger) [<c0324c40>] (nvhost_pod_estimate_freq+0x170/0x3e8) from [<c063e1e4>] (update_devfreq+0x38/0x108)\n[20141227_01:25:49][26408.944050] c0 151 (surfaceflinger) [<c063e1e4>] (update_devfreq+0x38/0x108) from [<c036c864>] (gk20a_scale_notify+0x78/0xac)\n[20141227_01:25:49][26408.956686] c1 151 (surfaceflinger) [<c036c864>] (gk20a_scale_notify+0x78/0xac) from [<c0312a20>] (nvhost_module_busy+0x60/0x68)\n[20141227_01:25:49][26408.968296] c1 151 (surfaceflinger) [<c0312a20>] (nvhost_module_busy+0x60/0x68) from [<c0313efc>] (nvhost_as_dev_ctl+0x88/0x570)\n[20141227_01:25:49][26408.979933] c1 151 (surfaceflinger) [<c0313efc>] (nvhost_as_dev_ctl+0x88/0x570) from [<c0152e74>] (do_vfs_ioctl+0x88/0x5b0)\n[20141227_01:25:49][26408.991064] c1 151 (surfaceflinger) [<c0152e74>] (do_vfs_ioctl+0x88/0x5b0) from [<c0153410>] (SyS_ioctl+0x74/0x84)\n[20141227_01:25:49][26409.001425] c1 151 (surfaceflinger) [<c0153410>] (SyS_ioctl+0x74/0x84) from [<c000ef80>] (ret_fast_syscall+0x0/0x30)\n\nBug 1594567\n\nChange-Id: Ie397f2e094b25e2de355518cab332c615044121b\nSigned-off-by: Rick Song <ricks@nvidia.com>\nReviewed-on: http://git-master/r/668974\nSigned-off-by: Arto Merilainen <amerilainen@nvidia.com>\n(cherry-picked from commit c069eb8aac4e06e92a2acea60c8e5b181e353f11)\nReviewed-on: http://git-master/r/676943\nReviewed-by: Deepak Nibade <dnibade@nvidia.com>","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/1b01999f97a3b37b41ef1c34a127dcb5e69ba117"},{"sha":"9cfb7c102c8a3550241762acbcf6e451988159a0","author":{"name":"Sumit Singh","email":"38d63879802220ef0b7a81c1ae59016ab50c9ead@nvidia.com"},"message":"arm: tegra: Make temporary copies of dvfs drivers\n\nAs a part of arch/arm/mach-tegra cleanup, make temporary\ncopies of dvfs drivers, so when these drivers are\nmoved from arch/arm/mach-tegra to drivers/platform/tegra,\nhistory of the original drivers is retained, and then\nremove these temporary files.\n\nMake temporary copies of the following files:\n-drivers/platform/tegra/dvfs.c\n-drivers/platform/tegra/tegra12_dvfs.c\n-drivers/platform/tegra/tegra13_dvfs.c\n-drivers/platform/tegra/tegra_cl_dvfs.c\n\nBug 200019329\n\nChange-Id: Iffc80015940da88c787fe421507cd67922a3abc5\nSigned-off-by: Sumit Singh <sumsingh@nvidia.com>\nReviewed-on: http://git-master/r/499749\nGVS: Gerrit_Virtual_Submit\nReviewed-by: Bharat Nihalani <bnihalani@nvidia.com>\nTested-by: Bharat Nihalani <bnihalani@nvidia.com>\n\nConflicts:\n\tdrivers/platform/tegra/Makefile","distinct":false,"url":"https://api.github.com/repos/USBhost/FIRE-ICE/commits/9cfb7c102c8a3550241762acbcf6e451988159a0"}]}
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