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This is fixed the test\nfailures with r267815 in VS2015 X64 build.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267908 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/kraj/llvm/commits/18e6fc32c09cebe8a9a3de225c9d34a539b830c7"},{"sha":"aaf3f0426b24ad8646412d03e666f719b700eebb","author":{"email":"89604110449ce23e3d37e971c8a3c9848fbf663d@gmail.com","name":"Eugene Zelenko"},"message":"Fix some Clang-tidy modernize and Include What You Use warnings.\n\nDifferential revision: http://reviews.llvm.org/D19673\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267910 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/kraj/llvm/commits/aaf3f0426b24ad8646412d03e666f719b700eebb"},{"sha":"d41672fa697c2730fc5c52005030e30b3faec024","author":{"email":"7dcef090ee6a2c8437d8e9be33433ffa8b580c19@google.com","name":"Sriraman Tallam"},"message":"Add \"PIE Level\" metadata to module flags.\n\nhttp://reviews.llvm.org/D19671\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267911 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/kraj/llvm/commits/d41672fa697c2730fc5c52005030e30b3faec024"},{"sha":"b116cf62de67b9bd0b62048b5c22c37b9f1a66cc","author":{"email":"89604110449ce23e3d37e971c8a3c9848fbf663d@gmail.com","name":"Eugene Zelenko"},"message":"Fix builds broken in r267910.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267915 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/kraj/llvm/commits/b116cf62de67b9bd0b62048b5c22c37b9f1a66cc"},{"sha":"3ba7927b463d4662fac92a5e0cdd539ed10f325a","author":{"email":"788c14eeffa2067e120409a238fa186a04f20a10@amd.com","name":"Matt Arsenault"},"message":"AMDGPU: Fix mishandling array allocations when promoting alloca\n\nThe canonical form for allocas is a single allocation of the array type.\nIn case we see a non-canonical array alloca, make sure we aren't\nreplacing this with an array N times smaller.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267916 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/kraj/llvm/commits/3ba7927b463d4662fac92a5e0cdd539ed10f325a"},{"sha":"6af1d8fce6832f1863dfa9f572478c60b7965f79","author":{"email":"c75c6ffbe1757b9a0c4a980ebbd301c4f55ecd30@codeaurora.org","name":"Krzysztof Parzyszek"},"message":"Reset the TopRPTracker's position in ScheduleDAGMILive::initQueues\n\nScheduleDAGMI::initQueues changes the RegionBegin to the first non-debug\ninstruction. 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Without the ability\nto modify the tracker directly, this leaves a derived scheduler with a\npotential of having the TopRPTracker out-of-sync with the CurrentTop.\n\nThe symptom of the problem:\n  void llvm::ScheduleDAGMILive::scheduleMI(llvm::SUnit *, bool):\n  Assertion `TopRPTracker.getPos() == CurrentTop && \"out of sync\"' failed.\n\nDifferential Revision: http://reviews.llvm.org/D19438\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267918 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/kraj/llvm/commits/6af1d8fce6832f1863dfa9f572478c60b7965f79"},{"sha":"4030c6e2a8b014421de6da4242e57f07854bc66f","author":{"email":"666af9c7e7c44f7b1a6415c1f07084e8abb68553@gmail.com","name":"Yaron Keren"},"message":"Remove doInitialization() and doFinalization() member declarations without definitions.\nVisual C++ 2015 flags this in the IDE.\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267919 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/kraj/llvm/commits/4030c6e2a8b014421de6da4242e57f07854bc66f"},{"sha":"fb3ad89dbc7386e87ea44bc59eddb3f130036fc9","author":{"email":"788c14eeffa2067e120409a238fa186a04f20a10@amd.com","name":"Matt Arsenault"},"message":"AMDGPU: Emit error if too much LDS is used\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267922 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/kraj/llvm/commits/fb3ad89dbc7386e87ea44bc59eddb3f130036fc9"},{"sha":"a59d9016fcca33eacff626f52cdc529753ada6b3","author":{"email":"c75c6ffbe1757b9a0c4a980ebbd301c4f55ecd30@codeaurora.org","name":"Krzysztof Parzyszek"},"message":"[Hexagon] Add instruction aliases for vector unsigned compare-equal\n\nUnsigned compare-equal instructions are mapped to signed compare-equal.\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267925 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/kraj/llvm/commits/a59d9016fcca33eacff626f52cdc529753ada6b3"}]}