{"push_id":1257178443,"size":9,"distinct_size":6,"ref":"refs/heads/semi-interesting","head":"637534a450ed67ac79dfddd5a68eabd6cdd930bd","before":"6b07e30786c97697ae645def143ca70398e5e9fb","commits":[{"sha":"442c7593cc2b1a8a578ba575aeb3e45068497535","author":{"name":"Dave Airlie","email":"bb4fc8ee23048f808a4e317631d81d4f55a4e4cb@redhat.com"},"message":"radv/format: add is depth helper","distinct":false,"url":"https://api.github.com/repos/airlied/mesa/commits/442c7593cc2b1a8a578ba575aeb3e45068497535"},{"sha":"c1a2e8aad0c1fd9c77da8401e122886ccc00d496","author":{"name":"Dave Airlie","email":"bb4fc8ee23048f808a4e317631d81d4f55a4e4cb@redhat.com"},"message":"radv: some winsys surface updates from radeonsi","distinct":false,"url":"https://api.github.com/repos/airlied/mesa/commits/c1a2e8aad0c1fd9c77da8401e122886ccc00d496"},{"sha":"1d4d34e65f775c18187696120507feb57ca12e5d","author":{"name":"Dave Airlie","email":"bb4fc8ee23048f808a4e317631d81d4f55a4e4cb@redhat.com"},"message":"radv/resolve: drop unused args","distinct":false,"url":"https://api.github.com/repos/airlied/mesa/commits/1d4d34e65f775c18187696120507feb57ca12e5d"},{"sha":"29aafcfbbbe668bb72003893ba6d0f3e49bcb8a3","author":{"name":"Dave Airlie","email":"bb4fc8ee23048f808a4e317631d81d4f55a4e4cb@redhat.com"},"message":"radv: start allocate htile for HiZ\n\nHiZ off by default","distinct":true,"url":"https://api.github.com/repos/airlied/mesa/commits/29aafcfbbbe668bb72003893ba6d0f3e49bcb8a3"},{"sha":"208b7394a07f964436d75c72a3486645b7a08194","author":{"name":"Dave Airlie","email":"bb4fc8ee23048f808a4e317631d81d4f55a4e4cb@redhat.com"},"message":"radv: start programming registers for htile","distinct":true,"url":"https://api.github.com/repos/airlied/mesa/commits/208b7394a07f964436d75c72a3486645b7a08194"},{"sha":"529ddb11ea058c5542c1e7e862b3b76a1310dd86","author":{"name":"Dave Airlie","email":"bb4fc8ee23048f808a4e317631d81d4f55a4e4cb@redhat.com"},"message":"radv: start adding register settings for hiz","distinct":true,"url":"https://api.github.com/repos/airlied/mesa/commits/529ddb11ea058c5542c1e7e862b3b76a1310dd86"},{"sha":"51db7e19d544e8d72cea0d7179df580b126d6432","author":{"name":"Dave Airlie","email":"bb4fc8ee23048f808a4e317631d81d4f55a4e4cb@redhat.com"},"message":"radv: start adding depth clear support\n\nThis adds new pipelines for exp clear and non-exp fast clears","distinct":true,"url":"https://api.github.com/repos/airlied/mesa/commits/51db7e19d544e8d72cea0d7179df580b126d6432"},{"sha":"17f612e3b75fa6ea76a6f2e4993ac5c2fb870fc6","author":{"name":"Dave Airlie","email":"bb4fc8ee23048f808a4e317631d81d4f55a4e4cb@redhat.com"},"message":"radv: add in-place depth decompression support","distinct":true,"url":"https://api.github.com/repos/airlied/mesa/commits/17f612e3b75fa6ea76a6f2e4993ac5c2fb870fc6"},{"sha":"637534a450ed67ac79dfddd5a68eabd6cdd930bd","author":{"name":"Dave Airlie","email":"bb4fc8ee23048f808a4e317631d81d4f55a4e4cb@redhat.com"},"message":"radv: on depth transisiton decompress in place","distinct":true,"url":"https://api.github.com/repos/airlied/mesa/commits/637534a450ed67ac79dfddd5a68eabd6cdd930bd"}]}
{"actor":{"display_login":"airlied"}}