{"push_id":1096047902,"size":42,"distinct_size":42,"ref":"refs/heads/i965-fp64-scalar-backend-review","head":"69f11caf6c71bf509e16934221a835487b474f73","before":"5187bf6a632ff6c353d4db8648c0081452cf6f63","commits":[{"sha":"e5cb6f1919a719a1c3716a83315d338957cfebc4","author":{"email":"99c5849d46b9d5d9781f7baa7735ff66305c63a7@intel.com","name":"Connor Abbott"},"message":"i965/fs: fix is_copy_payload() for doubles\n\nv2 (Sam):\n- LOAD_PAYLOAD treats each header source as a 32B block\n  regardless of the datatype. Drop the change (Curro)\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>\nReviewed-by: Jordan Justen <jordan.l.justen@intel.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/e5cb6f1919a719a1c3716a83315d338957cfebc4"},{"sha":"2bf04810ee4441f708c3909219ea341a5958c2b4","author":{"email":"99c5849d46b9d5d9781f7baa7735ff66305c63a7@intel.com","name":"Connor Abbott"},"message":"i965/fs: fix regs_written in LOAD_PAYLOAD for doubles\n\nv2: Account for the stride of the dst (Iago)\n\nSigned-off-by: Iago Toral Quiroga <itoral@igalia.com>\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>\nReviewed-by: Jordan Justen <jordan.l.justen@intel.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/2bf04810ee4441f708c3909219ea341a5958c2b4"},{"sha":"31219702d79a63b87f8de8cb7b9166269a68cd07","author":{"email":"99c5849d46b9d5d9781f7baa7735ff66305c63a7@intel.com","name":"Connor Abbott"},"message":"i965/fs: fix dst width calculation in CSE\n\nv2 (Sam):\n- Fix line width (Topi).\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>\nReviewed-by: Jordan Justen <jordan.l.justen@intel.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/31219702d79a63b87f8de8cb7b9166269a68cd07"},{"sha":"8d636bf8b2b511073135650ea7fa5f5e1d34d71b","author":{"email":"71178acffcc112b21e5858656e5751f5e4aa9364@gmail.com","name":"Connor Abbott"},"message":"i965/fs: add a pass for legalizing d2f\n\nWe need to do this late, in order to avoid partial writes during the\noptimization loop.\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/8d636bf8b2b511073135650ea7fa5f5e1d34d71b"},{"sha":"b8f376676ee1a5172d0f5b1613754f984d5963a2","author":{"email":"99c5849d46b9d5d9781f7baa7735ff66305c63a7@intel.com","name":"Connor Abbott"},"message":"i965/fs: add support for f2d and d2f\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/b8f376676ee1a5172d0f5b1613754f984d5963a2"},{"sha":"9a36bbc19a6c3c1017d5c5a1cf285b4225a9e174","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"i965/fs: handle fp64 opcodes in brw_do_channel_expressions\n\nIn the case of the pack opcode we are already doing the\nlowering in NIR, so no need to do it here. The unpack opcode\noperates on scalars, so it should not be lowered.\n\nIn the case of frexp_sig and frexp_exp, they are lowered in\nlower_instructions, so we don't have to care about them.\n\nAll the remaining opcodes involve conversions from and to doubles\nand are business as usual.\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/9a36bbc19a6c3c1017d5c5a1cf285b4225a9e174"},{"sha":"994b2103df973931cf6eae76902edaa9dd14925f","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"i965/fs: We only support 32-bit integer ALU operations for now\n\nAdd asserts so we remember to address this when we enable 64-bit\ninteger support, as suggested by Connor and Jason.\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/994b2103df973931cf6eae76902edaa9dd14925f"},{"sha":"88ee8bbca4a9d620ffe70d07e589598592761165","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"i965/fs: add null_reg_df\n\nProbably not needed since we fix the dst type of comparisons\nautomatically, but for consistency with the rest of null_reg_*\nfunctions.\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/88ee8bbca4a9d620ffe70d07e589598592761165"},{"sha":"99a4fe78dea419fb3081d6c5311075df53954f60","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"REVIEW-KENNETH-COMMENT i965/fs: implement fsign() for doubles\n\nv2 (Sam):\n  - Fix indentation (Kenneth)\n  - Simplify code (Kenneth)\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/99a4fe78dea419fb3081d6c5311075df53954f60"},{"sha":"ce4ab830680085a439d2612fa93d48be2a8b306f","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"i965/fs: implement d2b\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/ce4ab830680085a439d2612fa93d48be2a8b306f"},{"sha":"70ece24f5118e719c5d5807df06dbae6e8db00c6","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"i965/fs: implement d2i and d2u\n\nThese need the same treatment as d2f, so generalize our d2f lowering to cover\nthese too.\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/70ece24f5118e719c5d5807df06dbae6e8db00c6"},{"sha":"b989cc8f62075783fa8b999a73697f351b5eac59","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"i965/fs: implement i2d and u2d\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/b989cc8f62075783fa8b999a73697f351b5eac59"},{"sha":"ba4b231be7e08a629c5fe576e95e1e232fae929d","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"i965/fs: rename our lower_d2f pass to lower_d2x\n\nSince it no longer handles conversions from double to float but from\ndouble to various other 32-bit types.\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/ba4b231be7e08a629c5fe576e95e1e232fae929d"},{"sha":"ad4cfed1ef8b411aa2a02f3890d1ca5ee8b9671d","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"REVIEW-CURRO-COMMENT i965/fs/lower_simd_width: Fix registers written for split instructions\n\nWhen the original instruction had a stride > 1, the combined registers\nwritten by the split instructions won't amount to the same register space\nwritten by the original instruction because the split instructions will\nuse a stride of 1. The current code assumed otherwise and computed the\nnumber of registers written by split instructions as an equal share based\non the relation between the lowered width and the original execution size\nof the instruction.\n\nIt is only after the split, when we interleave the components of the result\nfrom the lowered instructions back into the original dst register, that the\noriginal stride takes effect and we write all the registers specified by\nthe original instruction.\n\nJust make the number of register written the same as the vgrf space we\nallocate for the dst of the split instruction.\n\nFixes crashes in fp64 tests produced as a result of assigning incorrectly the\nnumber of registers written by split instructions, which led to incorrect\nvalidation of the size of the writes against the allocated vgrf space.\n\nReviewed-by: Francisco Jerez <currojerez@riseup.net>\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/ad4cfed1ef8b411aa2a02f3890d1ca5ee8b9671d"},{"sha":"152c5ed5bd6e6a2611d288195751c39764d44585","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"i965/fs: recognize writes with a subreg_offset > 0 as partial\n\nUsually, writes to a subreg_offset > 0 would also have a stride > 1\nand we would recognize them as partial, however, there is one case\nwhere this does not happen, that is when we generate code for 64-bit\nimemdiates in gen7, where we produce something like this:\n\nmov(8) vgrf10:UD, <low 32-bit>\nmov(8) vgrf10+0.4:UD, <high 32-bit>\n\nand then we use the result with a stride of 0, as in:\n\nmov(8) vgrf13:DF, vgrf10<0>:DF\n\nAlthough we could try to avoid this issue by producing different code\nfor this by using writes with a stride of 2, that runs into other\nproblems affecting gen7 and the fact is that any instruction that\nwrites to a subreg_offset > 0 is a partial write so we should really\nrecognize them as such.\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/152c5ed5bd6e6a2611d288195751c39764d44585"},{"sha":"230b8e3f4b65d4b5399869416a01324ab48cb3e5","author":{"email":"b753b212f30aed827c3eea2e437609dc37310153@igalia.com","name":"Samuel Iglesias Gonsálvez"},"message":"i965/fs: align access to double-based uniforms in push constant buffer\n\nWhen there is a mix of definitions of uniforms with 32-bit or 64-bit\ndata type sizes, the driver ends up doing misaligned access to double\nbased variables in the push constant buffer.\n\nTo fix this, the driver adds padding when needed in the push constant\nbuffer and takes it into account to avoid exceeding its limits and to\nupdate the GRF registers to access uniform variables.\n\nv2 (Iago):\n  - Renamed some variables for clarity.\n  - Replace the boolean array of paddings that tracked if each param was\n    padded by an integer array that keeps count of accumnulated padding.\n    This allows us to remove a couple of loops that had to compute that.\n  - Reworked things a bit so we can get rid of the nr_paddings field in\n    brw_stage_prog_data.\n  - Use rzalloc_array instead or ralloc_array and memset.\n  - Fixed wrong indentation.\n\nSigned-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>\nSigned-off-by: Iago Toral Quiroga <itoral@igalia.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/230b8e3f4b65d4b5399869416a01324ab48cb3e5"},{"sha":"4ee0b8d4d88bb39923fc704f2a28e088c7211571","author":{"email":"b753b212f30aed827c3eea2e437609dc37310153@igalia.com","name":"Samuel Iglesias Gonsálvez"},"message":"i965/fs: demote_pull_constants() did not take into account double types\n\nThe constants could be double, and it was allocating size for float types\nfor the destination register of varying pull constant loads.\n\nThen the fs_visitor::validate() will complain.\n\nSigned-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>\nReviewed-by: Jordan Justen <jordan.l.justen@intel.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/4ee0b8d4d88bb39923fc704f2a28e088c7211571"},{"sha":"e8e3a96f967a0196dc487521977bef2137d2b3db","author":{"email":"b753b212f30aed827c3eea2e437609dc37310153@igalia.com","name":"Samuel Iglesias Gonsálvez"},"message":"i965/fs: take into account doubles when calculating read_size for MOV_INDIRECT\n\nv2:\n- Fix assert's line width (Topi).\n\nSigned-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>\nReviewed-by: Jordan Justen <jordan.l.justen@intel.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/e8e3a96f967a0196dc487521977bef2137d2b3db"},{"sha":"1bf60b653b15d7b9717f02b1648f111c6ab8efce","author":{"email":"b753b212f30aed827c3eea2e437609dc37310153@igalia.com","name":"Samuel Iglesias Gonsálvez"},"message":"i965/fs: fix MOV_INDIRECT exec_size for doubles\n\nIn that case, the writes need two times the size of a 32-bit value.\nWe need to adjust the exec_size, so it is not breaking any hardware\nrule.\n\nv2:\n  - Add an assert to verify type size is not less than 4 bytes (Jordan).\n\nSigned-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>\nReviewed-by: Jordan Justen <jordan.l.justen@intel.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/1bf60b653b15d7b9717f02b1648f111c6ab8efce"},{"sha":"204f06e95428bce10a2bb16e473166b6a599631b","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"i965/fs: fix subreg_offset overflow in byte_offset()\n\nThis can happen if the register already has a non-zero subreg_offset\nwhen byte_offset() is called.","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/204f06e95428bce10a2bb16e473166b6a599631b"}]}