{"action":"created","comment":{"url":"https://api.github.com/repos/ofiwg/fabtests/pulls/comments/87508233","pull_request_review_id":8120025,"id":87508233,"diff_hunk":"@@ -0,0 +1,228 @@\n+/*\n+ * Copyright (c) 2013-2016 Intel Corporation.  All rights reserved.\n+ * Copyright (c) 2014-2016 Cisco Systems, Inc.  All rights reserved.\n+ *\n+ * This software is available to you under a choice of one of two\n+ * licenses.  You may choose to be licensed under the terms of the GNU\n+ * General Public License (GPL) Version 2, available from the file\n+ * COPYING in the main directory of this source tree, or the\n+ * BSD license below:\n+ *\n+ *     Redistribution and use in source and binary forms, with or\n+ *     without modification, are permitted provided that the following\n+ *     conditions are met:\n+ *\n+ *      - Redistributions of source code must retain the above\n+ *        copyright notice, this list of conditions and the following\n+ *        disclaimer.\n+ *\n+ *      - Redistributions in binary form must reproduce the above\n+ *        copyright notice, this list of conditions and the following\n+ *        disclaimer in the documentation and/or other materials\n+ *        provided with the distribution.\n+ *\n+ * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND,\n+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF\n+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AWV\n+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS\n+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN\n+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\n+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\n+ * SOFTWARE.\n+ */\n+\n+#include <stdio.h>\n+#include <stdlib.h>\n+#include <getopt.h>\n+#include <string.h>\n+\n+#include <rdma/fi_errno.h>\n+\n+#include \"unit_common.h\"\n+#include \"shared.h\"\n+\n+static char err_buf[512];\n+\n+/*\n+ * Tests:\n+ */\n+static int mr_reg()\n+{\n+\tint i;\n+\tint ret;\n+\tint testret;\n+\tstruct fid_mr *mr;\n+\n+\ttestret = FAIL;\n+\n+\tfor (i = 0; i < test_cnt; i++) {\n+\t\tbuf_size = test_size[i].size;\n+\t\tbuf = malloc(buf_size);\n+\t\tif (!buf) {\n+\t\t\tret = -FI_ENOMEM;\n+\t\t\tgoto fail;\n+\t\t}\n+\n+\t\t// TODO test for various access\n+\t\tret = fi_mr_reg(domain, buf, buf_size, FI_SEND | FI_RECV, 0,\n+\t\t\t\tFT_MR_KEY, 0, &mr, NULL);\n+\t\tif (ret) {\n+\t\t\tFT_UNIT_STRERR(err_buf, \"fi_mr_reg failed\", ret);\n+\t\t\tgoto fail;\n+\t\t}\n+\t\tret = fi_close(&mr->fid);\n+\t\tif (ret) {\n+\t\t\tFT_UNIT_STRERR(err_buf, \"fi_close failed\", ret);\n+\t\t\tgoto fail;\n+\t\t}\n+\t\tfree(buf);\n+\t}\n+\tbuf = NULL;\n+\ttestret = PASS;\n+fail:\n+\tif (buf)\n+\t\tfree(buf);\n+\tmr = NULL;\n+\treturn TEST_RET_VAL(ret, testret);\n+}\n+\n+static int mr_regv()\n+{\n+\tint ret;\n+\tint testret;\n+\tstruct fid_mr *mr;\n+\tstruct iovec iov;\n+\n+\ttestret = FAIL;\n+\n+\tiov.iov_len = test_size[test_cnt / 2].size;\n+\tiov.iov_base = malloc(buf_size);\n+\tif (!iov.iov_base) {\n+\t\tret = -FI_ENOMEM;\n+\t\tgoto fail;\n+\t}\n+\n+\t// TODO test for various iov counts\n+\tret = fi_mr_regv(domain, &iov, 1, FI_SEND | FI_RECV, 0,\n+\t\t\tFT_MR_KEY, 0, &mr, NULL);\n+\tif (ret) {\n+\t\tFT_UNIT_STRERR(err_buf, \"fi_mr_regv failed\", ret);\n+\t\tgoto fail;\n+\t}\n+\tret = fi_close(&mr->fid);\n+\tif (ret) {\n+\t\tFT_UNIT_STRERR(err_buf, \"fi_close failed\", ret);\n+\t\tgoto fail;\n+\t}\n+\tfree(iov.iov_base);\n+\tiov.iov_base = NULL;\n+\ttestret = PASS;\n+fail:\n+\tif (iov.iov_base)\n+\t\tfree(iov.iov_base);\n+\tmr = NULL;\n+\treturn TEST_RET_VAL(ret, testret);\n+}\n+\n+static int mr_regattr()\n+{\n+\tint ret;\n+\tint testret;\n+\tstruct fid_mr *mr;\n+\tstruct iovec iov;\n+\tstruct fi_mr_attr attr;\n+\n+\ttestret = FAIL;\n+\n+\tiov.iov_len = test_size[test_cnt / 2].size;\n+\tiov.iov_base = malloc(buf_size);\n+\tif (!iov.iov_base) {\n+\t\tret = -FI_ENOMEM;\n+\t\tgoto fail;\n+\t}\n+\n+\tattr.mr_iov = &iov;\n+\tattr.iov_count = 1;\n+\tattr.access = FI_SEND | FI_RECV;","path":"unit/mr_test.c","position":146,"original_position":146,"commit_id":"e6486a64b79b00be582422b39f34ec2e821f06cf","original_commit_id":"e6486a64b79b00be582422b39f34ec2e821f06cf","user":{"login":"shefty","id":3967608,"avatar_url":"https://avatars.githubusercontent.com/u/3967608?v=3","gravatar_id":"","url":"https://api.github.com/users/shefty","html_url":"https://github.com/shefty","followers_url":"https://api.github.com/users/shefty/followers","following_url":"https://api.github.com/users/shefty/following{/other_user}","gists_url":"https://api.github.com/users/shefty/gists{/gist_id}","starred_url":"https://api.github.com/users/shefty/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/shefty/subscriptions","organizations_url":"https://api.github.com/users/shefty/orgs","repos_url":"https://api.github.com/users/shefty/repos","events_url":"https://api.github.com/users/shefty/events{/privacy}","received_events_url":"https://api.github.com/users/shefty/received_events","type":"User","site_admin":false},"body":"Hmm... maybe we should iterate over access as well.","created_at":"2016-11-10T23:19:57Z","updated_at":"2016-11-10T23:19:57Z","html_url":"https://github.com/ofiwg/fabtests/pull/586#discussion_r87508233","pull_request_url":"https://api.github.com/repos/ofiwg/fabtests/pulls/586","_links":{"self":{"href":"https://api.github.com/repos/ofiwg/fabtests/pulls/comments/87508233"},"html":{"href":"https://github.com/ofiwg/fabtests/pull/586#discussion_r87508233"},"pull_request":{"href":"https://api.github.com/repos/ofiwg/fabtests/pulls/586"}}},"pull_request":{"url":"https://api.github.com/repos/ofiwg/fabtests/pulls/586","id":93221878,"html_url":"https://github.com/ofiwg/fabtests/pull/586","diff_url":"https://github.com/ofiwg/fabtests/pull/586.diff","patch_url":"https://github.com/ofiwg/fabtests/pull/586.patch","issue_url":"https://api.github.com/repos/ofiwg/fabtests/issues/586","number":586,"state":"open","locked":false,"title":"unit: Add a test for memory region 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