{"push_id":1275829192,"size":118,"distinct_size":118,"ref":"refs/heads/upstream-with-swift","head":"e35e5cea4514ef294e1a69ca5b6c651bfecc2f23","before":"bc50259cec81598a932e29bb53c4117f2752d461","commits":[{"sha":"675d6994e87a81374e5bbabddbed47643a630bc0","author":{"name":"Tom Stellard","email":"1ab8e172806ba53318a3e2dcaf9ac0215f1df251@amd.com"},"message":"AMDGPU/SI: Query AA, if available, in areMemAccessesTriviallyDisjoint()\n\nSummary:\nThe SILoadStoreOptimizer will need to use AliasAnalysis here in order to\nmove it before scheduling.\n\nReviewers: arsenm\n\nSubscribers: arsenm, llvm-commits, kzhuravl\n\nDifferential Revision: https://reviews.llvm.org/D23813\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279963 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/675d6994e87a81374e5bbabddbed47643a630bc0"},{"sha":"1801e2fa1344f59e66b140548d324bacb97e9bd2","author":{"name":"Haojian Wu","email":"7e7692cf4d6f5aa42f2756afc956f887e634bcb4@google.com"},"message":"Fix -Wunused-but-set-variable warning.\n\nSummary: A follow-up fix on r279958.\n\nReviewers: bkramer\n\nSubscribers: cfe-commits\n\nDifferential Revision: https://reviews.llvm.org/D23989\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279964 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/1801e2fa1344f59e66b140548d324bacb97e9bd2"},{"sha":"1a56948cc96c82ed1977fd74755c3f62681352a5","author":{"name":"Rafael Espindola","email":"2cb6c78767a4200908f6aafbbd9b2dbabf89e63d@gmail.com"},"message":"Move code only used by codegen out of MC. NFC.\n\nMC itself never needs to know about these sections.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279965 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/1a56948cc96c82ed1977fd74755c3f62681352a5"},{"sha":"5f65d099ebe0d268a457ee0e5b36563840bf1d57","author":{"name":"Benjamin Kramer","email":"3b24c2ddf636b98f21c704904010107db031684e@googlemail.com"},"message":"Mark test as XFAIL instead of disabling it everywhere.\n\nThere is no lit feature 'X86' so this test is just disabled completely.\nMake it XFAIL until a solution is found.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279966 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/5f65d099ebe0d268a457ee0e5b36563840bf1d57"},{"sha":"6e61a44470e3cd3076b137ba709e4e177779ab4d","author":{"name":"Rafael Espindola","email":"2cb6c78767a4200908f6aafbbd9b2dbabf89e63d@gmail.com"},"message":"Use the correct ctor/dtor section for dynamic-no-pic.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279967 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/6e61a44470e3cd3076b137ba709e4e177779ab4d"},{"sha":"a8fa4024a0f52234ff34cbf70eea640f389c9f38","author":{"name":"Tom Stellard","email":"1ab8e172806ba53318a3e2dcaf9ac0215f1df251@amd.com"},"message":"AMDGPU/SI: Improve register allocation hints for sopk instructions\n\nSummary:\nFor shrinking SOPK instructions, we were creating a hint to tell the\nregister allocator to use the register allocated for src0 for the dst\noperand as well.  However, this seems to not work sometimes depending\non the order virtual registers are assigned physical registers.\n\nTo fix this, I've added a second allocation hint which does the reverse,\nasks that the register allocated for dst is used for src0.\n\nReviewers: arsenm\n\nSubscribers: arsenm, llvm-commits, kzhuravl\n\nDifferential Revision: https://reviews.llvm.org/D23862\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279968 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/a8fa4024a0f52234ff34cbf70eea640f389c9f38"},{"sha":"adef5a69683e4fd7966ae01a927387a8a23a7523","author":{"name":"Krzysztof Parzyszek","email":"40979b2c4eb65586fe7bead22e2c9fb24795e47a@codeaurora.org"},"message":"Do not use MRI::getMaxLaneMaskForVReg as a mask covering whole register\n\nMRI::getMaxLaneMaskForVReg does not always cover the whole register.\nFor example, on X86 the upper 16 bits of EAX cannot be accessed via\nany subregister. Consequently, there is no lane mask that only covers\nthat part of EAX. The getMaxLaneMaskForVReg will return the union of\nthe lane masks for all subregisters, and in case of EAX, that union\nwill not cover the upper 16 bits.\n\nThis fixes https://llvm.org/bugs/show_bug.cgi?id=29132\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279969 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/adef5a69683e4fd7966ae01a927387a8a23a7523"},{"sha":"bbb2e05d37e43b046653814075a966a6cf78f9e3","author":{"name":"Sanjay Patel","email":"8a358757f1b64d62facccc1fd839683fb6856b45@rotateright.com"},"message":"[TargetLowering] remove fdiv and frem from canOpTrap() (PR29114)\n\nAssuming the default FP env, we should not treat fdiv and frem any differently in terms of \ntrapping behavior than any other FP op. Ie, FP ops do not trap with the default FP env.\n\nThis matches how we treat these ops in IR with isSafeToSpeculativelyExecute(). There's a \nsimilar bug in Constant::canTrap().\n\nThis bug manifests in PR29114:\nhttps://llvm.org/bugs/show_bug.cgi?id=29114\n...as a sequence of scalar divisions instead of a vector division on x86 for a <3 x float> \ntype.\n\nDifferential Revision: https://reviews.llvm.org/D23974\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279970 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/bbb2e05d37e43b046653814075a966a6cf78f9e3"},{"sha":"bce16c69f05f533489e78460c9ec4da1126036b8","author":{"name":"Gor Nishanov","email":"fb866159a74d8f9eddf569e3634ee8173b198849@gmail.com"},"message":"[Coroutines] Part 9: Add cleanup subfunction.\n\nSummary:\n[Coroutines] Part 9: Add cleanup subfunction.\n\nThis patch completes coroutine heap allocation elision. Now, the heap elision example from docs\\Coroutines.rst compiles and produces expected result (see test/Transform/Coroutines/ex3.ll)\n\nIntrinsic Changes:\n* coro.free gets a token parameter tying it to coro.id to allow reliably discovering all coro.frees associated with a particular coroutine.\n* coro.id gets an extra parameter that points back to a coroutine function. This allows to check whether a coro.id describes the enclosing function or it belongs to a different function that was later inlined.\n\nCoroSplit now creates three subfunctions:\n# f$resume - resume logic\n# f$destroy - cleanup logic, followed by a deallocation code\n# f$cleanup - just the cleanup code\n\nCoroElide pass during devirtualization replaces coro.destroy with either f$destroy or f$cleanup depending whether heap elision is performed or not.\n\nOther fixes, improvements:\n* Fixed buglet in Shape::buildFrame that was not creating coro.save properly if coroutine has more than one suspend point.\n\n* Switched to using variable width suspend index field (no longer limited to 32 bit index field can be as little as i1 or as large as i<whatever-size_t-is>)\n\nReviewers: majnemer\n\nSubscribers: llvm-commits, mehdi_amini\n\nDifferential Revision: https://reviews.llvm.org/D23844\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279971 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/bce16c69f05f533489e78460c9ec4da1126036b8"},{"sha":"d00367231d65ef2a69f32368f54a0be28c29629c","author":{"name":"Sanjay Patel","email":"8a358757f1b64d62facccc1fd839683fb6856b45@rotateright.com"},"message":"[SimplifyCFG] rename test file, regenerate checks, and add test\n\nThe fdiv test shows a problem similar to:\nhttps://reviews.llvm.org/rL279970\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279972 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/d00367231d65ef2a69f32368f54a0be28c29629c"},{"sha":"ae5557cf0a7758451c0be46cbfdd2d1e3146d56d","author":{"name":"Sanjay Patel","email":"8a358757f1b64d62facccc1fd839683fb6856b45@rotateright.com"},"message":"[Constant] remove fdiv and frem from canTrap()\n\nAssuming the default FP env, we should not treat fdiv and frem any differently in terms of\ntrapping behavior than any other FP op. Ie, FP ops do not trap with the default FP env.\n\nThis matches how we treat the fdiv/frem in IR with isSafeToSpeculativelyExecute() and in \nthe backend after:\nhttps://reviews.llvm.org/rL279970\n\n\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279973 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/ae5557cf0a7758451c0be46cbfdd2d1e3146d56d"},{"sha":"f486ff3a8efe001778093791a03b0a54c5ac37b6","author":{"name":"Teresa Johnson","email":"86073e34b918e7c41ae3dc36d84d2a9e60368583@google.com"},"message":"[LTO] Remove extraneous output\n\nRemove some debugging output to stderr that snuck in with r279576.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279974 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/f486ff3a8efe001778093791a03b0a54c5ac37b6"},{"sha":"3262806b214068783aa544845ffdf1117fbf6c98","author":{"name":"Anna Thomas","email":"6ab69d5d0413b53c075e34a831dd9f590ea00ac1@azul.com"},"message":"[StatepointsForGC] Rematerialize in the presence of PHIs\n\nSummary:\nWhile walking the use chain for identifying rematerializable values in RS4GC,\nadd the case where the current value and base value are the same PHI nodes.\n\nThis will aid rematerialization of geps and casts instead of relocating.\n\nReviewers: sanjoy, reames, igor\n\nSubscribers: llvm-commits\n\nDifferential Revision: https://reviews.llvm.org/D23920\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279975 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/3262806b214068783aa544845ffdf1117fbf6c98"},{"sha":"d05e1fc585472eda45994d7331a0ab137f7d1ddc","author":{"name":"Evandro Menezes","email":"4558f38de273387fe716b7b8b2b0fdc640fac9a4@samsung.com"},"message":"[AArch64] Adjust the scheduling model for Exynos M1.\n\nFurther refine the model for loads.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279976 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/d05e1fc585472eda45994d7331a0ab137f7d1ddc"},{"sha":"bf8ab3e6da104f49faef4e271a0b655ad250e7b4","author":{"name":"Teresa Johnson","email":"86073e34b918e7c41ae3dc36d84d2a9e60368583@google.com"},"message":"[gold] Fix test accidentally regressed for newer gold\n\nWith r279911 I accidentally regressed the gold/X86/start-lib-common.ll\ntest for newer golds (v1.12+) that honor the --start-lib/--end-lib.\nRemove the alignment which should not be there to make this work with\nboth old and new gold linkers.\n\nAdditionally, now that we have a subdirectory for v1.12+ gold tests,\ncopy this test there and check specifically for the v1.12+ behavior.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279977 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/bf8ab3e6da104f49faef4e271a0b655ad250e7b4"},{"sha":"e8beddd0159b47656765c46bf128e575cea150e6","author":{"name":"Reid Kleckner","email":"52b754ec9164ffe1549cbed996e28ab476b86804@google.com"},"message":"Make vec_fabs.ll pass with MSVC 2013\n\nWe should revert this change once we drop support for MSVC 2013.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279979 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/e8beddd0159b47656765c46bf128e575cea150e6"},{"sha":"f94d4a796c7b8b9c11976de6410ae747073fcfb4","author":{"name":"David Majnemer","email":"91e5316c8b6f36582c592cdd58f2afe7b1ce84d8@gmail.com"},"message":"[SimplifyCFG] Hoisting invalidates metadata\n\nWe forgot to remove optimization metadata when performing hosting during\nFoldTwoEntryPHINode.\n\nThis fixes PR29163.\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279980 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/f94d4a796c7b8b9c11976de6410ae747073fcfb4"},{"sha":"997a48527920ba6e26a7fa40e161bec37aba91fc","author":{"name":"Vitaly Buka","email":"20e2bb9ee53e7f49c650b4578b091606fe1719ec@google.com"},"message":"[asan] Separate calculation of ShadowBytes from calculating ASanStackFrameLayout\n\nSummary: No functional changes, just refactoring to make D23947 simpler.\n\nReviewers: eugenis\n\nSubscribers: llvm-commits\n\nDifferential Revision: https://reviews.llvm.org/D23954\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279982 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/997a48527920ba6e26a7fa40e161bec37aba91fc"},{"sha":"b8ae70f140f59cd0be6aeb3435ae281794fee820","author":{"name":"Vitaly Buka","email":"20e2bb9ee53e7f49c650b4578b091606fe1719ec@google.com"},"message":"Use store operation to poison allocas for lifetime analysis.\n\nSummary:\nCalling __asan_poison_stack_memory and __asan_unpoison_stack_memory for small\nvariables is too expensive.\n\nCode is disabled by default and can be enabled by -asan-experimental-poisoning.\n\nPR27453\n\nReviewers: eugenis\n\nSubscribers: llvm-commits\n\nDifferential Revision: https://reviews.llvm.org/D23947\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279984 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/b8ae70f140f59cd0be6aeb3435ae281794fee820"},{"sha":"fc5add24fb9d8f67b2dd1355304c7714e96e2d7d","author":{"name":"Kyle Butt","email":"477d37cf5ac939d7e8c2d47b367cf6d6e47a866e@iteratee.net"},"message":"IfConversion: Fix branch predication bug.\n\nThis bug shows up with diamonds that share unpredicable, unanalyzable branches.\nThere's an included test case from Hexagon. What was happening was that we were\nattempting to predicate the branch instruction despite the fact that it was\nchecked to be the same. Now for unanalyzable branches we skip over the branch\ninstructions when predicating the block.\n\nDifferential Revision: https://reviews.llvm.org/D23939\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@279985 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/apple/swift-llvm/commits/fc5add24fb9d8f67b2dd1355304c7714e96e2d7d"}]}
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