{"push_id":1081641899,"size":75,"distinct_size":75,"ref":"refs/heads/nir-lowering-doubles-2.0","head":"3b05e08ec7b28df775dd6d85846e62623b904802","before":"23a63be94a356a8d2400836bd1f6ccdfabbb48be","commits":[{"sha":"d4a21a0de073d302b3afb2c8896923e7cbf93b79","author":{"email":"581bc03c0411458e35a55923845fcf36445f560e@gmail.com","name":"Thomas Hindoe Paaboel Andersen"},"message":"winsys/amdgpu: fix preamble IB size\n\nThe missing break caused the IB size to be overwritten with\nthe size of IB_CONST.\n\nThis was introduced in: 7201230582e060aa2eb79c825d3188b437ef7bb8\n\nSigned-off-by: Marek Olšák <marek.olsak@amd.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/d4a21a0de073d302b3afb2c8896923e7cbf93b79"},{"sha":"f45f54e14ac54460f2785bc14fc1f9220a0a763d","author":{"email":"1d31d94f30d40df7951505d1034e1e923d02ec49@basnieuwenhuizen.nl","name":"Bas Nieuwenhuizen"},"message":"radeonsi: Use defines for CONTEXT_CONTROL instead of magic values.\n\nv2: Use field names provided by Nicolai.\nv3: Updated to use CONTEXT_CONTROL prefix.\n\nSigned-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>\nReviewed-by: Marek Olšák <marek.olsak@amd.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/f45f54e14ac54460f2785bc14fc1f9220a0a763d"},{"sha":"4d13c7c8794082400e383ac6d76eb6ba753dcb0f","author":{"email":"1d31d94f30d40df7951505d1034e1e923d02ec49@basnieuwenhuizen.nl","name":"Bas Nieuwenhuizen"},"message":"radeonsi: Enable loading into CE RAM.\n\nWe need to enable a bit in the CONTEXT_CONTROL packet for the\nloads to work.\n\nv2: Style issues.\n\nSigned-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>\nReviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/4d13c7c8794082400e383ac6d76eb6ba753dcb0f"},{"sha":"51d1551241b8c0e41da810106cf037ce91165719","author":{"email":"1d31d94f30d40df7951505d1034e1e923d02ec49@basnieuwenhuizen.nl","name":"Bas Nieuwenhuizen"},"message":"winsys/amdgpu: Silence possibly uninitialized variable warning.\n\nSigned-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>\nReviewed-by: Marek Olšák <marek.olsak@amd.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/51d1551241b8c0e41da810106cf037ce91165719"},{"sha":"4abe051a3f848af074193140930dab7fdca297bc","author":{"email":"1d31d94f30d40df7951505d1034e1e923d02ec49@basnieuwenhuizen.nl","name":"Bas Nieuwenhuizen"},"message":"gallium/radeon: Silence possibly uninitialized variable warning.\n\nSigned-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>\nReviewed-by: Marek Olšák <marek.olsak@amd.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/4abe051a3f848af074193140930dab7fdca297bc"},{"sha":"9bbf3737f9c96377bee65b947da3e63adaa58d58","author":{"email":"666d82badf37dc240bacece830d7f52411b6fee3@jsg.id.au","name":"Jonathan Gray"},"message":"egl/x11: authenticate before doing chipset id ioctls\n\nFor systems without udev or sysfs that use drm ioctls in the loader\ndrm authentication must take place earlier or the loader will fail\n\"MESA-LOADER: failed to get param for i915\".\n\nPatch from Mark Kettenis.\n\nCc: \"11.2 11.1\" <mesa-stable@lists.freedesktop.org>\nSigned-off-by: Mark Kettenis <kettenis@openbsd.org>\nSigned-off-by: Jonathan Gray <jsg@jsg.id.au>\n[Emil Velikov: remove gratuitous white-space]\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/9bbf3737f9c96377bee65b947da3e63adaa58d58"},{"sha":"5d09394fb119ba68e735750eaf4d8590b8a6fed6","author":{"email":"666d82badf37dc240bacece830d7f52411b6fee3@jsg.id.au","name":"Jonathan Gray"},"message":"i965/tiled_memcpy: don't unconditionally use __builtin_bswap32\n\nUse the defines Mesa configure sets to indicate presence of the bswap32\nbuiltins.  This lets i965 work on OpenBSD again after the changes that\nwere made in 0a5d8d9af42fd77fce1492d55f958da97816961a.\n\nSigned-off-by: Jonathan Gray <jsg@jsg.id.au>\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>\nReviewed-by: Matt Turner <mattst88@gmail.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/5d09394fb119ba68e735750eaf4d8590b8a6fed6"},{"sha":"28e3ae344be1c49f50a521792966e0d98510075c","author":{"email":"666d82badf37dc240bacece830d7f52411b6fee3@jsg.id.au","name":"Jonathan Gray"},"message":"loader: add a libdrm case for loader_get_device_name_for_fd\n\nUse dev_node_from_fd() with HAVE_LIBDRM to provide an implmentation\nof loader_get_device_name_for_fd() for non-linux systems that\nuse libdrm but don't have udev or sysfs.\n\nSigned-off-by: Jonathan Gray <jsg@jsg.id.au>\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/28e3ae344be1c49f50a521792966e0d98510075c"},{"sha":"30239ba056268a1f5545b1a48de4aae8953042df","author":{"email":"fbb37eacae100e13076d5c4b46f06cfa4d6fa9f8@kernel.org","name":"Rob Herring"},"message":"glsl: android: add back missing generated glcpp include path\n\nCommit 4db8f15a2576 (\"glsl: move the android build scripts a level up\")\ndropped a generated include path for glcpp. Add it back adjusting for the\nnew location.\n\nSigned-off-by: Rob Herring <robh@kernel.org>\nTested-by: Chih-Wei Huang <cwhuang@linux.org.tw>\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/30239ba056268a1f5545b1a48de4aae8953042df"},{"sha":"b27c85c4c089109339fc37135d0a4d2574024632","author":{"email":"fbb37eacae100e13076d5c4b46f06cfa4d6fa9f8@kernel.org","name":"Rob Herring"},"message":"i965: add build rule for brw_nir_trig_workarounds.c on Android\n\nCommit bfd17c76c126 (\"i965: Port INTEL_PRECISE_TRIG=1 to NIR.\") added a\ngenerated file brw_nir_trig_workarounds.c which broke the Android build.\nAdd the necessary makefiles to the Android build.\n\nCc: Kenneth Graunke <kenneth@whitecape.org>\nSigned-off-by: Rob Herring <robh@kernel.org>\nTested-by: Chih-Wei Huang <cwhuang@linux.org.tw>\nReviewed-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/b27c85c4c089109339fc37135d0a4d2574024632"},{"sha":"3b69076435029eb2881863c29afb796872645043","author":{"email":"fbb37eacae100e13076d5c4b46f06cfa4d6fa9f8@kernel.org","name":"Rob Herring"},"message":"dri/common: add MESA_FORMAT_R8G8B8{A8, X8}_UNORM formats as supported configs\n\nAdd MESA_FORMAT_R8G8B8A8_UNORM and MESA_FORMAT_R8G8B8X8_UNORM formats as\nthese are the preferred formats for Android.\n\nSigned-off-by: Rob Herring <robh@kernel.org>\nReviewed-by: Marek Olšák <marek.olsak@amd.com>\nReviewed-by: Eric Anholt <eric@anholt.net>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/3b69076435029eb2881863c29afb796872645043"},{"sha":"ccdcf91104a5f07127b5b8d8570b5c4bbcf86647","author":{"email":"fbb37eacae100e13076d5c4b46f06cfa4d6fa9f8@kernel.org","name":"Rob Herring"},"message":"st/dri: add 32-bit RGBX/RGBA formats\n\nAdd support for 32-bit RGBX/RGBA formats which are preferred for Android.\n\nSigned-off-by: Rob Herring <robh@kernel.org>\nReviewed-by: Marek Olšák <marek.olsak@amd.com>\nReviewed-by: Eric Anholt <eric@anholt.net>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/ccdcf91104a5f07127b5b8d8570b5c4bbcf86647"},{"sha":"1ba203a0855664a1625bf37f4403c19d2f97810c","author":{"email":"fbb37eacae100e13076d5c4b46f06cfa4d6fa9f8@kernel.org","name":"Rob Herring"},"message":"gbm: add GBM_FORMAT_XBGR8888 format support\n\nAdd GBM_FORMAT_XBGR8888/__DRI_IMAGE_FORMAT_XBGR8888 format support which\nis needed for Android.\n\nSigned-off-by: Rob Herring <robh@kernel.org>\nReviewed-by: Marek Olšák <marek.olsak@amd.com>\nReviewed-by: Eric Anholt <eric@anholt.net>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/1ba203a0855664a1625bf37f4403c19d2f97810c"},{"sha":"9dcb3dfb23c98f029a780a22a4cb6aeb8db384d4","author":{"email":"f20878473f414da183da19ee25c8722cc1d711e4@collabora.com","name":"Emil Velikov"},"message":"i965: automake: remove gratuitous \"+\" during variable assignment\n\nThere is not initial assignment, thus appending to it does not work.\n\nFixes: b27c85c4c08 \"i965: add build rule for brw_nir_trig_workarounds.c\"\nSigned-off-by: Emil Velikov <emil.velikov@collabora.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/9dcb3dfb23c98f029a780a22a4cb6aeb8db384d4"},{"sha":"81c1c481ed2ea89e6bbccf37705c2ee95d78388f","author":{"email":"54947742fe7299a578dbb84f6c782c6c4c668d8f@intel.com","name":"Tim Rowley"},"message":"swr: add PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT to get_param\n\nReviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/81c1c481ed2ea89e6bbccf37705c2ee95d78388f"},{"sha":"0020ca3c9269a8baa54501cb824af14fa497ac14","author":{"email":"749697f19798b7f640b17221fd283b903825f071@intel.com","name":"Topi Pohjolainen"},"message":"i965/blorp: Do not emit pma stall on gen9+\n\nThis was left out from the original gen8 upload introduction.\n\nSigned-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/0020ca3c9269a8baa54501cb824af14fa497ac14"},{"sha":"33565d67641142a68d537023e181b6dcd587e551","author":{"email":"789b315743a28dd066a4ba1459c35951c291d8a6@gmail.com","name":"Matt Turner"},"message":"i965/fs: Readd opt_drop_redundant_mov_to_flags().\n\nThis reverts commit b449366587b5f3f64c6fb45fe22c39e4bc8a4309.\n\nI removed the pass thinking that it was now not useful, but that was not\ntrue. I believe I ran shader-db on HSW and saw no results, but HSW does\nnot use the unlit centroid workaround code and as a result does not emit\nredundant MOV_DISPATCH_TO_FLAGS instructions.\n\nOn IVB, the shader-db results are:\n\ntotal instructions in shared programs: 6650806 -> 6646303 (-0.07%)\ninstructions in affected programs: 106893 -> 102390 (-4.21%)\nhelped: 793\n\ntotal cycles in shared programs: 56195538 -> 56103720 (-0.16%)\ncycles in affected programs: 873048 -> 781230 (-10.52%)\nhelped: 553\nHURT: 209\n\nOn SNB, the shader-db results are:\n\ntotal instructions in shared programs: 7173074 -> 7168541 (-0.06%)\ninstructions in affected programs: 119757 -> 115224 (-3.79%)\nhelped: 799\n\ntotal cycles in shared programs: 98128032 -> 98072938 (-0.06%)\ncycles in affected programs: 1437104 -> 1382010 (-3.83%)\nhelped: 454\nHURT: 237\n\nReviewed-by: Iago Toral Quiroga <itoral@igalia.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/33565d67641142a68d537023e181b6dcd587e551"},{"sha":"1bc983cd649af10d87500ceda37d7a36aa3741a6","author":{"email":"789b315743a28dd066a4ba1459c35951c291d8a6@gmail.com","name":"Matt Turner"},"message":"glsl: Relax GLSL 1.10 float suffix error to a warning.\n\nFloat suffixes are allowed in all subsequent GLSL specifications, and\nit's obvious what the user meant if they specify one. Accept it with a\nwarning to avoid breaking applications, like Planeshift (although it\nlooks like between 0.6.1 and 0.6.3 they might have removed the suffixes\nfrom their shaders).\n\nReviewed-by: Lars Hamre <chemecse@gmail.com>\nReviewed-by: Roland Scheidegger <sroland@vmware.com>\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/1bc983cd649af10d87500ceda37d7a36aa3741a6"},{"sha":"38f4cee3ff36970254ddce238638c4b9724669e3","author":{"email":"1d31d94f30d40df7951505d1034e1e923d02ec49@basnieuwenhuizen.nl","name":"Bas Nieuwenhuizen"},"message":"radeonsi: Add config parameter to si_shader_apply_scratch_relocs.\n\nshader->config is not updated for compute kernels.\n\nSigned-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>\nReviewed-by: Tom Stellard <thomas.stellard@amd.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/38f4cee3ff36970254ddce238638c4b9724669e3"},{"sha":"bdaa0e12a20f17b757d88ef9a33a22847b988c51","author":{"email":"a847aabaac44184372f6b1cd1a59aa254daaeb0b@igalia.com","name":"Iago Toral Quiroga"},"message":"i965/blorp: Improve precission of blitting coordinates when clipping\n\nWe do this in two steps: first we clip the dst rect and adjust the src\nrect accordingly. Then we do it the other way around. In both passes\nthe adjustment part involves multiplying by a scale factor that can lead\nto a small precision loss. This is breaking a few dEQP tests.\n\nSpecifically, the problem happens when we need to clip the same coordinate\ntwice. For example, if srcX0 and dstX0 need both to be clipped we want to\navoid the situation where we clip srcX0 first, then adjust dstX0 accordingly\nbut then we realize that the resulting dstX0 still needs to be clipped, so\nwe clip dstX0 and adjust srcX0 again. Each of these two passes can lead\nto precission loss. What we want to do here is detect the rect that leads\nto the largest clip (accounting for the scale factor involved), clip that\nrect and adjust the other one. With this we ensure that the adjusted\ncoordinate does not need to be clipped again and we can skip a second pass,\nimproving precision.\n\nFixes the following 4 dEQP tests:\ndEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_src_x_nearest\ndEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_src_x_linear\ndEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_dst_x_nearest\ndEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_dst_x_linear\n\nReviewed-by: Kenneth Graunke <kenneth@whitecape.org>\nTested-by: Mark Janes <mark.a.janes@intel.com>","distinct":true,"url":"https://api.github.com/repos/Igalia/mesa/commits/bdaa0e12a20f17b757d88ef9a33a22847b988c51"}]}