{"push_id":1267943377,"size":4,"distinct_size":4,"ref":"refs/heads/integrate-osd","head":"e93f285c8114ff12a821caeeada61201a30b7236","before":"cb3251fb6e8bdfeddf892435f076e8173b94daa0","commits":[{"sha":"ba1d447ccf25262982d60185c120d6f4214a21f8","author":{"name":"Philipp Wagner","email":"a619d2b71933ed66cf929f875bc6b8fad0c588c5@tum.de"},"message":"Add demo software","distinct":true,"url":"https://api.github.com/repos/optimsoc/sources/commits/ba1d447ccf25262982d60185c120d6f4214a21f8"},{"sha":"09d3d9c2f65ae85aac17eb1d3f6f6f2114f98588","author":{"name":"Philipp Wagner","email":"a619d2b71933ed66cf929f875bc6b8fad0c588c5@tum.de"},"message":"cam-example: explicitly connect all wires\n\notherwise XVCLK is double-connected without it being visible, leading to\nsynthesis DRC errors (sometimes)","distinct":true,"url":"https://api.github.com/repos/optimsoc/sources/commits/09d3d9c2f65ae85aac17eb1d3f6f6f2114f98588"},{"sha":"085443185584d5cd2eaae973c588d0ee90b95c52","author":{"name":"Philipp Wagner","email":"a619d2b71933ed66cf929f875bc6b8fad0c588c5@tum.de"},"message":"osd/sw: flush STM printf() and send to STDOUT\n\nI guess the flush after printf() should stay in there, the printf to\nstdout not?","distinct":true,"url":"https://api.github.com/repos/optimsoc/sources/commits/085443185584d5cd2eaae973c588d0ee90b95c52"},{"sha":"e93f285c8114ff12a821caeeada61201a30b7236","author":{"name":"Philipp Wagner","email":"a619d2b71933ed66cf929f875bc6b8fad0c588c5@tum.de"},"message":"example-cam: connect missing wire","distinct":true,"url":"https://api.github.com/repos/optimsoc/sources/commits/e93f285c8114ff12a821caeeada61201a30b7236"}]}
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