{"action":"created","issue":{"url":"https://api.github.com/repos/VUnit/vunit/issues/144","repository_url":"https://api.github.com/repos/VUnit/vunit","labels_url":"https://api.github.com/repos/VUnit/vunit/issues/144/labels{/name}","comments_url":"https://api.github.com/repos/VUnit/vunit/issues/144/comments","events_url":"https://api.github.com/repos/VUnit/vunit/issues/144/events","html_url":"https://github.com/VUnit/vunit/issues/144","id":139528791,"number":144,"title":"Cryptic vhdl_parser.py error","user":{"login":"adrspa","id":12691848,"avatar_url":"https://avatars.githubusercontent.com/u/12691848?v=3","gravatar_id":"","url":"https://api.github.com/users/adrspa","html_url":"https://github.com/adrspa","followers_url":"https://api.github.com/users/adrspa/followers","following_url":"https://api.github.com/users/adrspa/following{/other_user}","gists_url":"https://api.github.com/users/adrspa/gists{/gist_id}","starred_url":"https://api.github.com/users/adrspa/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/adrspa/subscriptions","organizations_url":"https://api.github.com/users/adrspa/orgs","repos_url":"https://api.github.com/users/adrspa/repos","events_url":"https://api.github.com/users/adrspa/events{/privacy}","received_events_url":"https://api.github.com/users/adrspa/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":null,"milestone":null,"comments":1,"created_at":"2016-03-09T09:53:49Z","updated_at":"2016-03-09T17:53:04Z","closed_at":null,"body":"This is the traceback I got:\r\n\r\nTraceback (most recent call last):\r\n  File \"vunit/vunit/project.py\", line 699, in parse\r\n    design_file = parser.parse(code, self.name, self._content_hash)\r\n  File \"vunit/vunit/vhdl_parser.py\", line 60, in parse\r\n    design_file = VHDLDesignFile.parse(code)\r\n  File \"vunit/vunit/vhdl_parser.py\", line 93, in parse\r\n    return cls(entities=list(VHDLEntity.find(code)),\r\n  File \"vunit/vunit/vhdl_parser.py\", line 324, in find\r\n    yield VHDLEntity.parse(sub_code[:match.end()])\r\n  File \"vunit/vunit/vhdl_parser.py\", line 343, in parse\r\n    generics = cls._find_generic_clause(code)\r\n  File \"vunit/vunit/vhdl_parser.py\", line 370, in _find_generic_clause\r\n    code[match.start(): match.end() + closing_pos + match_semicolon.end()])\r\n  File \"vunit/vunit/vhdl_parser.py\", line 455, in _parse_generic_clause\r\n    generic_list.append(VHDLInterfaceElement.parse(interface_element))\r\n  File \"vunit/vunit/vhdl_parser.py\", line 573, in parse\r\n    mode_split = interface_element_string.split(':')[1].strip().split(None, 1)\r\nIndexError: list index out of range\r\n  ERROR - Failed to parse /vobs/rbs/hw/ru_fpga/ru_lib/ti/tb/tb_ti_str.vhd\r\nTraceback (most recent call last):\r\n  File \"run.py\", line 91, in <module>\r\n    tb_ti_str = lib.entity(\"tb_ti_str\")\r\n  File \"vunit/vunit/ui.py\", line 991, in entity\r\n    raise KeyError(name)\r\nKeyError: 'tb_ti_str'\r\n\r\n\r\nThe extra \";\" in the entity made it crash. A more intelligible error message would be nice. :-)\r\n\r\nENTITY tb_ti_str IS\r\n  GENERIC (runner_cfg            : runner_cfg_t;\r\n           g_test_clock_en_speed : INTEGER;\r\n           g_axi_stim_file       : STRING;\r\n           g_data_0_file         : STRING := \"\";\r\n           g_data_1_file         : STRING := \"\";\r\n           );\r\nEND tb_ti_str;"},"comment":{"url":"https://api.github.com/repos/VUnit/vunit/issues/comments/194423104","html_url":"https://github.com/VUnit/vunit/issues/144#issuecomment-194423104","issue_url":"https://api.github.com/repos/VUnit/vunit/issues/144","id":194423104,"user":{"login":"kraigher","id":4018223,"avatar_url":"https://avatars.githubusercontent.com/u/4018223?v=3","gravatar_id":"","url":"https://api.github.com/users/kraigher","html_url":"https://github.com/kraigher","followers_url":"https://api.github.com/users/kraigher/followers","following_url":"https://api.github.com/users/kraigher/following{/other_user}","gists_url":"https://api.github.com/users/kraigher/gists{/gist_id}","starred_url":"https://api.github.com/users/kraigher/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/kraigher/subscriptions","organizations_url":"https://api.github.com/users/kraigher/orgs","repos_url":"https://api.github.com/users/kraigher/repos","events_url":"https://api.github.com/users/kraigher/events{/privacy}","received_events_url":"https://api.github.com/users/kraigher/received_events","type":"User","site_admin":false},"created_at":"2016-03-09T17:53:04Z","updated_at":"2016-03-09T17:53:04Z","body":"The current VHDL parser is a bit rudimentary and one of the oldest parts of VUnit. \r\nIt is pretty much based on loose regexps and it does not have much error handling or good error reporting. I have plans to re-write the VHDL parser based on tokenization with location information in the same way as the current Verilog parser. After this work is finished the error messages will be much better."}}