{"push_id":1251549948,"size":42,"distinct_size":42,"ref":"refs/heads/next","head":"fd6ba7a69816df6b254cab074658c4d63681c4f5","before":"3b3a6a15ecebe7846e0fc81b5bf00b765fd3d69b","commits":[{"sha":"325903dad9dd17e2dce4e60c6d44db8ace03a24e","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"core: Introduce arch_cell_reset hook\n\nThis adds a clean hook to inform the architectures about a complete cell\nreset. Rather than counting arch_reset_cpu invocations, this hook is a\nstraightforward way to perform cell-wide reset steps. ARM will use it,\nx86 has no demand so far.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/325903dad9dd17e2dce4e60c6d44db8ace03a24e"},{"sha":"c6039606d455f16d2318a456bdf3ecf2ba6e875c","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Invalidate d-cache entries on cell reset and destruction\n\nAll d-cache entries related to memory that a cell will use after reset\nor that a destructed cell was using are irrelevant now. Invalidate them\nso that nothing leaks from/to other cells or previous sessions of the\nsame cell.\n\nCC: Marc Zyngier <marc.zyngier@arm.com>\nCC: Mark Rutland <mark.rutland@arm.com>\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/c6039606d455f16d2318a456bdf3ecf2ba6e875c"},{"sha":"b399877ef09acc023be33a22ac60ef8f79f48990","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Remove arch_cell_caches_flush and arch_cpu_icache_flush\n\nWe now invalidate/clean the cell caches via MVA, and the driver performs\na MVA-based flush of everything it loads into a cell as well. So we can\nsafely drop arch_cell_caches_flush as well as arch_cpu_icache_flush that\nonly this function invokes.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/b399877ef09acc023be33a22ac60ef8f79f48990"},{"sha":"7106db9612feeaf7c7e7322387c896c05172ea98","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Move cell ID check to arm_paging_cell_init\n\nIt's sufficient to do this once during cell initialization. Make the\nerror traceable at this chance.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/7106db9612feeaf7c7e7322387c896c05172ea98"},{"sha":"167c3d37d5c3905ed1d02bc3675962ef885980f2","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Remove return code from arm_paging_vcpu_init\n\nIt always returns 0 now.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/167c3d37d5c3905ed1d02bc3675962ef885980f2"},{"sha":"329a340ff9366a2a4dd08e2fae0ffd13a5cde98b","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Refactor arch_cpu_tlb_flush to arm_paging_vcpu_flush_tlbs\n\nMove resetting of flush_vcpu_caches to the callers the actually require\nit, then remove the misleading cpu_data argument (service only works for\nthe calling CPU) and rename it so that it is consistent with other cache\nflushing services.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/329a340ff9366a2a4dd08e2fae0ffd13a5cde98b"},{"sha":"5d8b85b913d4974d22e6f6b0ac179cb62d8b2d17","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Simplify CPU shutdown\n\nAlign with x86 and call the shutdown function on return from the disable\nhypercall. All the special cases in arch_reset_self are no longer needed\nsince we only shut down with all CPUs assigned to the root cell (commit\ne69075455bd1).\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/5d8b85b913d4974d22e6f6b0ac179cb62d8b2d17"},{"sha":"b4c1bb8cd7787ccac5bd692210ce415a6095b8a0","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Remove PC and CPSR from trap context\n\nThis allows to manipulate them also from functions that do not have\naccess to a reference to the current exception context\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/b4c1bb8cd7787ccac5bd692210ce415a6095b8a0"},{"sha":"312e32a2eee1490d36d876a4e0ff96c527bb44d5","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Let arm_paging_vcpu_init take paging structure as argument\n\nPrepare for setting a VCPU to different paging structures than those of\nits owner cell.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/312e32a2eee1490d36d876a4e0ff96c527bb44d5"},{"sha":"87a29e59248c4990044fbcf074d6d79c750a4872","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Introduce CPU parking page\n\nThis prepares ARM to park CPUs in guest mode instead of host mode. It\nwill allow to reuse many of the control logic of x86 for managing CPUs\nthat are in emulated shutdown or in waiting state before a cell starts.\n\nIn fact, we could make this a generic pattern later on, converting also\nthe Intel-specific version to this.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/87a29e59248c4990044fbcf074d6d79c750a4872"},{"sha":"294a1b5297f5dcc9106fed24ca3411a2c3f0d087","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Introduce infrastructure for reworked CPU management\n\nThe existing CPU management that provides reset, parking and PSCI\nemulation is broken (full of races) and unfortunately unfixable. The\nonly option found was a complete rewrite, switching to the logic that\nalso x86 uses.\n\nThis prepares the switch by introducing the key services first. Those\nare the event handling function check_events with additional helpers.\narm_cpu_park uses the new parking page to stop a CPU in guest mode.\ncpu_reset is widely identical to arch_reset_el1 and partly to\narch_reset_self and will replace both. All services remain unused for\nnow (SGI_EVENT is dispatched but not yet raised).\n\nOne key difference of the new logic is that the tricky to understand\njumps from the PSCI suspension loop to different resumption points will\nbe gone. Instead, events signaled via a kick plus various flags in the\nper_cpu data structure decide what the CPU will do next. Processing of\nthose flags takes place in check_events.\n\nThe flags are generally protected now by a spinlock, resolving many of\nthe subtle wake-up races of the old code.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/294a1b5297f5dcc9106fed24ca3411a2c3f0d087"},{"sha":"1e13cb8157fb43fc3b863f0e87c2d69fbd08b4a6","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Reorder function to match final layout\n\nNon-functional change to match the arch_*_cpu function ordering of x86\nalso on ARM. Helps when comparing code and will reduce the churn of the\nfollowing commits a bit.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/1e13cb8157fb43fc3b863f0e87c2d69fbd08b4a6"},{"sha":"6f9f9d69c68ac75e6fda1dffcc06fae141e9f4ca","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Refactor SMP setup and cleanup\n\nPrepare for a cleaner setup and cleanup of the SMP subsystem: introduce\na platform init function called once during setup as well as per-cell\ninit/exit functions. Those are stubbed for PSCI-based platforms and only\nneed to be implemented for vexpress so far.\n\nWe emulate the previous invocation of the init op for the root cell\nduring setup via smp_init. Note that init was and is only called for the\nroot cell (a highly confusing interface).\n\nOne difference of the new code for vexpress is that we will now expose\nthe mailbox interface for kicking off secondary CPUs also to non-root\ncells. So far we only offered PSCI emulation, but there is no point in\nhiding the FLAGSSET register in an emulated for from them - they will\nnow be able to chose the wake-up method.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/6f9f9d69c68ac75e6fda1dffcc06fae141e9f4ca"},{"sha":"9ba3afdcb6d1b717b7629f294795d80e625f1d33","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Switch to new CPU management services\n\nThis patch became larger than usual ones, but I haven't found a way to\nmake it smaller. That's due to the fact it replaces the old, racy CPU\nonlining/offlining/reset logic with the one derived from x86.\n\nAlong this comes a simplification of the smp interface we only have to\ncater those few SoCs without proper PSCI support: it is no longer\nrequired to add stubs for PSCI-based platforms. Consequently, those for\nTK1 and Allwinner A20 are removed.\n\nNow obsolete PSCI fragments will be purged in a separate patch.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/9ba3afdcb6d1b717b7629f294795d80e625f1d33"},{"sha":"b4173c93a33beaef30a7e7be672a0a23bcf50f12","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Move smc trampoline to exception.S\n\npsci_low.S is going to be obsoleted.\n\nComes with two indention adjustments that didn't deserve a separate\ncommit.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/b4173c93a33beaef30a7e7be672a0a23bcf50f12"},{"sha":"7ce0aec0774a8a2a91573ac87fc4a99f0f4f57b8","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Remove unused PSCI code, types and defines\n\nDrop PSCI functions as well as types and defines that are no longer (or\nwere never) used.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/7ce0aec0774a8a2a91573ac87fc4a99f0f4f57b8"},{"sha":"6b51f234816c6f0e4d2cd2c7648840f090d0d220","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Re-indent psci.h\n\nNo functional changes, just better alignment with surrounding code.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/6b51f234816c6f0e4d2cd2c7648840f090d0d220"},{"sha":"d718ec497a431b274e9c2e1102487c7f312d4c2a","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Adjust includes of percpu.h\n\npercpu.h actually wants processor.h due to the arm_read_sysreg.\nAdjusting this requires a cleaner explicit include of the same header by\nentry.S as well.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/d718ec497a431b274e9c2e1102487c7f312d4c2a"},{"sha":"d60d9d448497e04a13647c6124153d8b6cf7db6c","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Reorder includes according to Jailhouse standard\n\nGeneric includes should always come first, and alphabetical sorting is\ndesired. No functional changes.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/d60d9d448497e04a13647c6124153d8b6cf7db6c"},{"sha":"b1de7ace5a3fd25db714020e3d152f05defcdaf2","author":{"name":"Jan Kiszka","email":"43ec288f57ce2167dc702d43d1d371e3e3fbd31f@siemens.com"},"message":"arm: Move arm_read/write_banked_reg definition to processor.h\n\nAccess to those registers is not only trap-related.\n\nSigned-off-by: Jan Kiszka <jan.kiszka@siemens.com>","distinct":true,"url":"https://api.github.com/repos/siemens/jailhouse/commits/b1de7ace5a3fd25db714020e3d152f05defcdaf2"}]}
{"actor":{"display_login":"jan-kiszka"}}