{"push_id":938312627,"size":14,"distinct_size":0,"ref":"refs/heads/<1452824612-29465-1-git-send-email-caoj.fnst@cn.fujitsu.com>","head":"1f77ca6c49e0dcfd2277d45c288c35888a12c66c","before":"f22d3434949ca1e4a4e3aef25b1d5d8b5ebfba79","commits":[{"sha":"deb2db996cbb9470b39ae1e383791ef34c4eb3c2","author":{"email":"d52c053e8cccbff1eaf9ca7ff0dbf6bc0df3ceb4@virtualopensystems.com","name":"Alvise Rigo"},"message":"target-arm: Use the right MMU index in arm_regime_using_lpae_format\n\narm_regime_using_lpae_format checks whether the LPAE extension is used\nfor stage 1 translation regimes. MMU indexes not exclusively of a stage 1\nregime won't work with this method.\n\nIn case of ARMMMUIdx_S12NSE0 or ARMMMUIdx_S12NSE1, offset these values\nby ARMMMUIdx_S1NSE0 to get the right index indicating a stage 1\ntranslation regime.\n\nRename also the function to arm_s1_regime_using_lpae_format and update\nthe comments to reflect the change.\n\nSigned-off-by: Alvise Rigo <a.rigo@virtualopensystems.com>\nMessage-id: 1452854262-19550-1-git-send-email-a.rigo@virtualopensystems.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/deb2db996cbb9470b39ae1e383791ef34c4eb3c2"},{"sha":"dc3b89ef87dc0ecd5ba435c155ad8511b848d909","author":{"email":"52ecf00b70a50079ae8d5fa09b9af6904950b63c@xilinx.com","name":"Alistair Francis"},"message":"xlnx-zynqmp: Add support for high DDR memory regions\n\nThe Xilinx ZynqMP SoC and EP108 board supports three memory regions:\n - A 2GB region starting at 0\n - A 32GB region starting at 32GB\n - A 256GB region starting at 768GB\n\nThis patch adds support for the first two memory regions, which is\nautomatically created based on the size specified by the QEMU memory\ncommand line argument.\n\nOn hardware the physical memory region is one continuous region, it is then\nmapped into the three different regions by the DDRC. As we don't model the\nDDRC this is done at startup by QEMU. The board creates the memory region and\nthen passes that memory region to the SoC. The SoC then maps the memory\nregions.\n\nSigned-off-by: Alistair Francis <alistair.francis@xilinx.com>\nReviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>\nMessage-id: a1e47db941d65733724a300fcd98b74fbeeaaf22.1452637205.git.alistair.francis@xilinx.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/dc3b89ef87dc0ecd5ba435c155ad8511b848d909"},{"sha":"f1cd483004da30a905ee6cf5d3268181f6c13e1a","author":{"email":"20ca6a98b2289e315ee985b8cb9cb36522e95d55@redhat.com","name":"Andrew Jones"},"message":"qapi-schema: dump-guest-memory: Improve text\n\ndump-guest-memory is supported by more than just x86, however\nthe paging option is not.\n\n(No functional change.)\n\nSigned-off-by: Andrew Jones <drjones@redhat.com>\nReviewed-by: Eric Blake <eblake@redhat.com>\nMessage-id: 1452542185-10914-2-git-send-email-drjones@redhat.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/f1cd483004da30a905ee6cf5d3268181f6c13e1a"},{"sha":"b09afd58e4cb61a854c34040a12962e5b6f05ca5","author":{"email":"20ca6a98b2289e315ee985b8cb9cb36522e95d55@redhat.com","name":"Andrew Jones"},"message":"dump: qemunotes aren't commonly needed\n\nOnly one of three architectures implementing qmp-dump-guest-memory write\nqemu notes. And, another architecture (arm/aarch64) is coming, which\nwon't use them either. Make the common implementation truly common.\n\n(No functional change.)\n\nSigned-off-by: Andrew Jones <drjones@redhat.com>\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nMessage-id: 1452542185-10914-3-git-send-email-drjones@redhat.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/b09afd58e4cb61a854c34040a12962e5b6f05ca5"},{"sha":"8161befdd15ddc5a8bb9e807ff1ac5907c594688","author":{"email":"20ca6a98b2289e315ee985b8cb9cb36522e95d55@redhat.com","name":"Andrew Jones"},"message":"dump: allow target to set the page size\n\nThis is necessary for targets that don't have TARGET_PAGE_SIZE ==\nreal-target-page-size. The target should set the page size to the\ncorrect one, if known, or, if not known, to the maximum page size\nit supports.\n\n(No functional change.)\n\nSigned-off-by: Andrew Jones <drjones@redhat.com>\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nMessage-id: 1452542185-10914-4-git-send-email-drjones@redhat.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/8161befdd15ddc5a8bb9e807ff1ac5907c594688"},{"sha":"b6e05aa473b52e049654fae834453232e6b6e798","author":{"email":"20ca6a98b2289e315ee985b8cb9cb36522e95d55@redhat.com","name":"Andrew Jones"},"message":"dump: allow target to set the physical base\n\ncrash assumes the physical base in the kdump subheader of\nmakedumpfile formatted dumps is correct. Zero is not correct\nfor all architectures, so allow it to be changed.\n\n(No functional change.)\n\nSigned-off-by: Andrew Jones <drjones@redhat.com>\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nMessage-id: 1452542185-10914-5-git-send-email-drjones@redhat.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/b6e05aa473b52e049654fae834453232e6b6e798"},{"sha":"da2b91409ffe33f0a59acff1843ce1758325f2ec","author":{"email":"20ca6a98b2289e315ee985b8cb9cb36522e95d55@redhat.com","name":"Andrew Jones"},"message":"target-arm: support QMP dump-guest-memory\n\nAdd the support needed for creating prstatus elf notes. This\nallows us to use QMP dump-guest-memory.\n\nSigned-off-by: Andrew Jones <drjones@redhat.com>\nMessage-id: 1452542185-10914-6-git-send-email-drjones@redhat.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\n[PMM: moved setting of cpu::write_elf64_note inside !CONFIG_USER_ONLY\n ifdef to avoid compile failure for linux-user build]\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/da2b91409ffe33f0a59acff1843ce1758325f2ec"},{"sha":"bada8e4470a4fe57c67688a49bf18a2cee654ef5","author":{"email":"20ca6a98b2289e315ee985b8cb9cb36522e95d55@redhat.com","name":"Andrew Jones"},"message":"target-arm: dump-guest-memory: add prfpreg notes for aarch64\n\nSigned-off-by: Andrew Jones <drjones@redhat.com>\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nMessage-id: 1452542185-10914-7-git-send-email-drjones@redhat.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/bada8e4470a4fe57c67688a49bf18a2cee654ef5"},{"sha":"7d68e47f1280f911df0ea87051d70a4ee52d701d","author":{"email":"20ca6a98b2289e315ee985b8cb9cb36522e95d55@redhat.com","name":"Andrew Jones"},"message":"elf: add arm note types\n\nSigned-off-by: Andrew Jones <drjones@redhat.com>\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nMessage-id: 1452542185-10914-8-git-send-email-drjones@redhat.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/7d68e47f1280f911df0ea87051d70a4ee52d701d"},{"sha":"ade0d0c0d3a0444c626ec5f46ef75af7395236f6","author":{"email":"20ca6a98b2289e315ee985b8cb9cb36522e95d55@redhat.com","name":"Andrew Jones"},"message":"target-arm: dump-guest-memory: add vfp notes for arm\n\ngdb won't actually dump these with 'info all-registers' since\nit first tries to confirm that it should by checking the VFP\nhwcap in the .auxv note. Well, we don't generate an .auxv note.\n\nSigned-off-by: Andrew Jones <drjones@redhat.com>\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nMessage-id: 1452542185-10914-9-git-send-email-drjones@redhat.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/ade0d0c0d3a0444c626ec5f46ef75af7395236f6"},{"sha":"67736a25f86595c8ae174a21d965af5a027884c9","author":{"email":"fd5a1b5ab7e7147561feda7918cb4fbc00a8bee5@linaro.org","name":"Shannon Zhao"},"message":"ARM: virt: Don't generate RTC ACPI device when using UEFI\n\nWhen booting the VM with UEFI, UEFI takes ownership of the RTC hardware.\nWhile UEFI can use libfdt to disable the RTC device node in the DTB that\nit passes to the OS, it cannot modify AML. Therefore, we won't generate\nthe RTC ACPI device at all when using UEFI.\n\nSigned-off-by: Shannon Zhao <shannon.zhao@linaro.org>\nAcked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>\nReviewed-by: Laszlo Ersek <lersek@redhat.com>\nReviewed-by: Andrew Jones <drjones@redhat.com>\nMessage-id: 1452867091-4023-1-git-send-email-shannon.zhao@linaro.org\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/67736a25f86595c8ae174a21d965af5a027884c9"},{"sha":"5a57acb66f19ee52723aa05b8afbbc41c3e9ec99","author":{"email":"313afa09ce093b19ae1dd74f57c1ebd94508584c@linaro.org","name":"Peter Maydell"},"message":"Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160115' into staging\n\ntarget-arm queue:\n * use the right MMU index when handling unaligned accesses\n * xlnx-zynqmp: Add support for high DDR memory regions\n * target-arm: support QMP dump-guest-memory\n * ARM: virt: Don't generate RTC ACPI device when using UEFI\n\n# gpg: Signature made Fri 15 Jan 2016 15:16:19 GMT using RSA key ID 14360CDE\n# gpg: Good signature from \"Peter Maydell <peter.maydell@linaro.org>\"\n# gpg:                 aka \"Peter Maydell <pmaydell@gmail.com>\"\n# gpg:                 aka \"Peter Maydell <pmaydell@chiark.greenend.org.uk>\"\n\n* remotes/pmaydell/tags/pull-target-arm-20160115:\n  ARM: virt: Don't generate RTC ACPI device when using UEFI\n  target-arm: dump-guest-memory: add vfp notes for arm\n  elf: add arm note types\n  target-arm: dump-guest-memory: add prfpreg notes for aarch64\n  target-arm: support QMP dump-guest-memory\n  dump: allow target to set the physical base\n  dump: allow target to set the page size\n  dump: qemunotes aren't commonly needed\n  qapi-schema: dump-guest-memory: Improve text\n  xlnx-zynqmp: Add support for high DDR memory regions\n  target-arm: Use the right MMU index in arm_regime_using_lpae_format\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/5a57acb66f19ee52723aa05b8afbbc41c3e9ec99"},{"sha":"681550dd464df998fb98f402c71d6e9c4c362b9d","author":{"email":"c5578ac32227d61001c24bf78fc872e2c1452ac3@cn.fujitsu.com","name":"Cao jin"},"message":"dec: convert to realize()\n\nAlso because pci_bridge_initfn() can`t fail.\n\nSigned-off-by: Cao jin <caoj.fnst@cn.fujitsu.com>\nReviewed-by: Markus Armbruster <armbru@redhat.com>\nReviewed-by: Marcel Apfelbaum <marcel@redhat.com>\nMessage-Id: <1452824612-29465-2-git-send-email-caoj.fnst@cn.fujitsu.com>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/681550dd464df998fb98f402c71d6e9c4c362b9d"},{"sha":"1f77ca6c49e0dcfd2277d45c288c35888a12c66c","author":{"email":"c5578ac32227d61001c24bf78fc872e2c1452ac3@cn.fujitsu.com","name":"Cao jin"},"message":"change type of pci_bridge_initfn() to void\n\nSince it can`t fail. Also modify the callers.\n\nSigned-off-by: Cao jin <caoj.fnst@cn.fujitsu.com>\nReviewed-by: Markus Armbruster <armbru@redhat.com>\nMessage-Id: <1452824612-29465-3-git-send-email-caoj.fnst@cn.fujitsu.com>","distinct":false,"url":"https://api.github.com/repos/famz/qemu-patchew/commits/1f77ca6c49e0dcfd2277d45c288c35888a12c66c"}]}