{"push_id":1399885950,"size":867,"distinct_size":867,"ref":"refs/heads/master","head":"dfd0e4b4e20d00a02fdd412251f6146a639ae33c","before":"20ddf732a11b8159a8860f38fcba5f01f3ca1280","commits":[{"sha":"8aff3240c9c8c39d9cbb9f50dddb06c78c3c084e","author":{"name":"LaSombra","email":"38318f233cee5ee4557fdded8e3d28791230115a@users.noreply.github.com"},"message":"Update linux-instructions.md\n\nAdded Fedora 23 required packages","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/8aff3240c9c8c39d9cbb9f50dddb06c78c3c084e"},{"sha":"e1ef4b892f95141e9d27716f46eeb494c1a078f8","author":{"name":"Petr Onderka","email":"49d9b61774360460be83223fcd0549e9f672478b@gmail.com"},"message":"Make some fields in ThreadPool readonly\n\nAlso remove unused usings","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/e1ef4b892f95141e9d27716f46eeb494c1a078f8"},{"sha":"9f6a0b675e5ac0065a268554de49162c539ff66d","author":{"name":"dasMulli","email":"9eaa5943b3cf37c91cc0f68ece8ff609030d7ec9@gmail.com"},"message":"#1919 improvment for System.Random: use a static Random instance to seed ThreadStatic Random instances that generate seeds for newly created Random instances.","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/9f6a0b675e5ac0065a268554de49162c539ff66d"},{"sha":"775a5c4de092b17e9a35d62cf7d8523b493d58c5","author":{"name":"wtgodbe","email":"611ff99f5d2a92be2d58e9b34ea84b70033997d8@microsoft.com"},"message":"Use packages.builds when generating nuget packages","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/775a5c4de092b17e9a35d62cf7d8523b493d58c5"},{"sha":"5e0d476c6996216a2d9991fe7d31bff293020061","author":{"name":"Jonghyun Park","email":"8597e43723f6fb7eb642f8222d1eb6622ca38829@gmail.com"},"message":"Revises isSingleFloat32Struct\n\nisSingleFloat32Struct currently stops when the current handle is not a\nvalue class handle, or it has more than one field.\n\nIf not, it proceeds to the next step with the assumption that the current.\n\nUnfortunately, if the current handle is not a value class, but has one\nfield (somehow), getFieldInClass call raises an assertion failure\ndiscussed in #6569.\n\nThis commit tries to fix this invalid terminating condition.","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/5e0d476c6996216a2d9991fe7d31bff293020061"},{"sha":"3e10b7622f5c7f80eab018e085b1328e35038fc7","author":{"name":"Rama Krishnan Raghupathy","email":"deeda59e4f3310199c098678019045fba65d5821@microsoft.com"},"message":"Enable Building Libraries for ilproj","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/3e10b7622f5c7f80eab018e085b1328e35038fc7"},{"sha":"f7d8a4a7dbd9ce5b2981d7c9632ac108b2dcef93","author":{"name":"Pat Gavlin","email":"31abb87c1630f1a235ae3e5824500fcc02bda71b@microsoft.com"},"message":"Implement indirect VSD calls for x86.\n\nIndirect VSD calls on x86 require not only that the address of the\nVSD indirection cell is passed to the stub in EAX, but also that the\ncall instruction is\na) preceeded by a 3-byte NOP, and\nb) exactly `call [eax]`.\n\nOn x64, these types of calls only require that the indirection cell\naddress is passed in R11 (i.e. they do not require the generation of\na specific call instruction encoding). The RyuJIT IR is therefore\nable to represent such calls succinctly as something like:\n\n    t72 =    lclVar    ref    V04 loc1         u:3 (last use) $240\n\n           /--*  t72    ref\n    t295 = *  putarg_reg ref\n\n    t202 =    lclVar    long   V09 tmp4         u:4 $382\n\n           /--*  t202   long\n    t296 = *  putarg_reg long\n\n    t106 =    lclVar    long   V09 tmp4         u:4 (last use) $382\n\n           /--*  t106   long\n    t297 = *  indir     long\n\n           /--*  t295   ref    this in rcx\n           +--*  t296   long   arg1 in r11\n           +--*  t297   long   calli tgt\n    t107 = *  call ind stub ref    $24a\n\nIn this form, the address of the indirection cell is in the lclVar\n`tmp4`, which is then used by both a `putarg_reg` to move the\nargument into R11 and by the indirection that generates the call\ntarget. Because there are a relatively large number of registers on\nx64, this works out nicely: the address of the indirection cell is\nfrequently allocated to R11, few extraneous copies are required,\nand the code generator produces `call [r11]` for the call instruction.\n\nUnfortunately, the situation is not so straightforward on x86: not\nonly must code generator must both pass the address of the indirection\ncell in EAX and produce the specific call form mentioned earlier,\nbut there are also far fewer available registers. As a result, the\naddress of the indirection cell is infrequently allocated to EAX and\n(barring an implicit understanding in the code generator that a\nprevious putarg_reg has placed the address of the indirection cell\ninto EAX) requires a redundant `mov eax, ...` before the call.\n\nIdeally, we would be able to store the address of the indirection cell\nto a local with a very short lifetime and pre-allocate that local to\nEAX, but the IR does not have that capability, and adding it now\nseems to be prohibitively expensive. Instead, this change omits the\n`putarg_reg` used to put the the indirection cell address into the\nrequired register on other platforms and simply uses the `calli tgt`\noperand to the call to represent both the non-standard argument and\nthe call target:\n\n    t40 =    lclVar    ref    V04 loc1         u:3 $1c0\n\n           /--*  t40    ref\n    t280 = *  putarg_reg ref\n\n    t70 =    lclVar    int    V06 loc3         u:4 (last use) $2c1\n\n           /--*  t70    int\n    t281 = *  indir     int\n\n           /--*  t280   ref    this in ecx\n           +--*  t281   int    calli tgt\n    t71 = *  call ind stub ref    $1c6\n\nLowering then marks the indirection as contained and sets the\ndestination candidates for its operand to EAX.","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/f7d8a4a7dbd9ce5b2981d7c9632ac108b2dcef93"},{"sha":"2bb7e9ae5d7e991ec37345ef4befce738fa5996d","author":{"name":"Pat Gavlin","email":"31abb87c1630f1a235ae3e5824500fcc02bda71b@microsoft.com"},"message":"Address PR feedback.","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/2bb7e9ae5d7e991ec37345ef4befce738fa5996d"},{"sha":"275221738920f4c70ff8af13d25c24ce50dcc187","author":{"name":"Rama Krishnan Raghupathy","email":"deeda59e4f3310199c098678019045fba65d5821@microsoft.com"},"message":"Exposing RunModuleConstructor in mscorlib","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/275221738920f4c70ff8af13d25c24ce50dcc187"},{"sha":"76d11caf74540017e6d5106ddb5d01031d10abd5","author":{"name":"Rama Krishnan Raghupathy","email":"deeda59e4f3310199c098678019045fba65d5821@microsoft.com"},"message":"Exposing ExecuteCodeWithGuaranteedCleanup in mscorlib","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/76d11caf74540017e6d5106ddb5d01031d10abd5"},{"sha":"561ce4a5324c5f388bcc7ed32ad8418ec3e5453b","author":{"name":"Rama Krishnan Raghupathy","email":"deeda59e4f3310199c098678019045fba65d5821@microsoft.com"},"message":"Exposing Remaining CompilerServices Apis in mscorlib","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/561ce4a5324c5f388bcc7ed32ad8418ec3e5453b"},{"sha":"ee5111494705036e725ed155c53567da2d40d33b","author":{"name":"Rama Krishnan Raghupathy","email":"deeda59e4f3310199c098678019045fba65d5821@microsoft.com"},"message":"Exposing IUnknownConstantAttribute","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/ee5111494705036e725ed155c53567da2d40d33b"},{"sha":"e7ece6191343268042ca0af8d2df512cbfea771c","author":{"name":"Swaroop Sridhar","email":"eea2d22fbfe1bf8335180caf4ecb0532015313f2@microsoft.com"},"message":"X86 GcEncode: Support V1 and V2 encodings\n\nThe RYU+LegacyBackend Desktop JIT for X86 is still on V1.\nSo, permit both V1 and V2 encodings in gcencode.cpp.","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/e7ece6191343268042ca0af8d2df512cbfea771c"},{"sha":"0188c07e524986bd6f8587e57f37f97e3143bb0e","author":{"name":"Pat Gavlin","email":"31abb87c1630f1a235ae3e5824500fcc02bda71b@microsoft.com"},"message":"Mark GT_IND nodes that represent VSD targets.\n\nThe operand to such a node must be materialized into a register on\ncertain platforms. This change defines a new IND-specific flag,\nGTF_IND_VSD_TGT, and uses that flag to indicate that a particular\nGT_IND node represents a VSD target. This flag is then observed by\nlowering on the necessary platforms in order to short circuit the\nlogic that attempts to make the GT_IND's operand contained.","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/0188c07e524986bd6f8587e57f37f97e3143bb0e"},{"sha":"217ba4dbe16d17d8174e8edb24134abd36bc0a3c","author":{"name":"Swaroop Sridhar","email":"88916428d870a70abe71b6d23d93de54f4abff59@microsoft.com"},"message":"Merge pull request #7237 from swaroop-sridhar/gc86legacy\n\nX86 GcEncode: Support V1 and V2 encodings","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/217ba4dbe16d17d8174e8edb24134abd36bc0a3c"},{"sha":"88e230b20d6c784a5f2d28150815f0647e94cbdf","author":{"name":"Dan Moseley","email":"314ca31c7f7acdb21fe10555d43d256496618c0f@microsoft.com"},"message":"Fill out SecurityException with stubs (#7250)","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/88e230b20d6c784a5f2d28150815f0647e94cbdf"},{"sha":"c4fcfff56c826813fe04daae2ae73104859b9352","author":{"name":"Dan Moseley","email":"314ca31c7f7acdb21fe10555d43d256496618c0f@microsoft.com"},"message":"Expose missing public field on Debugger (#7258)","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/c4fcfff56c826813fe04daae2ae73104859b9352"},{"sha":"9e75337a08253a92154c40349dd6860e4f39faba","author":{"name":"Pat Gavlin","email":"31abb87c1630f1a235ae3e5824500fcc02bda71b@microsoft.com"},"message":"Fix a bug in LIR::Use::ReplaceWith.","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/9e75337a08253a92154c40349dd6860e4f39faba"},{"sha":"30e6ae225a113d2e286dbd868bba38c786bf141b","author":{"name":"Peter Kukol","email":"05ae5b86ee23b2195dbe190cc4376f337d68f3cc@users.noreply.github.com"},"message":"Add option for showing GT_xxx operator counts. (#7262)","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/30e6ae225a113d2e286dbd868bba38c786bf141b"},{"sha":"573cbeb2c0a729168147cb7e61f47fa40bd60b55","author":{"name":"Pat Gavlin","email":"324147c0e7e65f4285291b25db1c19ffc72308a9@gmail.com"},"message":"Merge pull request #7232 from pgavlin/gh4186\n\nImplement indirect VSD calls for x86.","distinct":true,"url":"https://api.github.com/repos/bbowyersmyth/coreclr/commits/573cbeb2c0a729168147cb7e61f47fa40bd60b55"}]}
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