{"push_id":1281609931,"size":13,"distinct_size":13,"ref":"refs/heads/linaro/integration-linux-qcomlt","head":"5032a97da072718cb178b0c91ac1ea95485bfe02","before":"f087de3b22f8c2c2ac4324822c652052ef693190","commits":[{"sha":"7c1a74ff55b1aafc3bbcd835ab20529e795d21cf","author":{"name":"Rajendra Nayak","email":"777371a40719d8c99c61066c05352d1d0a4b1654@codeaurora.org"},"message":"arm64: dts: msm8916: Add cpu cooling maps\n\nAdd cpu cooling maps for cpu passive trip points. The cpu cooling\ndevice states are mapped to cpufreq based scaling frequencies.\n\nSigned-off-by: Rajendra Nayak <rnayak@codeaurora.org>\nSigned-off-by: Georgi Djakov <georgi.djakov@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/7c1a74ff55b1aafc3bbcd835ab20529e795d21cf"},{"sha":"873879e7046469bf31878f866c67479e9b748254","author":{"name":"Georgi Djakov","email":"790bec011416ec115c296c937c559be12b06b260@linaro.org"},"message":"PM / OPP: Update the voltage tolerance when adjusting the OPP\n\nWhen the voltage is adjusted, the voltage tolerance is not updated.\nThis can lead to situations where the voltage min value is greater\nthan the voltage max value. The final result is triggering a BUG()\nin the regulator core.\nFix this by updating the voltage tolerance values too.\n\nSigned-off-by: Georgi Djakov <georgi.djakov@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/873879e7046469bf31878f866c67479e9b748254"},{"sha":"bc8aa767b3a0c659ea87ce9444ad26cca1dbdc98","author":{"name":"Mitchel Humpherys","email":"a3e4c84cb252737c1b2794202b0e88ea5df4dffa@codeaurora.org"},"message":"iommu/arm-smmu: make a mismatch in CBs and CB interrupts non-fatal\n\nWhen running under a hypervisor, the number of context banks visible to\nLinux could be different from what we see when running standalone.  This\nis problematic since the context bank interrupts are hard-coded into the\nDT configuration, and we'd like to share that configuration whether\nwe're running under a hypervisor or not.  Remove a warning when a\nmismatch in the number of CBs and CB interrupts is detected and don't\nreturn failure while probing.\n\nChange-Id: I9271e4e04ecafe61f4bb12d1e1148cb2bcec2439\nSigned-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/bc8aa767b3a0c659ea87ce9444ad26cca1dbdc98"},{"sha":"d9272e5f111b4fd1a219f01b629e0f342b079893","author":{"name":"Srinivas Kandagatla","email":"7f9cdec4a0a119d47fe94fb78e36a3b49e14815b@linaro.org"},"message":"WIP: phy: msm8996: add support msm8996 pcie phy.\n\nSigned-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/d9272e5f111b4fd1a219f01b629e0f342b079893"},{"sha":"9831dddcc72260f95748ad7430718e9ae240b5ee","author":{"name":"Srinivas Kandagatla","email":"7f9cdec4a0a119d47fe94fb78e36a3b49e14815b@linaro.org"},"message":"WIP: pcie: qcom: add support to msm8996\n\nSigned-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/9831dddcc72260f95748ad7430718e9ae240b5ee"},{"sha":"1b4ecdb60a2e3492d00d68da6296504e57cb3188","author":{"name":"Srinivas Kandagatla","email":"7f9cdec4a0a119d47fe94fb78e36a3b49e14815b@linaro.org"},"message":"arm64: dts: msm8996: add support to anoc0 smmu\n\nSigned-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/1b4ecdb60a2e3492d00d68da6296504e57cb3188"},{"sha":"99d33c5b7b7a6a87799ff47723d82752beaaba73","author":{"name":"Srinivas Kandagatla","email":"7f9cdec4a0a119d47fe94fb78e36a3b49e14815b@linaro.org"},"message":"arm64: dts: msm8996: add support to 3 pcie root complex\n\nSigned-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/99d33c5b7b7a6a87799ff47723d82752beaaba73"},{"sha":"5a9cf0f15b6cf2c9f88bcad9f6db521337bbc7de","author":{"name":"Srinivas Kandagatla","email":"7f9cdec4a0a119d47fe94fb78e36a3b49e14815b@linaro.org"},"message":"arm64: dts: db820c: enable pcie\n\nSigned-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/5a9cf0f15b6cf2c9f88bcad9f6db521337bbc7de"},{"sha":"fb0489025045e5c72c0638aa903367b301b22fca","author":{"name":"Srinivas Kandagatla","email":"7f9cdec4a0a119d47fe94fb78e36a3b49e14815b@linaro.org"},"message":"defconfig: enable msm8996 pcie phy\n\nSigned-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/fb0489025045e5c72c0638aa903367b301b22fca"},{"sha":"c3d29c2cc7f494d276a7f6a76bdabb79c91d6ab1","author":{"name":"Srinivas Kandagatla","email":"7f9cdec4a0a119d47fe94fb78e36a3b49e14815b@linaro.org"},"message":"clk: qcom: select GDSC for msm8996 gcc and mmcc\n\nThis patch selects QCOM_GDSC Kconfig for msm8996 GCC and MMCC clock\ncontrollers, as these provide some of the gdscs on the SOC.\n\nAlso selecting this config will make it align with other drivers which\ndo the same.\n\nSigned-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/c3d29c2cc7f494d276a7f6a76bdabb79c91d6ab1"},{"sha":"41bc00b54deaa37d03cfd11006e747ec7d18ff13","author":{"name":"Srinivas Kandagatla","email":"7f9cdec4a0a119d47fe94fb78e36a3b49e14815b@linaro.org"},"message":"clk: gcc-msm8996: Fix pcie 2 pipe register offset\n\nThis patch corrects the register offset for pcie2 pipe clock.\nOffset according to datasheet is 0x6e018 instead of 0x6e108.\n\nSigned-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/41bc00b54deaa37d03cfd11006e747ec7d18ff13"},{"sha":"b429090b73df5d2d9cbead5f6c914d46acca0a2d","author":{"name":"Srinivas Kandagatla","email":"7f9cdec4a0a119d47fe94fb78e36a3b49e14815b@linaro.org"},"message":"clk: gcc-msm8996: add missing pcie phy reset lines\n\nThis patch adds missing 2 PCIE common reset lines.\n\nSigned-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/b429090b73df5d2d9cbead5f6c914d46acca0a2d"},{"sha":"5032a97da072718cb178b0c91ac1ea95485bfe02","author":{"name":"Srinivas Kandagatla","email":"7f9cdec4a0a119d47fe94fb78e36a3b49e14815b@linaro.org"},"message":"arm64: defconfig: enable atl1c support\n\nSigned-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>","distinct":true,"url":"https://api.github.com/repos/mifl/android_kernel_qcom_msm/commits/5032a97da072718cb178b0c91ac1ea95485bfe02"}]}
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