{"action":"created","issue":{"url":"https://api.github.com/repos/paul99/v8m-rb/issues/13","labels_url":"https://api.github.com/repos/paul99/v8m-rb/issues/13/labels{/name}","comments_url":"https://api.github.com/repos/paul99/v8m-rb/issues/13/comments","events_url":"https://api.github.com/repos/paul99/v8m-rb/issues/13/events","html_url":"https://github.com/paul99/v8m-rb/issues/13","id":4261090,"number":13,"title":"FInd a way to load large immediates in one instruction","user":{"login":"kalmard","id":1274943,"avatar_url":"https://avatars.githubusercontent.com/u/1274943?v=3","gravatar_id":"","url":"https://api.github.com/users/kalmard","html_url":"https://github.com/kalmard","followers_url":"https://api.github.com/users/kalmard/followers","following_url":"https://api.github.com/users/kalmard/following{/other_user}","gists_url":"https://api.github.com/users/kalmard/gists{/gist_id}","starred_url":"https://api.github.com/users/kalmard/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/kalmard/subscriptions","organizations_url":"https://api.github.com/users/kalmard/orgs","repos_url":"https://api.github.com/users/kalmard/repos","events_url":"https://api.github.com/users/kalmard/events{/privacy}","received_events_url":"https://api.github.com/users/kalmard/received_events","type":"User","site_admin":false},"labels":[{"url":"https://api.github.com/repos/paul99/v8m-rb/labels/improvement%20idea","name":"improvement idea","color":"ededed"}],"state":"open","locked":false,"assignee":null,"milestone":null,"comments":3,"created_at":"2012-04-24T14:48:16Z","updated_at":"2016-01-18T22:02:03Z","closed_at":null,"body":"Running a crude simulator test reveals that a major portion of executed code (10-15% in debug mode) is lui+ori.\r\n\r\nWhile this may prove to be a lot of work, the speed benefits may be worth it. Here are a few ideas:\r\n\r\n1. using the root array or a similar, MIPS-only array to hold our constants\r\n2. using a const pool like on ARM, per-function or per-assembler, loading its address at the beginning and storing it in a dedicated register\r\n\r\nA few things to remember:\r\nThis only affects constants that don't fit into any instruction's 16 bit immediate slot, but this includes all pointers.\r\nt9 is used very often to hold function addresses. If handled carefully, it could be used as a per-function global pointer.\r\ns0-s7 are mostly unutilized in MIPS code, aren't they?\r\nConstant values can be re-used unless marked specially (RelocInfo, code patching), but linear search on a large array may consume too much time (not an issue when generating snapshot).\r\nThe GC has to be updated for any of the solutions. However since MIPS is so unique, the GC is already very flexible.\r\nThe serializer has to be updated as well.\r\nConstant patching (especially from genearated code) has to be updated.\r\nlw can take a negative immediate (offset) as well, so the array could be indexed from the middle.\r\n\r\nI'm not sure about this, but I remember reading that on some MIPS CPUs using the register loaded (via lw) in the previous instruction stalls the pipeline, so maybe there would be absolutely no benefit from this."},"comment":{"url":"https://api.github.com/repos/paul99/v8m-rb/issues/comments/172666191","html_url":"https://github.com/paul99/v8m-rb/issues/13#issuecomment-172666191","issue_url":"https://api.github.com/repos/paul99/v8m-rb/issues/13","id":172666191,"user":{"login":"paul99","id":131475,"avatar_url":"https://avatars.githubusercontent.com/u/131475?v=3","gravatar_id":"","url":"https://api.github.com/users/paul99","html_url":"https://github.com/paul99","followers_url":"https://api.github.com/users/paul99/followers","following_url":"https://api.github.com/users/paul99/following{/other_user}","gists_url":"https://api.github.com/users/paul99/gists{/gist_id}","starred_url":"https://api.github.com/users/paul99/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/paul99/subscriptions","organizations_url":"https://api.github.com/users/paul99/orgs","repos_url":"https://api.github.com/users/paul99/repos","events_url":"https://api.github.com/users/paul99/events{/privacy}","received_events_url":"https://api.github.com/users/paul99/received_events","type":"User","site_admin":false},"created_at":"2016-01-18T22:02:03Z","updated_at":"2016-01-18T22:02:03Z","body":"I will leave this open for consideration. I think it's not too likely to help for the reasons stated above. \r\n\r\nHowever, both ARM & PPC implement out-of-line const pool now, and I have not looked into its applicability for MIPS. r6 instruction set also has some pc-relative load instructions which could help with the traditional in-line constant pool."}}