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The script was heavy enough to cause\nsubstantial overhead. Just bypassing it (by using the real\ncpuid_tool binary) reduced \"make test\" running time from 4.1 to 0.7s\non my machine.\n\nIt is a bit hacky, though, so \"make test-old\" is retained, which\nuses the old invocation.","distinct":true,"url":"https://api.github.com/repos/X0rg/libcpuid/commits/d95421366716d0f5f3857d3b5551943492b5482b"},{"sha":"281d4720d41cf5c6ba5590a932c342946628b010","author":{"email":"2124a3c28b0b7138ec789fcdd8fce282e8728a85@gmail.com","name":"Veselin Georgiev"},"message":"Fix issue #28: Windows Build error\n\nmsrdriver.c was forgotten from Makefile.am, under the assumption that\nautotools are used under *nix only. This is not true, as one could use\nMinGW or cygwin.","distinct":true,"url":"https://api.github.com/repos/X0rg/libcpuid/commits/281d4720d41cf5c6ba5590a932c342946628b010"},{"sha":"13f382725bb0e938d2ccb239cfe01f21614e3762","author":{"email":"2124a3c28b0b7138ec789fcdd8fce282e8728a85@gmail.com","name":"Veselin Georgiev"},"message":"Fix 'make test' failing without any really wrong tests.\n\nThe reason was that the invocation of the cpuid_tool through the makefile\nwas using LD_LIBRARY_PATH=. to force link&use of the latest-build libcpuid\nlibrary. This doesn't seem to work, so using LD_PRELOAD to explicitly load\nlibcpuid.so into cpuid_tool.\n\nThe committed approach of course doesn't work on Mac OS X, where\nmake test-old should be used.","distinct":true,"url":"https://api.github.com/repos/X0rg/libcpuid/commits/13f382725bb0e938d2ccb239cfe01f21614e3762"},{"sha":"0dc6edf925213506f2448f2cb5057f01765237e8","author":{"email":"e0d41a236ab21f7b0d1a114f415dbc42393a50d9@gmail.com","name":"wdlkmpx"},"message":"Pentium D: more precise descriptions\n\nBasically:\nModel = 4 -> Smithfield\nModel = 6 -> Presler\n\nDownload this 16 cpu-z screenshots to verify (1.5mb):\nhttp://s000.tinyupload.com/index.php?file_id=54246820652929080678","distinct":true,"url":"https://api.github.com/repos/X0rg/libcpuid/commits/0dc6edf925213506f2448f2cb5057f01765237e8"},{"sha":"5f420362c6e16bb2fd6247ac32ba973ffc7d37c9","author":{"email":"e0d41a236ab21f7b0d1a114f415dbc42393a50d9@gmail.com","name":"wdlkmpx"},"message":"P4 Celeron: more precise descriptions\n\nAccording to wikipedia, cpu-world and some cpu-z screenshots, these processors\ndo have a code name and it's willamette, northwood, prescott or cedar mill\n\nSigned-off-by: Veselin Georgiev <anrieff@gmail.com>","distinct":true,"url":"https://api.github.com/repos/X0rg/libcpuid/commits/5f420362c6e16bb2fd6247ac32ba973ffc7d37c9"},{"sha":"d46ca6eacd276aabc3b55c4aff5b11e9457a64dc","author":{"email":"2124a3c28b0b7138ec789fcdd8fce282e8728a85@gmail.com","name":"Veselin Georgiev"},"message":"Merge pull request #30 from wdlkmpx/master\n\nPentium D: more precise descriptions","distinct":true,"url":"https://api.github.com/repos/X0rg/libcpuid/commits/d46ca6eacd276aabc3b55c4aff5b11e9457a64dc"},{"sha":"b8fe2a57cfb7313478a60c7d3dbbce1d951af400","author":{"email":"2124a3c28b0b7138ec789fcdd8fce282e8728a85@gmail.com","name":"Veselin Georgiev"},"message":"Update Readme.md with details about testing.","distinct":true,"url":"https://api.github.com/repos/X0rg/libcpuid/commits/b8fe2a57cfb7313478a60c7d3dbbce1d951af400"},{"sha":"eb6f1a2b9abb61b8425b043805f7459dfd5ed449","author":{"email":"e0d41a236ab21f7b0d1a114f415dbc42393a50d9@gmail.com","name":"wdlkmpx"},"message":"More precise descriptions for some old processors\n\nPII Celeron:\nModel 5 = Celeron Covington = PII Deschutes\nModel 6 = Celeron Mendocino = PII Dixon\n\nPII Xeon:\nModel 3 = Xeon ???? = PII Xeon (Klamath)\nModel 5 = Xeon Drake = PII Deschutes\nModel 6 = Xeon ???? = PII Xeon (Dixon)\n\nPIII Celeron:\nPIII Celeron (XX) = PIII (XX)\n\nPIII Xeon:\nModel 7 = Xeon Tanner = PIII Katmai\nModel 8,10 = Xeon Cascades = PIII Coppermine\nModel 11 = Xeon ??? = PIII Xeon (Tualatin)\n\nSigned-off-by: Veselin Georgiev <anrieff@gmail.com>","distinct":true,"url":"https://api.github.com/repos/X0rg/libcpuid/commits/eb6f1a2b9abb61b8425b043805f7459dfd5ed449"},{"sha":"6ea1d4c8e2405ee422a85d052f2ab7bbb3ec4c48","author":{"email":"bb87b47479d83cec3c76132206933257ded727b2@x64architecture.com","name":"Kurt Cancemi"},"message":"Fix PCLMULQDQ, SSE4.1, MOVBE and RDRAND detection on AMD processors","distinct":true,"url":"https://api.github.com/repos/X0rg/libcpuid/commits/6ea1d4c8e2405ee422a85d052f2ab7bbb3ec4c48"}]}