{"push_id":1097418466,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"0c744b02a4fd83297a164f19704bcc2b9ebf0349","before":"4449a75f8556234dce815a219adfad293faf2f31","commits":[{"sha":"0c744b02a4fd83297a164f19704bcc2b9ebf0349","author":{"email":"af4b1a06dcc93e086b35435d5654eb2aff59399a@redking.me.uk","name":"Simon Pilgrim"},"message":"[SelectionDAG] BITREVERSE vector legalization of bit operations (REAPPLIED)\n\nSome vector bit operations are promoted instead of having custom lowering. This patch changes the isOperationLegalOrCustom tests for vector AND/OR operations to use a new TLI helper isOperationLegalOrCustomOrPromote instead, allowing the SSE implementations to stay on the simd unit.\n\nDifferential Revision: http://reviews.llvm.org/D19805\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268561 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm/commits/0c744b02a4fd83297a164f19704bcc2b9ebf0349"}]}