{"push_id":1440752089,"size":37,"distinct_size":37,"ref":"refs/heads/rpb-1612","head":"ac88efa3c94dba480421611c04127f1d9f2eead2","before":"fe3449a7b43f22269c64bc1d8bb7da792e177ae5","commits":[{"sha":"c5945099daca6147d7d900d6236ef32ef4e7e5de","author":{"name":"Heyi Guo","email":"dee3ef6add7db35f34930b890d1c41755f561e57@linaro.org"},"message":"Platforms/Hisilicon: add D05 platform modules and files\n\nD05 is a new Hisilicon reference hardware platform, which is a dual\nsocket SMP system and has 32 cores on each socket.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Heyi Guo <heyi.guo@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/c5945099daca6147d7d900d6236ef32ef4e7e5de"},{"sha":"ee81b511d2aa6f2b2486ca4fbfdde0dc49b6e2da","author":{"name":"Peicong Li","email":"99076b4817eab5cf8719fc74e5350e5771a37a80@huawei.com"},"message":"D03/D05: Change to access EEPROM data by checking page boundary\n\nWe would get incorrect data when accessing multiple bytes at one time\nand going across EEPROM page boundary, so we split data when the length\ngreater than page boundary.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Peicong Li <lipeicong@huawei.com>\nSigned-off-by: Heyi Guo <heyi.guo@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/ee81b511d2aa6f2b2486ca4fbfdde0dc49b6e2da"},{"sha":"c89f58fad85ebe159a9b24d734ee82dd63cbbba6","author":{"name":"Heyi Guo","email":"dee3ef6add7db35f34930b890d1c41755f561e57@linaro.org"},"message":"Hisilicon: fix FirmwareVendor pcd\n\nThe default FirmwareVender pcd is defined at\nChips/Hisilicon/Hisipkg.dec,and the value is 'Huawei corp.',\nso the FirmwareVendor pcd at the dsc file useless, remove them.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Heyi Guo <heyi.guo@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/c89f58fad85ebe159a9b24d734ee82dd63cbbba6"},{"sha":"8c8ae4bf1307bd43035bc8d927fc6597833221ba","author":{"name":"Heyi Guo","email":"dee3ef6add7db35f34930b890d1c41755f561e57@linaro.org"},"message":"Hisilicon/D02: enlarge FVMAIN_COMPACT\n\nThe original size of FVMAIN_COMPACT is not enough for clang DEBUG\nversion, so we enlarge FVMAIN_COMPACT and move variable store and\nTrusted Firmware binaries accordingly\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Heyi Guo <heyi.guo@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/8c8ae4bf1307bd43035bc8d927fc6597833221ba"},{"sha":"455240d1a2193920eecb72cc9040155df92fe14e","author":{"name":"Heyi Guo","email":"dee3ef6add7db35f34930b890d1c41755f561e57@linaro.org"},"message":"Hisilicon/D02: update ATF binaries to fix a bug in ATF code\n\nThe `psci_plat_pm_ops` global pointer is initialized during cold boot\nby the primary CPU and will be accessed by the secondary CPUs before\nenabling data cache during warm boot. This patch adds a missing data\ncache flush of `psci_plat_psci_ops` after initialization during psci_setup()\nso that secondaries can see the updated `psci_plat_psci_ops` pointer.\nFixes ARM-software/tf-issues#424\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Heyi Guo <heyi.guo@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/455240d1a2193920eecb72cc9040155df92fe14e"},{"sha":"ac920ecff4f923cfc89cd1bc082169674033fd9e","author":{"name":"Heyi Guo","email":"dee3ef6add7db35f34930b890d1c41755f561e57@linaro.org"},"message":"Hisilicon/D03: enlarge FVMAIN_COMPACT\n\nThe original size of FVMAIN_COMPACT is not enough for clang DEBUG\nversion, so we enlarge FVMAIN_COMPACT and move Trusted Firmware\nbinaries accordingly.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Heyi Guo <heyi.guo@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/ac920ecff4f923cfc89cd1bc082169674033fd9e"},{"sha":"47e8677ba5f6ee9eb5a78f3b3e2b452e1beb3aa6","author":{"name":"Heyi Guo","email":"dee3ef6add7db35f34930b890d1c41755f561e57@linaro.org"},"message":"Platforms/D03: Update binaries\n\nUpdate D03 binaries fix below issues:\n\n1. Update ebl.efi to solve can not get IP address through DHCP\n2. Update D03 binaries to adapt new D03 board,\n   this include LpcLib,LpcSerialPortLib and Ipmi related lib,\n   and the Lpc hardware is different to old D03 board.\n3. Update Snp net driver,inlcude some code refine modification.\n4. Update SerdesLib for structure and function definition changes\n5. Update ATF binaries to fix a bug in ATF code\n   The `psci_plat_pm_ops` global pointer is initialized during\n   cold boot by the primary CPU and will be accessed by the secondary\n   CPUs before enabling data cache during warm boot. This patch adds\n   a missing data cache flush of `psci_plat_psci_ops` after initialization\n   during psci_setup() so that secondaries can see the updated\n   `psci_plat_psci_ops` pointer.\n   Fixes ARM-software/tf-issues#424\n6. Update ReportPciePlugDidVidToBmc.efi to fix a wrong pci slot num issue.\n7. Update NativeOhci and SfcDriver.efi for structure definition changes.\n8. Update Sm750 driver for code refine modification.\n9. Update OemaddressMap2P.lib to adapt new address allocation.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Chenhui Sun <sunchenhui@huawei.com>\nSigned-off-by: Heyi Guo <heyi.guo@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/47e8677ba5f6ee9eb5a78f3b3e2b452e1beb3aa6"},{"sha":"4c726fdccc314ea97b9c1d3c718398e3fabe8860","author":{"name":"Heyi Guo","email":"dee3ef6add7db35f34930b890d1c41755f561e57@linaro.org"},"message":"D02/D03/D05: Support Spd mirror mode\n\nAdd Spd mirror mode related registers definition,\nthis is used by memoryinit binary code,base this definition\nit could support spd mirror mode to have diffrent configuration\nabout MR register.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Heyi Guo <heyi.guo@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/4c726fdccc314ea97b9c1d3c718398e3fabe8860"},{"sha":"87ab8475dc52ef7d31439dd792afa2e8a5a726c7","author":{"name":"Kejian Yan","email":"975e99428ac19146c39f2d90285e260c5f747003@huawei.com"},"message":"D02/D03/Dsdt: add media-type property for hns\n\nIt is PORT_TP type if the service port is GE mode. It is wrong to\njudge the port type by using if it is service port. Adding the media\ntype to know port type.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Kejian Yan <yankejian@huawei.com>\nReviewed-by: Graeme Gregory <graeme.gregory@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/87ab8475dc52ef7d31439dd792afa2e8a5a726c7"},{"sha":"c1ecb9845ce52e6588d6148515a3386920472cf7","author":{"name":"Kejian Yan","email":"975e99428ac19146c39f2d90285e260c5f747003@huawei.com"},"message":"D02/D03/Dsdt/hns: fix the bug of serdes loopback\n\nThe register of Hilink needs to be configed, but the current procedure\ndoes not do that. The temporary variable to be set to register is wrong,\nit must be Local0 instead of Local1.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Kejian Yan <yankejian@huawei.com>\nReviewed-by: Graeme Gregory <graeme.gregory@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/c1ecb9845ce52e6588d6148515a3386920472cf7"},{"sha":"19f24851b359fc492865a508d5fc1db6898a18cc","author":{"name":"Chenhui Sun","email":"c4f79023342effaaa7c83b6f3e031882dbefc8e8@huawei.com"},"message":"D02/ACPI: Use HISI0031 HID for uart on Hip05 soc\n\nThe UART on Hip05 soc is not 16550 compatible, use appropriate ACPI ID\nfor Hisi uart instead of APM one, and delete the wrong comments.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>\nReviewed-by: Graeme Gregory <graeme.gregory@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/19f24851b359fc492865a508d5fc1db6898a18cc"},{"sha":"59b92811b1dc5782a04e74f3ef342be2bccbbfee","author":{"name":"Chenhui Sun","email":"c4f79023342effaaa7c83b6f3e031882dbefc8e8@huawei.com"},"message":"Platform/D02: Update ACPI table header\n\nSet all ACPI tables' ID as below:\n\nEFI_ACPI_ARM_OEM_ID           HISI\nEFI_ACPI_ARM_OEM_TABLE_ID     HISI0660\nEFI_ACPI_ARM_OEM_REVISION     0x00000000\nEFI_ACPI_ARM_CREATOR_ID       INTL\nEFI_ACPI_ARM_CREATOR_REVISION 0x20151124\n\nNote that D02 SATASSDT/SASSSDT tables are not updated because we need\ndifferent SSDT OEM TABLE ID uesed for UninstallACPI driver\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Chenhui Sun <sunchenhui@huawei.com>\nSigned-off-by: Heyi Guo <heyi.guo@linaro.org>\nReviewed-by: Graeme Gregory <graeme.gregory@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/59b92811b1dc5782a04e74f3ef342be2bccbbfee"},{"sha":"44e0f24b074e3f7aba7473219eab4e3ba5fb579a","author":{"name":"Heyi Guo","email":"dee3ef6add7db35f34930b890d1c41755f561e57@linaro.org"},"message":"Hisilicon: remove D02 unused ACPI files\n\nD02 ACPI related files locate in Chips/Hisilicon/Pv660/Pv660Acpitables\nD03 ACPI related files will be moved to\nChips/Hisilicon/Hi1610/Hi1610AcpiTables\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Heyi Guo <heyi.guo@linaro.org>\nReviewed-by: Leif Lindholm <Lefi.Lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/44e0f24b074e3f7aba7473219eab4e3ba5fb579a"},{"sha":"97b453ae6955225111d3bc91b5be420d178e335d","author":{"name":"Heyi Guo","email":"dee3ef6add7db35f34930b890d1c41755f561e57@linaro.org"},"message":"Hisilicon: Add D03 ACPI tables\n\nMove D03 ACPI tables from Hisilicon/Pv660/Pv660AcpiTables/\nto Hisilicon/Hi1610/Hi1610AcpiTables/\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Heyi Guo <heyi.guo@linaro.org>\nReviewed-by: Graeme Gregory <graeme.gregory@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/97b453ae6955225111d3bc91b5be420d178e335d"},{"sha":"c12b339489e8a95ed8b77932665c1c09013b47d7","author":{"name":"Hanjun Guo","email":"66721d26e0419686767117175ebfd656d10353ce@linaro.org"},"message":"D03/DSDT: use irq producer/consumer to support mbi-gen\n\nUse irq producer/consumer to represent the topology of device\nand mbi-gen:\n\nWe are using _PRS methd to indicate number of irq pins instead\n    of num_pins in DT.\n\n    For mbi-gen,\n        Device(MBI0) {\n              Name(_HID, \"HISI0152\")\n              Name(_UID, Zero)\n              Name(_CRS, ResourceTemplate() {\n                      Memory32Fixed(ReadWrite, 0xa0080000, 0x10000)\n              })\n\n              Name (_PRS, ResourceTemplate() {\n                  Interrupt(ResourceProducer,...) {12,14,....}\n              })\n        }\n\n    For devices,\n\n       Device(COM0) {\n              Name(_HID, \"ACPIIDxx\")\n              Name(_UID, Zero)\n              Name(_CRS, ResourceTemplate() {\n                     Memory32Fixed(ReadWrite, 0xb0030000, 0x10000)\n                 Interrupt(ResourceConsumer,..., \"\\_SB.MBI0\") {12}\n              })\n        }\n\nUpdate the DSDT as above.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Hanjun Guo <hanjun.guo@linaro.org>\nReviewed-by: Graeme Gregory <graeme.gregory@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/c12b339489e8a95ed8b77932665c1c09013b47d7"},{"sha":"f2b1c3ee0eac9fc9c20ef365820aadfeb9eb5744","author":{"name":"Salil Mehta","email":"a36d8d8b4efb4b644d8c36cf2210cf931fe41f08@huawei.com"},"message":"D03/ACPI: Add RoCE device to ACPI & IORT Tables\n\nThis patch adds the support of RoCE to the DSDT and IORT\nACPI Tables. Following are the changes:\n1. adds the support of a RoCE device to the HNS DSDT file.\n   RoCE DEVICE node properties added are:\n   * eth-handle\n   * dsaf-handle\n   * interrupt-parent\n   * interrupt-names\n2. Interrupt node\n3. Addition of MbiGen RoCE \"named-component\" node in the\n   IORT Table.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Salil Mehta <salil.mehta@huawei.com>\nReviewed-by: Graeme Gregory <graeme.gregory@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/f2b1c3ee0eac9fc9c20ef365820aadfeb9eb5744"},{"sha":"300c43d34745da88b18e224b15224e21d2c00a2a","author":{"name":"Salil Mehta","email":"a36d8d8b4efb4b644d8c36cf2210cf931fe41f08@huawei.com"},"message":"D03/ACPI: Add support of RoCE Reset in DSDT\n\nIn the Hip06 SoC, the RoCE Engine is part of the HiSilicon\nNetwork Subsystem and is dependent upon DSAF module. Therefore,\ncertain functions like RESET are exposed through the common\nregisters of HNS module which are memory-mapped by the HNS\ndriver and currently can only be accessed through DT/syscon\ninterface.\n\nThis patch adds the support of the RoCE Reset functionality\nthrough ACPI interface. This functionality would be exposed to\nthe HiSilicon HNS Driver using the _DSM() ACPI Method. This\nmethod shall be called by the wrapper API in HNS driver.\nFurther, HiSilicon RoCE driver shall call the HNS Driver\nexported RoCE Reset API.\n\nIn this patch, DSDT ACPI Table have been amended to facilitate\nsuch support.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Salil Mehta <salil.mehta@huawei.com>\nReviewed-by: Graeme Gregory <graeme.gregory@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/300c43d34745da88b18e224b15224e21d2c00a2a"},{"sha":"1681d211e485bece6ac5412fe071bc465eedf802","author":{"name":"Salil Mehta","email":"a36d8d8b4efb4b644d8c36cf2210cf931fe41f08@huawei.com"},"message":"D03/ACPI/ROCE: Add node-guid parameter to DSDT\n\nThis patch adds new \"node-guid\" parameter in ACPI DSDT Table.\nThis is required for RoCE CM(Conenction Mode) feature.\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Salil Mehta <salil.mehta@huawei.com>\nReviewed-by: Graeme Gregory <graeme.gregory@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/1681d211e485bece6ac5412fe071bc465eedf802"},{"sha":"ba15cff0769f23480c7426f33e2000831307e0d8","author":{"name":"Chenhui Sun","email":"c4f79023342effaaa7c83b6f3e031882dbefc8e8@huawei.com"},"message":"D03: Update ACPI Oem table header id\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Chenhui Sun <sunchenhui@huawei.com>\nReviewed-by: Graeme Gregory <graeme.gregory@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/ba15cff0769f23480c7426f33e2000831307e0d8"},{"sha":"c902495ce2bff162ece3422762b943936ed276d1","author":{"name":"Chenhui Sun","email":"c4f79023342effaaa7c83b6f3e031882dbefc8e8@huawei.com"},"message":"D02: Update ACPI table header id\n\nContributed-under: TianoCore Contribution Agreement 1.0\nSigned-off-by: Chenhui Sun <sunchenhui@huawei.com>\nReviewed-by: Graeme Gregory <graeme.gregory@linaro.org>\nReviewed-by: Leif Lindholm <leif.lindholm@linaro.org>","distinct":true,"url":"https://api.github.com/repos/Linaro/OpenPlatformPkg/commits/c902495ce2bff162ece3422762b943936ed276d1"}]}
{"actor":{"display_login":"rsalveti"}}