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Removing it should be okay so I think I'll go with that.","created_at":"2016-11-23T21:42:45Z","updated_at":"2016-11-23T21:42:45Z","html_url":"https://github.com/eclipse/omr/pull/525#discussion_r89403808","pull_request_url":"https://api.github.com/repos/eclipse/omr/pulls/525","_links":{"self":{"href":"https://api.github.com/repos/eclipse/omr/pulls/comments/89403808"},"html":{"href":"https://github.com/eclipse/omr/pull/525#discussion_r89403808"},"pull_request":{"href":"https://api.github.com/repos/eclipse/omr/pulls/525"}}},"pull_request":{"url":"https://api.github.com/repos/eclipse/omr/pulls/525","id":94901918,"html_url":"https://github.com/eclipse/omr/pull/525","diff_url":"https://github.com/eclipse/omr/pull/525.diff","patch_url":"https://github.com/eclipse/omr/pull/525.patch","issue_url":"https://api.github.com/repos/eclipse/omr/issues/525","number":525,"state":"open","locked":false,"title":"Add Vector support to Register Assigner on x","user":{"login":"IBMJimmyk","id":23103151,"avatar_url":"https://avatars.githubusercontent.com/u/23103151?v=3","gravatar_id":"","url":"https://api.github.com/users/IBMJimmyk","html_url":"https://github.com/IBMJimmyk","followers_url":"https://api.github.com/users/IBMJimmyk/followers","following_url":"https://api.github.com/users/IBMJimmyk/following{/other_user}","gists_url":"https://api.github.com/users/IBMJimmyk/gists{/gist_id}","starred_url":"https://api.github.com/users/IBMJimmyk/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/IBMJimmyk/subscriptions","organizations_url":"https://api.github.com/users/IBMJimmyk/orgs","repos_url":"https://api.github.com/users/IBMJimmyk/repos","events_url":"https://api.github.com/users/IBMJimmyk/events{/privacy}","received_events_url":"https://api.github.com/users/IBMJimmyk/received_events","type":"User","site_admin":false},"body":"Register Assigner on x now recognizes \"TR_VRF\" virtual register as\r\nbeing a vector register and will attempt to assign a XMM register to\r\nthem.\r\n\r\nCreated method isFPRUsedAsVFR. It checks if the processor supports SSE2\r\nand if so attempts to assign vector registers if the system has TR_FPR\r\nreal registers.\r\n\r\nCreated method getSupportsOpCodeForAutoSIMD. It is used to check which\r\nvector opcode are currently supported for autoSIMD. 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