{"push_id":1385489760,"size":3,"distinct_size":0,"ref":"refs/heads/caf/linaro/tracking-qcomlt-iommu","head":"3b03b9f27cf1c3217fdef58a7bd429c481432121","before":"03af3e07f0be2c1f76ea2677e5fd5714e4a35b5c","commits":[{"sha":"11b0862af76fe0f6ae0363f8bffb6b105db087be","author":{"name":"Mitchel Humpherys","email":"a3e4c84cb252737c1b2794202b0e88ea5df4dffa@codeaurora.org"},"message":"iommu/arm-smmu: make a mismatch in CBs and CB interrupts non-fatal\n\nWhen running under a hypervisor, the number of context banks visible to\nLinux could be different from what we see when running standalone.  This\nis problematic since the context bank interrupts are hard-coded into the\nDT configuration, and we'd like to share that configuration whether\nwe're running under a hypervisor or not.  Remove a warning when a\nmismatch in the number of CBs and CB interrupts is detected and don't\nreturn failure while probing.\n\nChange-Id: I9271e4e04ecafe61f4bb12d1e1148cb2bcec2439\nSigned-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.10/commits/11b0862af76fe0f6ae0363f8bffb6b105db087be"},{"sha":"bd47c4a2418dc82d53469f5c84510ebdfe30f2dd","author":{"name":"Rob Clark","email":"bee515ab85e0d040fcedc94c27e09c24df8e9bbd@gmail.com"},"message":"iommu/msm: resume device after fault\n\nWe need to disable stall on memory access after a fault, otherwise the\ndevice using the iommu will be perma-wedged with no access to memory.\nThis was causing drm/msm to be unable to recover the gpu after an iommu\nfault.\n\nSigned-off-by: Rob Clark <robdclark@gmail.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.10/commits/bd47c4a2418dc82d53469f5c84510ebdfe30f2dd"},{"sha":"3b03b9f27cf1c3217fdef58a7bd429c481432121","author":{"name":"Rob Clark","email":"bee515ab85e0d040fcedc94c27e09c24df8e9bbd@gmail.com"},"message":"iommu/msm: wire up fault handling\n\nWhen things go wrong on the gpu, we can get *thousands* of faults.  With\nso many pr_err() prints, which were slowing down resuming the iommu,\ndrm/msm would think the GPU had actually hung and reset it.\n\nWire up the fault reporting, so instead we get a small ratelimited print\nof the fault address from drm/msm's fault handler instead.\n\nSigned-off-by: Rob Clark <robdclark@gmail.com>","distinct":false,"url":"https://api.github.com/repos/Jackeagle/kernel_msm-3.10/commits/3b03b9f27cf1c3217fdef58a7bd429c481432121"}]}
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