{"push_id":1321204577,"size":39,"distinct_size":0,"ref":"refs/heads/coverity-tested/smoke","head":"1e75ed8b64bc1a9b47e540e6f100f17ec6d97f1b","before":"a75f34462612a05547fc43d192705a9c31cad7fb","commits":[{"sha":"7c8004ef0cb699320161e2bb3bb10bafadd3f8d4","author":{"name":"Jan Beulich","email":"ae7900a0c785918fc3eaa9d1a92a76bc4e651ece@suse.com"},"message":"VMX: don't bypass vmx_update_secondary_exec_control()\n\nWhile putting together another patch modifying the secondary exec\ncontrols I noticed that vmx_vcpu_update_vmfunc_ve() does a raw VMWRITE\ninstead of going through the designated function. I assume that is not\nhow it should be.\n\nSigned-off-by: Jan Beulich <jbeulich@suse.com>\nAcked-by: Kevin Tian <kevin.tian@intel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/7c8004ef0cb699320161e2bb3bb10bafadd3f8d4"},{"sha":"5602e74c60c1ec2feef4cdd75376e4b1a1d7e681","author":{"name":"Jan Beulich","email":"ae7900a0c785918fc3eaa9d1a92a76bc4e651ece@suse.com"},"message":"x86emul: correct loading of %ss\n\n- Instead of #NP, #SS needs to be raised for non-present descriptors.\n- Loading a null selector is fine in 64-bit mode at CPL != 3, as long\n  as RPL == CPL.\n- Don't lose the low two selector bits on null selector loads (also\n  applies to %ds, %es, %fs, %gs, and LDTR).\n\nSince we need CPL earlier now, also switch to using get_cpl() (instead\nof open coding it).\n\nSigned-off-by: Jan Beulich <jbeulich@suse.com>\nReviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/5602e74c60c1ec2feef4cdd75376e4b1a1d7e681"},{"sha":"dcfd9a5eadedc71d8546286b881bba7db152207a","author":{"name":"Jan Beulich","email":"ae7900a0c785918fc3eaa9d1a92a76bc4e651ece@suse.com"},"message":"x86emul: don't allow null selector for LTR\n\nSigned-off-by: Jan Beulich <jbeulich@suse.com>\nReviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>\nReviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/dcfd9a5eadedc71d8546286b881bba7db152207a"},{"sha":"bdb860d01cac7bcbaebbdce29ae9e9c7e9582d03","author":{"name":"Jan Beulich","email":"ae7900a0c785918fc3eaa9d1a92a76bc4e651ece@suse.com"},"message":"x86/HVM: correct segment register loading during task switch\n\nInstead of #NP, #SS needs to be raised for a non-present %ss\ndescriptor.\n\nDon't lose the low two selector bits on null selector loads.\n\nSigned-off-by: Jan Beulich <jbeulich@suse.com>\nReviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/bdb860d01cac7bcbaebbdce29ae9e9c7e9582d03"},{"sha":"6bfee2038565a208f4ecef0911087ca10eecf25b","author":{"name":"Emanuel Czirai","email":"ba3836e8b9136c793c865ad42c082c5ca7793316@gmail.com"},"message":"x86/AMD: apply erratum 665 workaround\n\nAMD F12h machines have an erratum which can cause DIV/IDIV to behave\nunpredictably. The workaround is to set MSRC001_1029[31] but sometimes\nthere is no BIOS update containing that workaround so let's do it\nourselves unconditionally. It is simple enough.\n\n[ Borislav: Wrote commit message. ]\n\nSigned-off-by: Emanuel Czirai <icanrealizeum@gmail.com>\nSigned-off-by: Borislav Petkov <bp@suse.de>\n[Linux commit: d1992996753132e2dafe955cccb2fb0714d3cfc4]\n\nMake applicable to Xen.\n\nSigned-off-by: Jan Beulich <jbeulich@suse.com>\nReviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/6bfee2038565a208f4ecef0911087ca10eecf25b"},{"sha":"89c423a170de2fef08445ea9151bcfa15c45b217","author":{"name":"Andrew Cooper","email":"ce6e7acce1f5d55db389f61db68b4ce33f3ea3e3@citrix.com"},"message":"x86/svm: Drop the set_segment_register() macro\n\nReplace its sole users with a single piece of inline assembly which is more\nflexable about its register constraints, rather than forcing the use of %ax.\n\nWhile editing this area, reflow the comment to remove trailing whitespace and\nuse fewer lines.\n\nNo functional change.\n\nSigned-off-by: Andrew Cooper <andrew.cooper3@citrix.com>\nReviewed-by: Jan Beulich <jbeulich@suse.com>\nReviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/89c423a170de2fef08445ea9151bcfa15c45b217"},{"sha":"9bb1865cca15b28be5aa185cd865b95b49e7b303","author":{"name":"Tamas K Lengyel","email":"faed4ee514f93fc724f4025e7e2f21162ef3815f@zentific.com"},"message":"x86/vm_event: allow overwriting Xen's i-cache used for emulation\n\nWhen emulating instructions Xen's emulator maintains a small i-cache fetched\nfrom the guest memory. This patch extends the vm_event interface to allow\noverwriting this i-cache via a buffer returned in the vm_event response.\n\nWhen responding to a SOFTWARE_BREAKPOINT event (INT3) the monitor subscriber\nnormally has to remove the INT3 from memory - singlestep - place back INT3\nto allow the guest to continue execution. This routine however is susceptible\nto a race-condition on multi-vCPU guests. By allowing the subscriber to return\nthe i-cache to be used for emulation it can side-step the problem by returning\na clean buffer without the INT3 present.\n\nAs part of this patch we rename hvm_mem_access_emulate_one to\nhvm_emulate_one_vm_event to better reflect that it is used in various vm_event\nscenarios now, not just in response to mem_access events.\n\nSigned-off-by: Tamas K Lengyel <tamas.lengyel@zentific.com>\nAcked-by: Razvan Cojocaru <rcojocaru@bitdefender.com>\nReviewed-by: Jan Beulich <jbeulich@suse.com>\nReviewed-by: Paul Durrant <paul.durrant@citrix.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/9bb1865cca15b28be5aa185cd865b95b49e7b303"},{"sha":"6a304607b9540a115de58eb54345a085a1ec3cf3","author":{"name":"Roger Pau Monne","email":"5f4729e48ff357e9d43c7533050665e737ae6983@citrix.com"},"message":"libs/gnttab: fix build of gnttab_unimp.c\n\nFix the definition of the xengnttab_grant_copy function so it's in line\nwith the prototypes in xengnttab.h.\n\nThis unbreaks the tools build on systems that don't have a gnttab device.\n\nSigned-off-by: Roger Pau Monné <roger.pau@citrix.com>\nCc: Ian Jackson <ian.jackson@eu.citrix.com>\nCc: Wei Liu <wei.liu2@citrix.com>\nAcked-by: Wei Liu <wei.liu2@citrix.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/6a304607b9540a115de58eb54345a085a1ec3cf3"},{"sha":"ecee7bfc18c69892e2a3b213448e592eceeccb7a","author":{"name":"Roger Pau Monne","email":"5f4729e48ff357e9d43c7533050665e737ae6983@citrix.com"},"message":"tools/configure: fix --with-system-{ovmf/seabios}\n\nCurrently configure code doesn't define {SEABIOS/OVMF}_PATH when\n--with-system-{ovmf/seabios} is used. Fix this by making sure those\ndefines are always set if the internal {ovmf/seabios}_path variables are\nalso set.\n\nSigned-off-by: Roger Pau Monné <roger.pau@citrix.com>\nSuggested-by: Wei Liu <wei.liu2@citrix.com>\nCc: Wei Liu <wei.liu2@citrix.com>\nCc: Ian Jackson <ian.jackson@eu.citrix.com>\n[ wei: run autogen.sh ]\nAcked-by: Wei Liu <wei.liu2@citrix.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/ecee7bfc18c69892e2a3b213448e592eceeccb7a"},{"sha":"36770c9d2b6e846a8740f351b15890f7cb396191","author":{"name":"Julien Grall","email":"0460a59ae5383817b5074239c81e847df6531cb1@arm.com"},"message":"xen/arm: do_trap_instr_abort_guest: Move the IPA computation out of the switch\n\nA follow-up patch will add more case to the switch that will require the\nIPA. So move the computation out of the switch.\n\nSigned-off-by: Julien Grall <julien.grall@arm.com>\nAcked-by: Stefano Stabellini <sstabellini@kernel.org>\nTested-by: Tamas K Lengyel <tamas@tklengyel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/36770c9d2b6e846a8740f351b15890f7cb396191"},{"sha":"7246b86ed47898a78a8b6d33b4ff61a8cd09b1ea","author":{"name":"Julien Grall","email":"0460a59ae5383817b5074239c81e847df6531cb1@arm.com"},"message":"xen/arm: p2m: Store in p2m_domain whether we need to clean the entry\n\nEach entry in the page table has to be cleaned when the IOMMU does not\nsupport coherent walk. Rather than querying every time the page table is\nupdated, it is possible to do it only once when the p2m is initialized.\n\nThis is because this value can never change, Xen would be in big trouble\notherwise.\n\nWith this change, the initialization of the IOMMU for a given domain has\nto be done earlier in order to know whether the page table entries need\nto be cleaned. It is fine to move the call earlier because it has no\ndependency.\n\nSigned-off-by: Julien Grall <julien.grall@arm.com>\nReviewed-by: Stefano Stabellini <sstabellini@kernel.org>\nTested-by: Tamas K Lengyel <tamas@tklengyel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/7246b86ed47898a78a8b6d33b4ff61a8cd09b1ea"},{"sha":"ae0275121ee8e8321960f988756f5407a452f657","author":{"name":"Julien Grall","email":"0460a59ae5383817b5074239c81e847df6531cb1@arm.com"},"message":"xen/arm: p2m: Rename parameter in p2m_{remove,write}_pte...\n\nto make clear of the usage. I.e it is used to inform whether Xen needs\nto clean the entry after writing in the page table.\n\nSigned-off-by: Julien Grall <julien.grall@arm.com>\nAcked-by: Stefano Stabellini <sstabellini@kernel.org>\nTested-by: Tamas K Lengyel <tamas@tklengyel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/ae0275121ee8e8321960f988756f5407a452f657"},{"sha":"e22ac0e000a8366b771e524c1f22fe1924348fe9","author":{"name":"Julien Grall","email":"0460a59ae5383817b5074239c81e847df6531cb1@arm.com"},"message":"xen/arm: p2m: Use typesafe gfn in p2m_mem_access_radix_set\n\np2m_mem_access_radix_set is expecting a gfn in a parameter. Rename the\nparameter 'pfn' to 'gfn' to match its content and use the typesafe gfn\nto avoid possible misusage.\n\nAlso rename the parameter to gfn to match its content.\n\nSigned-off-by: Julien Grall <julien.grall@arm.com>\nReviewed-by: Stefano Stabellini <sstabellini@kernel.org>\nTested-by: Tamas K Lengyel <tamas@tklengyel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/e22ac0e000a8366b771e524c1f22fe1924348fe9"},{"sha":"5e504b74371410e81e88f433eb8f4cfc36119b28","author":{"name":"Julien Grall","email":"0460a59ae5383817b5074239c81e847df6531cb1@arm.com"},"message":"xen/arm: p2m: Add a back pointer to domain in p2m_domain\n\nThe back pointer will be usefult later to get the domain when we only\nhave the p2m in hand.\n\nSigned-off-by: Julien Grall <julien.grall@arm.com>\nAcked-by: Stefano Stabellini <sstabellini@kernel.org>\nTested-by: Tamas K Lengyel <tamas@tklengyel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/5e504b74371410e81e88f433eb8f4cfc36119b28"},{"sha":"c0f95cd6e9a62c346ff7b9e63baebdea43110a15","author":{"name":"Julien Grall","email":"0460a59ae5383817b5074239c81e847df6531cb1@arm.com"},"message":"xen/arm: traps: Move MMIO emulation code in a separate helper\n\nCurrently, a stage-2 fault translation will likely access an emulated\nregion. All the checks are pre-sanitity check for MMIO emulation.\n\nA follow-up patch will handle a new case that could lead to a stage-2\ntranslation. To improve the clarity of the code and the changes, the\ncurrent implementation is move in a separate helper.\n\nSigned-off-by: Julien Grall <julien.grall@arm.com>\nReviewed-by: Stefano Stabellini <sstabellini@kernel.org>\nTested-by: Tamas K Lengyel <tamas@tklengyel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/c0f95cd6e9a62c346ff7b9e63baebdea43110a15"},{"sha":"2fc1f3f2ac8c8aff2c58f5fa705e8d5bdb6abb2d","author":{"name":"Julien Grall","email":"0460a59ae5383817b5074239c81e847df6531cb1@arm.com"},"message":"xen/arm: traps: Check the P2M before injecting a data/instruction abort\n\nA data/instruction abort may have occurred if another CPU was playing\nwith the stage-2 page table when following the break-before-make\nsequence (see D4.7.1 in ARM DDI 0487A.j). Rather than injecting directly\nthe fault to the guest, we need to check whether the mapping exists. If\nit exists, return to the guest to replay the instruction.\n\nSigned-off-by: Julien Grall <julien.grall@arm.com>\nReviewed-by: Stefano Stabellini <sstabellini@kernel.org>\nTested-by: Tamas K Lengyel <tamas@tklengyel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/2fc1f3f2ac8c8aff2c58f5fa705e8d5bdb6abb2d"},{"sha":"9162668fc7f5c1ae3163b3905fc58936c5332b6d","author":{"name":"Julien Grall","email":"0460a59ae5383817b5074239c81e847df6531cb1@arm.com"},"message":"xen/arm: p2m: Invalidate the TLBs when write unlocking the p2m\n\nSometimes the invalidation of the TLBs can be deferred until the p2m is\nunlocked. This is for instance the case when multiple mappings are\nremoved. In other case, such as shattering a superpage, an immediate\nflush is required.\n\nKeep track whether a flush is needed directly in the p2m_domain structure\nto allow serializing multiple changes. The TLBs will be invalidated when\nwrite unlocking the p2m if necessary.\n\nAlso a new helper, p2m_flush_sync, has been introduced to force a\nsynchronous TLB invalidation.\n\nFinally, replace the call to p2m_flush_tlb by p2m_flush_tlb_sync in\napply_p2m_changes.\n\nNote this patch is not useful today, however follow-up patches will make\nadvantage of it.\n\nSigned-off-by: Julien Grall <julien.grall@arm.com>\nReviewed-by: Stefano Stabellini <sstabellini@kernel.org>\nTested-by: Tamas K Lengyel <tamas@tklengyel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/9162668fc7f5c1ae3163b3905fc58936c5332b6d"},{"sha":"e3b0d2eca33d3acfaf4b86905ed6d4853dce6722","author":{"name":"Julien Grall","email":"0460a59ae5383817b5074239c81e847df6531cb1@arm.com"},"message":"xen/arm: p2m: Change the type of level_shifts from paddr_t to uint8_t\n\nThe level shift can be encoded with 8-bit. So it is not necessary to\nuse paddr_t (i.e 64-bit).\n\nSigned-off-by: Julien Grall <julien.grall@arm.com>\nReviewed-by: Stefano Stabellini <sstabellini@kernel.org>\nTested-by: Tamas K Lengyel <tamas@tklengyel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/e3b0d2eca33d3acfaf4b86905ed6d4853dce6722"},{"sha":"31b2e5cfd596307aa1c037532d2beeeb66017910","author":{"name":"Julien Grall","email":"0460a59ae5383817b5074239c81e847df6531cb1@arm.com"},"message":"xen/arm: p2m: Move the lookup helpers at the top of the file\n\nThis will be used later in functions that will be defined earlier in the\nfile.\n\nSigned-off-by: Julien Grall <julien.grall@arm.com>\nAcked-by: Stefano Stabellini <sstabellini@kernel.org>\nTested-by: Tamas K Lengyel <tamas@tklengyel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/31b2e5cfd596307aa1c037532d2beeeb66017910"},{"sha":"588d44e6277958540b3075331a03d5bf1cd4ad91","author":{"name":"Julien Grall","email":"0460a59ae5383817b5074239c81e847df6531cb1@arm.com"},"message":"xen/arm: p2m: Introduce p2m_get_root_pointer and use it in __p2m_lookup\n\nMapping the root table is always done the same way. To avoid duplicating\nthe code in a later patch, move the code in a separate helper.\n\nSigned-off-by: Julien Grall <julien.grall@arm.com>\nReviewed-by: Stefano Stabellini <sstabellini@kernel.org>\nTested-by: Tamas K Lengyel <tamas@tklengyel.com>","distinct":false,"url":"https://api.github.com/repos/mirage/xen/commits/588d44e6277958540b3075331a03d5bf1cd4ad91"}]}
{"actor":{"display_login":"avsm"}}