{"push_id":1021170404,"size":1000,"distinct_size":2,"ref":"refs/heads/tegra/adma","head":"20286040271b1d6fcb07923ab2673446308bbe05","before":"efcfcdcedf586359e9bf1e01bfd1bcc7c9ada6df","commits":[{"sha":"ac1823401a0d4f3732e5b3255b9989f25030e475","author":{"email":"71255387a32c360dfbe6dfb7aaeb123bf1dc8cb6@kernel.org","name":"Jaegeuk Kim"},"message":"f2fs crypto: migrate into vfs's crypto engine\n\nThis patch removes the most parts of internal crypto codes.\nAnd then, it modifies some f2fs-specific crypt codes to use the generic\nfacility.\n\nSigned-off-by: Jaegeuk Kim <jaegeuk@kernel.org>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/ac1823401a0d4f3732e5b3255b9989f25030e475"},{"sha":"bd6e1762bef35c7c6717979e3a980333183b6671","author":{"email":"71255387a32c360dfbe6dfb7aaeb123bf1dc8cb6@kernel.org","name":"Jaegeuk Kim"},"message":"f2fs crypto: sync ext4_lookup and ext4_file_open\n\nThis patch tries to catch up with lookup and open policies in ext4.\n\nSigned-off-by: Jaegeuk Kim <jaegeuk@kernel.org>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/bd6e1762bef35c7c6717979e3a980333183b6671"},{"sha":"68d16361aca7e927ef14a361d44fc2aafdcf8a07","author":{"email":"40fa222093af74e50b91d50c0739733d849f8792@samsung.com","name":"Fan Li"},"message":"f2fs: modify the readahead method in ra_node_page()\n\nra_node_page() is used to read ahead one node page. Comparing to regular\nread, it's faster because it doesn't wait for IO completion.\nBut if it is called twice for reading the same block, and the IO request\nfrom the first call hasn't been completed before the second call, the second\ncall will have to wait until the read is over.\n\nHere use the code in __do_page_cache_readahead() to solve this problem.\nIt does nothing when someone else already puts the page in mapping. The\nstatus of page should be assured by whoever puts it there.\nThis implement also prevents alteration of page reference count.\n\nSigned-off-by: Fan li <fanofcode.li@samsung.com>\nSigned-off-by: Jaegeuk Kim <jaegeuk@kernel.org>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/68d16361aca7e927ef14a361d44fc2aafdcf8a07"},{"sha":"8e7f6242ab6b47f6fd053d5a2c444e8858627cf9","author":{"email":"55601934c4a00649ed66ddbfab3a717d95d7a73d@gmail.com","name":"Keith Mok"},"message":"f2fs: use cryptoapi crc32 functions\n\nThe crc function is done bit by bit.\nOptimize this by use cryptoapi\ncrc32 function which is backed by h/w acceleration.\n\nSigned-off-by: Keith Mok <ek9852@gmail.com>\nSigned-off-by: Jaegeuk Kim <jaegeuk@kernel.org>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/8e7f6242ab6b47f6fd053d5a2c444e8858627cf9"},{"sha":"d5c7074cb75491ab8c6e11a70a51aa83d2a4110f","author":{"email":"71255387a32c360dfbe6dfb7aaeb123bf1dc8cb6@kernel.org","name":"Jaegeuk Kim"},"message":"f2fs: declare static functions\n\nJust to avoid sparse warnings.\n\nSigned-off-by: Jaegeuk Kim <jaegeuk@kernel.org>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/d5c7074cb75491ab8c6e11a70a51aa83d2a4110f"},{"sha":"1448eee67def000bf9ae10750420146660ce9a0f","author":{"email":"71255387a32c360dfbe6dfb7aaeb123bf1dc8cb6@kernel.org","name":"Jaegeuk Kim"},"message":"f2fs: support access control via key management\n\nThrough this patch, user can assign its key into a specific normal files.\nThen, other users who do not have that key cannot open the files.\nLater, owner can drop its key from the files for other users to access\nthe files again.\n\nSigned-off-by: Jaegeuk Kim <jaegeuk@kernel.org>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/1448eee67def000bf9ae10750420146660ce9a0f"},{"sha":"fa506ac101841420a2282892fc2903e0f45c0e06","author":{"email":"7541be01877451da3923f28c4a2bf379fc4b0591@kernel.org","name":"Chao Yu"},"message":"f2fs: clean up opened code with f2fs_update_dentry\n\nJust clean up opened code with existing function, no logic change.\n\nSigned-off-by: Chao Yu <chao@kernel.org>\nSigned-off-by: Jaegeuk Kim <jaegeuk@kernel.org>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/fa506ac101841420a2282892fc2903e0f45c0e06"},{"sha":"7442eea805f9bc89e55a73a64b319d97b62b8c4d","author":{"email":"7541be01877451da3923f28c4a2bf379fc4b0591@kernel.org","name":"Chao Yu"},"message":"f2fs: fix to avoid unneeded unlock_new_inode\n\nDuring ->lookup, I_NEW state of inode was been cleared in f2fs_iget,\nso in error path, we don't need to clear it again.\n\nSigned-off-by: Chao Yu <chao@kernel.org>\nSigned-off-by: Jaegeuk Kim <jaegeuk@kernel.org>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/7442eea805f9bc89e55a73a64b319d97b62b8c4d"},{"sha":"20698c922f81047c4d45c7793b7ddce8ff58d10e","author":{"email":"69652caca27c8b940640ad396ab71f93cacec34f@linux-foundation.org","name":"Linus Torvalds"},"message":"Merge tag 'dmaengine-fix-4.5' of git://git.infradead.org/users/vkoul/slave-dma\n\nPull dmaengine fixes from Vinod Koul:\n \"Two fixes showed up in last few days, and they should be included in\n  4.5.  Summary:\n\n  Two more late fixes to drivers, nothing major here:\n\n   - A memory leak fix in fsdma unmap the dma descriptors on freeup\n\n   - A fix in xdmac driver for residue calculation of dma descriptor\"\n\n* tag 'dmaengine-fix-4.5' of git://git.infradead.org/users/vkoul/slave-dma:\n  dmaengine: at_xdmac: fix residue computation\n  dmaengine: fsldma: fix memory leak","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/20698c922f81047c4d45c7793b7ddce8ff58d10e"},{"sha":"8e2ad4113ce4671686740f808ff2795395c39eef","author":{"email":"1ee125182537a91f90180f97fc3b3cb011bdf78a@google.com","name":"Willem de Bruijn"},"message":"macvtap: always pass ethernet header in linear\n\nThe stack expects link layer headers in the skb linear section.\nMacvtap can create skbs with llheader in frags in edge cases:\nwhen (IFF_VNET_HDR is off or vnet_hdr.hdr_len < ETH_HLEN) and\nprepad + len > PAGE_SIZE and vnet_hdr.flags has no or bad csum.\n\nAdd checks to ensure linear is always at least ETH_HLEN.\nAt this point, len is already ensured to be >= ETH_HLEN.\n\nFor backwards compatiblity, rounds up short vnet_hdr.hdr_len.\nThis differs from tap and packet, which return an error.\n\nFixes b9fb9ee07e67 (\"macvtap: add GSO/csum offload support\")\nSigned-off-by: Willem de Bruijn <willemb@google.com>\nSigned-off-by: David S. Miller <davem@davemloft.net>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/8e2ad4113ce4671686740f808ff2795395c39eef"},{"sha":"869f63a4d28144c03c8f4a4c0d1e8f31f8c11a10","author":{"email":"1b0ab106fb837225790a9df447125d75029db946@mellanox.com","name":"Ido Schimmel"},"message":"mlxsw: spectrum: Check requested ageing time is valid\n\nCommit c62987bbd8a1 (\"bridge: push bridge setting ageing_time down to\nswitchdev\") added a check for minimum and maximum ageing time, but this\nbreaks existing behaviour where one can set ageing time to 0 for a\nnon-learning bridge.\n\nPush this check down to the driver and allow the check in the bridge\nlayer to be removed. Currently ageing time 0 is refused by the driver,\nbut we can later add support for this functionality.\n\nSigned-off-by: Ido Schimmel <idosch@mellanox.com>\nAcked-by: Jiri Pirko <jiri@mellanox.com>\nSigned-off-by: David S. Miller <davem@davemloft.net>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/869f63a4d28144c03c8f4a4c0d1e8f31f8c11a10"},{"sha":"d7d5a43c0d16760f25d892bf9329848167a8b8a4","author":{"email":"a5d87d2bd7c424ee5cbdb4e978635bf653d5a005@free-electrons.com","name":"Thomas Petazzoni"},"message":"ARM: mvebu: fix overlap of Crypto SRAM with PCIe memory window\n\nWhen the Crypto SRAM mappings were added to the Device Tree files\ndescribing the Armada XP boards in commit c466d997bb16 (\"ARM: mvebu:\ndefine crypto SRAM ranges for all armada-xp boards\"), the fact that\nthose mappings were overlaping with the PCIe memory aperture was\noverlooked. Due to this, we currently have for all Armada XP platforms\na situation that looks like this:\n\nMemory mapping on Armada XP boards with internal registers at\n0xf1000000:\n\n - 0x00000000 -> 0xf0000000\t3.75G \tRAM\n - 0xf0000000 -> 0xf1000000\t16M\tNOR flashes (AXP GP / AXP DB)\n - 0xf1000000 -> 0xf1100000\t1M\tinternal registers\n - 0xf8000000 -> 0xffe0000\t126M\tPCIe memory aperture\n - 0xf8100000 -> 0xf8110000\t64KB\tCrypto SRAM #0\t=> OVERLAPS WITH PCIE !\n - 0xf8110000 -> 0xf8120000\t64KB\tCrypto SRAM #1\t=> OVERLAPS WITH PCIE !\n - 0xffe00000 -> 0xfff00000\t1M\tPCIe I/O aperture\n - 0xfff0000  -> 0xffffffff\t1M\tBootROM\n\nThe overlap means that when PCIe devices are added, depending on their\nmemory window needs, they might or might not be mapped into the\nphysical address space. Indeed, they will not be mapped if the area\nallocated in the PCIe memory aperture by the PCI core overlaps with\none of the Crypto SRAM. Typically, a Intel IGB PCIe NIC that needs 8MB\nof PCIe memory will see its PCIe memory window allocated from\n0xf80000000 for 8MB, which overlaps with the Crypto SRAM windows. Due\nto this, the PCIe window is not created, and any attempt to access the\nPCIe window makes the kernel explode:\n\n[    3.302213] igb: Copyright (c) 2007-2014 Intel Corporation.\n[    3.307841] pci 0000:00:09.0: enabling device (0140 -> 0143)\n[    3.313539] mvebu_mbus: cannot add window '4:f8', conflicts with another window\n[    3.320870] mvebu-pcie soc:pcie-controller: Could not create MBus window at [mem 0xf8000000-0xf87fffff]: -22\n[    3.330811] Unhandled fault: external abort on non-linefetch (0x1008) at 0xf08c0018\n\nThis problem does not occur on Armada 370 boards, because we use the\nfollowing memory mapping (for boards that have internal registers at\n0xf1000000):\n\n - 0x00000000 -> 0xf0000000\t3.75G \tRAM\n - 0xf0000000 -> 0xf1000000\t16M\tNOR flashes (AXP GP / AXP DB)\n - 0xf1000000 -> 0xf1100000\t1M\tinternal registers\n - 0xf1100000 -> 0xf1110000\t64KB\tCrypto SRAM #0 => OK !\n - 0xf8000000 -> 0xffe0000\t126M\tPCIe memory\n - 0xffe00000 -> 0xfff00000\t1M\tPCIe I/O\n - 0xfff0000  -> 0xffffffff\t1M\tBootROM\n\nObviously, the solution is to align the location of the Crypto SRAM\nmappings of Armada XP to be similar with the ones on Armada 370, i.e\nhave them between the \"internal registers\" area and the beginning of\nthe PCIe aperture.\n\nHowever, we have a special case with the OpenBlocks AX3-4 platform,\nwhich has a 128 MB NOR flash. Currently, this NOR flash is mapped from\n0xf0000000 to 0xf8000000. This is possible because on OpenBlocks\nAX3-4, the internal registers are not at 0xf1000000. And this explains\nwhy the Crypto SRAM mappings were not configured at the same place on\nArmada XP.\n\nHence, the solution is two-fold:\n\n (1) Move the NOR flash mapping on Armada XP OpenBlocks AX3-4 from\n     0xe8000000 to 0xf0000000. This frees the 0xf0000000 ->\n     0xf80000000 space.\n\n (2) Move the Crypto SRAM mappings on Armada XP to be similar to\n     Armada 370 (except of course that Armada XP has two Crypto SRAM\n     and not one).\n\nAfter this patch, the memory mapping on Armada XP boards with\nregisters at 0xf1 is:\n\n - 0x00000000 -> 0xf0000000\t3.75G \tRAM\n - 0xf0000000 -> 0xf1000000\t16M\tNOR flashes (AXP GP / AXP DB)\n - 0xf1000000 -> 0xf1100000\t1M\tinternal registers\n - 0xf1100000 -> 0xf1110000\t64KB\tCrypto SRAM #0\n - 0xf1110000 -> 0xf1120000\t64KB\tCrypto SRAM #1\n - 0xf8000000 -> 0xffe0000\t126M\tPCIe memory\n - 0xffe00000 -> 0xfff00000\t1M\tPCIe I/O\n - 0xfff0000  -> 0xffffffff\t1M\tBootROM\n\nAnd the memory mapping for the special case of the OpenBlocks AX3-4\n(internal registers at 0xd0000000, NOR of 128 MB):\n\n - 0x00000000 -> 0xc0000000\t3G \tRAM\n - 0xd0000000 -> 0xd1000000\t1M\tinternal registers\n - 0xe800000  -> 0xf0000000\t128M\tNOR flash\n - 0xf1100000 -> 0xf1110000\t64KB\tCrypto SRAM #0\n - 0xf1110000 -> 0xf1120000\t64KB\tCrypto SRAM #1\n - 0xf8000000 -> 0xffe0000\t126M\tPCIe memory\n - 0xffe00000 -> 0xfff00000\t1M\tPCIe I/O\n - 0xfff0000  -> 0xffffffff\t1M\tBootROM\n\nFixes: c466d997bb16 (\"ARM: mvebu: define crypto SRAM ranges for all armada-xp boards\")\nReported-by: Phil Sutter <phil@nwl.cc>\nCc: Phil Sutter <phil@nwl.cc>\nCc: <stable@vger.kernel.org>\nSigned-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>\nAcked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>\nSigned-off-by: Olof Johansson <olof@lixom.net>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/d7d5a43c0d16760f25d892bf9329848167a8b8a4"},{"sha":"a648018db83f359a171c145886c1659982b054bd","author":{"email":"8c69ee23f3f44f8162a64d579c1fa25c2f55298a@lixom.net","name":"Olof Johansson"},"message":"Merge branch 'fixes' into for-next\n\n* fixes:\n  ARM: mvebu: fix overlap of Crypto SRAM with PCIe memory window","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/a648018db83f359a171c145886c1659982b054bd"},{"sha":"88de1cd457e5cb664d6d437e2ea4750d089165f5","author":{"email":"1b0ab106fb837225790a9df447125d75029db946@mellanox.com","name":"Ido Schimmel"},"message":"rocker: set FDB cleanup timer according to lowest ageing time\n\nIn rocker, ageing time is a per-port attribute, so the next time the FDB\ncleanup timer fires should be set according to the lowest ageing time.\n\nThis will later allow us to delete the BR_MIN_AGEING_TIME macro, which was\nadded to guarantee minimum ageing time in the bridge layer, thereby breaking\nexisting behavior.\n\nSigned-off-by: Ido Schimmel <idosch@mellanox.com>\nAcked-by: Jiri Pirko <jiri@mellanox.com>\nSigned-off-by: David S. Miller <davem@davemloft.net>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/88de1cd457e5cb664d6d437e2ea4750d089165f5"},{"sha":"4c656c13b254d598e83e586b7b4d36a2043dad85","author":{"email":"5939443bd6498ae9d7581c946dfbecf8ed1feac0@brocade.com","name":"Stephen Hemminger"},"message":"bridge: allow zero ageing time\n\nThis fixes a regression in the bridge ageing time caused by:\ncommit c62987bbd8a1 (\"bridge: push bridge setting ageing_time down to switchdev\")\n\nThere are users of Linux bridge which use the feature that if ageing time\nis set to 0 it causes entries to never expire. See:\n  https://www.linuxfoundation.org/collaborate/workgroups/networking/bridge\n\nFor a pure software bridge, it is unnecessary for the code to have\narbitrary restrictions on what values are allowable.\n\nSigned-off-by: Stephen Hemminger <stephen@networkplumber.org>\nAcked-by: Jiri Pirko <jiri@mellanox.com>\nSigned-off-by: David S. Miller <davem@davemloft.net>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/4c656c13b254d598e83e586b7b4d36a2043dad85"},{"sha":"5390dba1a5390c9724db5c5714506301dfe31a7b","author":{"email":"fe08d3c717adf2ae63592e4c9aec6e3e404d8e3e@davemloft.net","name":"David S. Miller"},"message":"Merge branch 'bridge_ageing_time'\n\nStephen Hemminger says:\n\n====================\nbridge: ageing timer regression fix\n\nThis fixes regression in how ageing timer is managed.\nBacking out the change required fixing switch drivers as well.\n====================\n\nSigned-off-by: David S. Miller <davem@davemloft.net>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/5390dba1a5390c9724db5c5714506301dfe31a7b"},{"sha":"e327f4e193b6a176f4dc3b19faf6371a8917588d","author":{"email":"16a9a54ddf4259952e3c118c763138e83693d7fd@perches.com","name":"Joe Perches"},"message":"cisco: enic: Update logging macros and uses\n\nDon't hide varibles used by the logging macros.\n\nMiscellanea:\n\no Use the more common ##__VA_ARGS__ extension\no Add missing newlines to formats\no Realign arguments\n\nSigned-off-by: Joe Perches <joe@perches.com>\nSigned-off-by: David S. Miller <davem@davemloft.net>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/e327f4e193b6a176f4dc3b19faf6371a8917588d"},{"sha":"134611446dc657e1bbc73ca0e4e6b599df687db0","author":{"email":"3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@iogearbox.net","name":"Daniel Borkmann"},"message":"ip_tunnel: add support for setting flow label via collect metadata\n\nThis patch extends udp_tunnel6_xmit_skb() to pass in the IPv6 flow label\nfrom call sites. Currently, there's no such option and it's always set to\nzero when writing ip6_flow_hdr(). Add a label member to ip_tunnel_key, so\nthat flow-based tunnels via collect metadata frontends can make use of it.\nvxlan and geneve will be converted to add flow label support separately.\n\nSigned-off-by: Daniel Borkmann <daniel@iogearbox.net>\nSigned-off-by: David S. Miller <davem@davemloft.net>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/134611446dc657e1bbc73ca0e4e6b599df687db0"},{"sha":"e7f70af111f086a20800ad2e17f544b2e3e0f375","author":{"email":"3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@iogearbox.net","name":"Daniel Borkmann"},"message":"vxlan: support setting IPv6 flow label\n\nThis work adds support for setting the IPv6 flow label for vxlan per\ndevice and through collect metadata (ip_tunnel_key) frontends. The\nvxlan dst cache does not need any special considerations here, for\nthe cases where caches can be used, the label is static per cache.\n\nSigned-off-by: Daniel Borkmann <daniel@iogearbox.net>\nSigned-off-by: David S. Miller <davem@davemloft.net>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/e7f70af111f086a20800ad2e17f544b2e3e0f375"},{"sha":"8eb3b99554b82da968d1fbc00df9f3156c5e2d63","author":{"email":"3d0f3b9ddcacec30c4008c5e030e6c13a478cb4f@iogearbox.net","name":"Daniel Borkmann"},"message":"geneve: support setting IPv6 flow label\n\nThis work adds support for setting the IPv6 flow label for geneve per\ndevice and through collect metadata (ip_tunnel_key) frontends. Also here,\nthe geneve dst cache does not need any special considerations, for the\ncases where caches can be used, the label is static per cache.\n\nSigned-off-by: Daniel Borkmann <daniel@iogearbox.net>\nSigned-off-by: David S. Miller <davem@davemloft.net>","distinct":false,"url":"https://api.github.com/repos/jonhunter/linux/commits/8eb3b99554b82da968d1fbc00df9f3156c5e2d63"}]}