{"push_id":1185478336,"size":27,"distinct_size":0,"ref":"refs/heads/torvalds/master","head":"1a0a02d1efa066001fd315c1b4df583d939fa2c4","before":"e7bdea7750eb2a64aea4a08fa5c0a31719c8155d","commits":[{"sha":"33cdcee04be3b4482be97393167e7561b2584e1e","author":{"name":"Boris Brezillon","email":"d3686c1eb756201cacdf5983212dc6c4a5a469fe@free-electrons.com"},"message":"pwm: Fix pwm_apply_args()\n\nCommit 5ec803edcb70 (\"pwm: Add core infrastructure to allow atomic\nupdates\"), implemented pwm_disable() as a wrapper around\npwm_apply_state(), and then, commit ef2bf4997f7d (\"pwm: Improve args\nchecking in pwm_apply_state()\") added missing checks on the ->period\nvalue in pwm_apply_state() to ensure we were not passing inappropriate\nvalues to the ->config() or ->apply() methods.\n\nThe conjunction of these 2 commits led to a case where pwm_disable()\nwas no longer succeeding, thus preventing the polarity setting done\nin pwm_apply_args().\n\nSet a valid period in pwm_apply_args() to ensure polarity setting\nwon't be rejected.\n\nSigned-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>\nReported-by: Geert Uytterhoeven <geert@linux-m68k.org>\nSuggested-by: Brian Norris <briannorris@chromium.org>\nFixes: 5ec803edcb70 (\"pwm: Add core infrastructure to allow atomic updates\")\nTested-by: Geert Uytterhoeven <geert+renesas@glider.be>\nReviewed-by: Brian Norris <briannorris@chromium.org>\nSigned-off-by: Thierry Reding <thierry.reding@gmail.com>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/33cdcee04be3b4482be97393167e7561b2584e1e"},{"sha":"0efce9da1255f13d910842b62cb14371044a3c50","author":{"name":"Sudeep Holla","email":"59421025db0a4566b0c646d02b1a8fb3615a9cf9@arm.com"},"message":"arm64: KVM: fix build with CONFIG_ARM_PMU disabled\n\nWhen CONFIG_ARM_PMU is disabled, we get the following build error:\n\narch/arm64/kvm/sys_regs.c: In function 'pmu_counter_idx_valid':\narch/arm64/kvm/sys_regs.c:564:27: error: 'ARMV8_PMU_CYCLE_IDX' undeclared (first use in this function)\n  if (idx >= val && idx != ARMV8_PMU_CYCLE_IDX)\n                           ^\narch/arm64/kvm/sys_regs.c:564:27: note: each undeclared identifier is reported only once for each function it appears in\narch/arm64/kvm/sys_regs.c: In function 'access_pmu_evcntr':\narch/arm64/kvm/sys_regs.c:592:10: error: 'ARMV8_PMU_CYCLE_IDX' undeclared (first use in this function)\n    idx = ARMV8_PMU_CYCLE_IDX;\n          ^\narch/arm64/kvm/sys_regs.c: In function 'access_pmu_evtyper':\narch/arm64/kvm/sys_regs.c:638:14: error: 'ARMV8_PMU_CYCLE_IDX' undeclared (first use in this function)\n   if (idx == ARMV8_PMU_CYCLE_IDX)\n              ^\narch/arm64/kvm/hyp/switch.c:86:15: error: 'ARMV8_PMU_USERENR_MASK' undeclared (first use in this function)\n  write_sysreg(ARMV8_PMU_USERENR_MASK, pmuserenr_el0);\n\nThis patch fixes the build with CONFIG_ARM_PMU disabled.\n\nCc: Christoffer Dall <christoffer.dall@linaro.org>\nCc: Marc Zyngier <marc.zyngier@arm.com>\nSigned-off-by: Sudeep Holla <sudeep.holla@arm.com>\nSigned-off-by: Christoffer Dall <christoffer.dall@linaro.org>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/0efce9da1255f13d910842b62cb14371044a3c50"},{"sha":"591d215afcc2f94e8e2c69a63c924c044677eb31","author":{"name":"James Morse","email":"3f3c71a988a3895b9a80f00dbeb25517110f1863@arm.com"},"message":"KVM: arm/arm64: Stop leaking vcpu pid references\n\nkvm provides kvm_vcpu_uninit(), which amongst other things, releases the\nlast reference to the struct pid of the task that was last running the vcpu.\n\nOn arm64 built with CONFIG_DEBUG_KMEMLEAK, starting a guest with kvmtool,\nthen killing it with SIGKILL results (after some considerable time) in:\n> cat /sys/kernel/debug/kmemleak\n> unreferenced object 0xffff80007d5ea080 (size 128):\n>  comm \"lkvm\", pid 2025, jiffies 4294942645 (age 1107.776s)\n>  hex dump (first 32 bytes):\n>    01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................\n>    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................\n>  backtrace:\n>    [<ffff8000001b30ec>] create_object+0xfc/0x278\n>    [<ffff80000071da34>] kmemleak_alloc+0x34/0x70\n>    [<ffff80000019fa2c>] kmem_cache_alloc+0x16c/0x1d8\n>    [<ffff8000000d0474>] alloc_pid+0x34/0x4d0\n>    [<ffff8000000b5674>] copy_process.isra.6+0x79c/0x1338\n>    [<ffff8000000b633c>] _do_fork+0x74/0x320\n>    [<ffff8000000b66b0>] SyS_clone+0x18/0x20\n>    [<ffff800000085cb0>] el0_svc_naked+0x24/0x28\n>    [<ffffffffffffffff>] 0xffffffffffffffff\n\nOn x86 kvm_vcpu_uninit() is called on the path from kvm_arch_destroy_vm(),\non arm no equivalent call is made. Add the call to kvm_arch_vcpu_free().\n\nSigned-off-by: James Morse <james.morse@arm.com>\nFixes: 749cf76c5a36 (\"KVM: ARM: Initial skeleton to compile KVM support\")\nCc: <stable@vger.kernel.org> # 3.10+\nAcked-by: Marc Zyngier <marc.zyngier@arm.com>\nSigned-off-by: Christoffer Dall <christoffer.dall@linaro.org>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/591d215afcc2f94e8e2c69a63c924c044677eb31"},{"sha":"749d088b8e7f4b9826ede02b9a043e417fa84aa1","author":{"name":"Minfei Huang","email":"bdcafc43eb36eaee3912ebc06997a442559c5b13@gmail.com"},"message":"pvclock: Add CPU barriers to get correct version value\n\nProtocol for the \"version\" fields is: hypervisor raises it (making it\nuneven) before it starts updating the fields and raises it again (making\nit even) when it is done.  Thus the guest can make sure the time values\nit got are consistent by checking the version before and after reading\nthem.\n\nAdd CPU barries after getting version value just like what function\nvread_pvclock does, because all of callees in this function is inline.\n\nFixes: 502dfeff239e8313bfbe906ca0a1a6827ac8481b\nCc: stable@vger.kernel.org\nSigned-off-by: Minfei Huang <mnghuan@gmail.com>\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/749d088b8e7f4b9826ede02b9a043e417fa84aa1"},{"sha":"f7550d076d55c1b5f02f95012e3a5a84d264c47d","author":{"name":"Minfei Huang","email":"bdcafc43eb36eaee3912ebc06997a442559c5b13@gmail.com"},"message":"pvclock: Cleanup to remove function pvclock_get_nsec_offset\n\nFunction __pvclock_read_cycles is short enough, so there is no need to\nhave another function pvclock_get_nsec_offset to calculate tsc delta.\nIt's better to combine it into function __pvclock_read_cycles.\n\nRemove useless variables in function __pvclock_read_cycles.\n\nSigned-off-by: Minfei Huang <mnghuan@gmail.com>\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/f7550d076d55c1b5f02f95012e3a5a84d264c47d"},{"sha":"ed911b43adb889c37a37fa57a995f0b460c633b6","author":{"name":"Minfei Huang","email":"bdcafc43eb36eaee3912ebc06997a442559c5b13@gmail.com"},"message":"pvclock: Get rid of __pvclock_read_cycles in function pvclock_read_flags\n\nThere is a generic function __pvclock_read_cycles to be used to get both\nflags and cycles. For function pvclock_read_flags, it's useless to get\ncycles value. To make this function be more effective, get this variable\nflags directly in function.\n\nSigned-off-by: Minfei Huang <mnghuan@gmail.com>\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/ed911b43adb889c37a37fa57a995f0b460c633b6"},{"sha":"8d93c874ac899bfdf0ad3787baef684a0c878c2c","author":{"name":"Marcelo Tosatti","email":"e4d8781870eadb5380172e46e4dd8b265de5d423@redhat.com"},"message":"KVM: x86: move nsec_to_cycles from x86.c to x86.h\n\nMove the inline function nsec_to_cycles from x86.c to x86.h, as\nthe next patch uses it from lapic.c.\n\nSigned-off-by: Marcelo Tosatti <mtosatti@redhat.com>\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/8d93c874ac899bfdf0ad3787baef684a0c878c2c"},{"sha":"b606f189c7d5bf9b875bba168162fe05287880fe","author":{"name":"Marcelo Tosatti","email":"e4d8781870eadb5380172e46e4dd8b265de5d423@redhat.com"},"message":"KVM: LAPIC: cap __delay at lapic_timer_advance_ns\n\nThe host timer which emulates the guest LAPIC TSC deadline\ntimer has its expiration diminished by lapic_timer_advance_ns\nnanoseconds. Therefore if, at wait_lapic_expire, a difference\nlarger than lapic_timer_advance_ns is encountered, delay at most\nlapic_timer_advance_ns.\n\nThis fixes a problem where the guest can cause the host\nto delay for large amounts of time.\n\nReported-by: Alan Jenkins <alan.christopher.jenkins@gmail.com>\nSigned-off-by: Marcelo Tosatti <mtosatti@redhat.com>\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/b606f189c7d5bf9b875bba168162fe05287880fe"},{"sha":"ff30ef40deca4658e27b0c596e7baf39115e858f","author":{"name":"Quentin Casasnovas","email":"6db8c7e13582ed3d82e8582798256f9efc23b460@oracle.com"},"message":"KVM: nVMX: VMX instructions: fix segment checks when L1 is in long mode.\n\nI couldn't get Xen to boot a L2 HVM when it was nested under KVM - it was\ngetting a GP(0) on a rather unspecial vmread from Xen:\n\n     (XEN) ----[ Xen-4.7.0-rc  x86_64  debug=n  Not tainted ]----\n     (XEN) CPU:    1\n     (XEN) RIP:    e008:[<ffff82d0801e629e>] vmx_get_segment_register+0x14e/0x450\n     (XEN) RFLAGS: 0000000000010202   CONTEXT: hypervisor (d1v0)\n     (XEN) rax: ffff82d0801e6288   rbx: ffff83003ffbfb7c   rcx: fffffffffffab928\n     (XEN) rdx: 0000000000000000   rsi: 0000000000000000   rdi: ffff83000bdd0000\n     (XEN) rbp: ffff83000bdd0000   rsp: ffff83003ffbfab0   r8:  ffff830038813910\n     (XEN) r9:  ffff83003faf3958   r10: 0000000a3b9f7640   r11: ffff83003f82d418\n     (XEN) r12: 0000000000000000   r13: ffff83003ffbffff   r14: 0000000000004802\n     (XEN) r15: 0000000000000008   cr0: 0000000080050033   cr4: 00000000001526e0\n     (XEN) cr3: 000000003fc79000   cr2: 0000000000000000\n     (XEN) ds: 0000   es: 0000   fs: 0000   gs: 0000   ss: 0000   cs: e008\n     (XEN) Xen code around <ffff82d0801e629e> (vmx_get_segment_register+0x14e/0x450):\n     (XEN)  00 00 41 be 02 48 00 00 <44> 0f 78 74 24 08 0f 86 38 56 00 00 b8 08 68 00\n     (XEN) Xen stack trace from rsp=ffff83003ffbfab0:\n\n     ...\n\n     (XEN) Xen call trace:\n     (XEN)    [<ffff82d0801e629e>] vmx_get_segment_register+0x14e/0x450\n     (XEN)    [<ffff82d0801f3695>] get_page_from_gfn_p2m+0x165/0x300\n     (XEN)    [<ffff82d0801bfe32>] hvmemul_get_seg_reg+0x52/0x60\n     (XEN)    [<ffff82d0801bfe93>] hvm_emulate_prepare+0x53/0x70\n     (XEN)    [<ffff82d0801ccacb>] handle_mmio+0x2b/0xd0\n     (XEN)    [<ffff82d0801be591>] emulate.c#_hvm_emulate_one+0x111/0x2c0\n     (XEN)    [<ffff82d0801cd6a4>] handle_hvm_io_completion+0x274/0x2a0\n     (XEN)    [<ffff82d0801f334a>] __get_gfn_type_access+0xfa/0x270\n     (XEN)    [<ffff82d08012f3bb>] timer.c#add_entry+0x4b/0xb0\n     (XEN)    [<ffff82d08012f80c>] timer.c#remove_entry+0x7c/0x90\n     (XEN)    [<ffff82d0801c8433>] hvm_do_resume+0x23/0x140\n     (XEN)    [<ffff82d0801e4fe7>] vmx_do_resume+0xa7/0x140\n     (XEN)    [<ffff82d080164aeb>] context_switch+0x13b/0xe40\n     (XEN)    [<ffff82d080128e6e>] schedule.c#schedule+0x22e/0x570\n     (XEN)    [<ffff82d08012c0cc>] softirq.c#__do_softirq+0x5c/0x90\n     (XEN)    [<ffff82d0801602c5>] domain.c#idle_loop+0x25/0x50\n     (XEN)\n     (XEN)\n     (XEN) ****************************************\n     (XEN) Panic on CPU 1:\n     (XEN) GENERAL PROTECTION FAULT\n     (XEN) [error_code=0000]\n     (XEN) ****************************************\n\nTracing my host KVM showed it was the one injecting the GP(0) when\nemulating the VMREAD and checking the destination segment permissions in\nget_vmx_mem_address():\n\n     3)               |    vmx_handle_exit() {\n     3)               |      handle_vmread() {\n     3)               |        nested_vmx_check_permission() {\n     3)               |          vmx_get_segment() {\n     3)   0.074 us    |            vmx_read_guest_seg_base();\n     3)   0.065 us    |            vmx_read_guest_seg_selector();\n     3)   0.066 us    |            vmx_read_guest_seg_ar();\n     3)   1.636 us    |          }\n     3)   0.058 us    |          vmx_get_rflags();\n     3)   0.062 us    |          vmx_read_guest_seg_ar();\n     3)   3.469 us    |        }\n     3)               |        vmx_get_cs_db_l_bits() {\n     3)   0.058 us    |          vmx_read_guest_seg_ar();\n     3)   0.662 us    |        }\n     3)               |        get_vmx_mem_address() {\n     3)   0.068 us    |          vmx_cache_reg();\n     3)               |          vmx_get_segment() {\n     3)   0.074 us    |            vmx_read_guest_seg_base();\n     3)   0.068 us    |            vmx_read_guest_seg_selector();\n     3)   0.071 us    |            vmx_read_guest_seg_ar();\n     3)   1.756 us    |          }\n     3)               |          kvm_queue_exception_e() {\n     3)   0.066 us    |            kvm_multiple_exception();\n     3)   0.684 us    |          }\n     3)   4.085 us    |        }\n     3)   9.833 us    |      }\n     3) + 10.366 us   |    }\n\nCross-checking the KVM/VMX VMREAD emulation code with the Intel Software\nDevelopper Manual Volume 3C - \"VMREAD - Read Field from Virtual-Machine\nControl Structure\", I found that we're enforcing that the destination\noperand is NOT located in a read-only data segment or any code segment when\nthe L1 is in long mode - BUT that check should only happen when it is in\nprotected mode.\n\nShuffling the code a bit to make our emulation follow the specification\nallows me to boot a Xen dom0 in a nested KVM and start HVM L2 guests\nwithout problems.\n\nFixes: f9eb4af67c9d (\"KVM: nVMX: VMX instructions: add checks for #GP/#SS exceptions\")\nSigned-off-by: Quentin Casasnovas <quentin.casasnovas@oracle.com>\nCc: Eugene Korenevsky <ekorenevsky@gmail.com>\nCc: Paolo Bonzini <pbonzini@redhat.com>\nCc: Radim Krčmář <rkrcmar@redhat.com>\nCc: Thomas Gleixner <tglx@linutronix.de>\nCc: Ingo Molnar <mingo@redhat.com>\nCc: H. Peter Anvin <hpa@zytor.com>\nCc: linux-stable <stable@vger.kernel.org>\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/ff30ef40deca4658e27b0c596e7baf39115e858f"},{"sha":"f52e126cc7476196f44f3c313b7d9f0699a881fc","author":{"name":"Vineet Gupta","email":"a7e6bac69589bd9c485fe09b6cb3c1c86c8546ec@synopsys.com"},"message":"ARC: unwind: ensure that .debug_frame is generated (vs. .eh_frame)\n\nWith recent binutils update to support dwarf CFI pseudo-ops in gas, we\nnow get .eh_frame vs. .debug_frame. Although the call frame info is\nexactly the same in both, the CIE differs, which the current kernel\nunwinder can't cope with.\n\nThis broke both the kernel unwinder as well as loadable modules (latter\nbecause of a new unhandled relo R_ARC_32_PCREL from .rela.eh_frame in\nthe module loader)\n\nThe ideal solution would be to switch unwinder to .eh_frame.\nFor now however we can make do by just ensureing .debug_frame is\ngenerated by removing -fasynchronous-unwind-tables\n\n .eh_frame    generated with -gdwarf-2 -fasynchronous-unwind-tables\n .debug_frame generated with -gdwarf-2\n\nFixes STAR 9001058196\n\nCc: stable@vger.kernel.org\nSigned-off-by: Vineet Gupta <vgupta@synopsys.com>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/f52e126cc7476196f44f3c313b7d9f0699a881fc"},{"sha":"9bd54517ee86cb164c734f72ea95aeba4804f10b","author":{"name":"Alexey Brodkin","email":"622a4dc4d126934e8a732fb98e268f020a2b4d1e@synopsys.com"},"message":"arc: unwind: warn only once if DW2_UNWIND is disabled\n\nIf CONFIG_ARC_DW2_UNWIND is disabled every time arc_unwind_core()\ngets called following message gets printed in debug console:\n----------------->8---------------\nCONFIG_ARC_DW2_UNWIND needs to be enabled\n----------------->8---------------\n\nThat message makes sense if user indeed wants to see a backtrace or\nget nice function call-graphs in perf but what if user disabled\nunwinder for the purpose? Why pollute his debug console?\n\nSo instead we'll warn user about possibly missing feature once and\nlet him decide if that was what he or she really wanted.\n\nSigned-off-by: Alexey Brodkin <abrodkin@synopsys.com>\nCc: stable@vger.kernel.org\nSigned-off-by: Vineet Gupta <vgupta@synopsys.com>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/9bd54517ee86cb164c734f72ea95aeba4804f10b"},{"sha":"3c35f6edc09b239a60de87a5aeb78563fc372704","author":{"name":"Lee Jones","email":"f7fe55ceaf3cc20897deb03f68f7e1efd260e3d6@linaro.org"},"message":"reset: Reorder inline reset_control_get*() wrappers\n\nWe're about to split the current API into two, where consumers will\nbe forced to be explicit when requesting reset lines.  The choice\nwill be to either the call the *_exclusive or *_shared variant\ndepending on whether they can actually tolorate not being asserted\nwhen that request is made.\n\nThe new API will look like this once reorded and complete:\n\n  reset_control_get_exclusive()\n  reset_control_get_shared()\n  reset_control_get_optional_exclusive()\n  reset_control_get_optional_shared()\n  of_reset_control_get_exclusive()\n  of_reset_control_get_shared()\n  of_reset_control_get_exclusive_by_index()\n  of_reset_control_get_shared_by_index()\n  devm_reset_control_get_exclusive()\n  devm_reset_control_get_shared()\n  devm_reset_control_get_optional_exclusive()\n  devm_reset_control_get_optional_shared()\n  devm_reset_control_get_exclusive_by_index()\n  devm_reset_control_get_shared_by_index()\n\nSigned-off-by: Lee Jones <lee.jones@linaro.org>\nSigned-off-by: Philipp Zabel <p.zabel@pengutronix.de>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/3c35f6edc09b239a60de87a5aeb78563fc372704"},{"sha":"a53e35db70d1638002e40d495d096181dbb0fe16","author":{"name":"Lee Jones","email":"f7fe55ceaf3cc20897deb03f68f7e1efd260e3d6@linaro.org"},"message":"reset: Ensure drivers are explicit when requesting reset lines\n\nPhasing out generic reset line requests enables us to make some better\ndecisions on when and how to (de)assert said lines.  If an 'exclusive'\nline is requested, we know a device *requires* a reset and that it's\npreferable to act upon a request right away.  However, if a 'shared'\nreset line is requested, we can reasonably assume sure that placing a\ndevice into reset isn't a hard requirement, but probably a measure to\nsave power and is thus able to cope with not being asserted if another\ndevice is still in use.\n\nIn order allow gentle adoption and not to forcing all consumers to\nmove to the API immediately, causing administration headache between\nsubsystems, this patch adds some temporary stand-in shim-calls.  This\nwill ease the burden at merge time and allow subsystems to migrate over\nto the new API in a more realistic time-frame.\n\nSigned-off-by: Lee Jones <lee.jones@linaro.org>\nSigned-off-by: Philipp Zabel <p.zabel@pengutronix.de>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/a53e35db70d1638002e40d495d096181dbb0fe16"},{"sha":"40faee8ee471ae526344cd5c62ff520d356de841","author":{"name":"Lee Jones","email":"f7fe55ceaf3cc20897deb03f68f7e1efd260e3d6@linaro.org"},"message":"reset: Supply *_shared variant calls when using of_* API\n\nConsumers need to be able to specify whether they are requesting an\n'exclusive' or 'shared' reset line no matter which API (of_*, devm_*,\netc) they are using.  This change allows users of the of_* API in\nparticular to specify that their request is for a 'shared' line.\n\nSigned-off-by: Lee Jones <lee.jones@linaro.org>\nSigned-off-by: Philipp Zabel <p.zabel@pengutronix.de>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/40faee8ee471ae526344cd5c62ff520d356de841"},{"sha":"c33d61a0c400c50f378ef03a386e646abca292ca","author":{"name":"Lee Jones","email":"f7fe55ceaf3cc20897deb03f68f7e1efd260e3d6@linaro.org"},"message":"reset: Supply *_shared variant calls when using *_optional APIs\n\nConsumers need to be able to specify whether they are requesting an\n'exclusive' or 'shared' reset line no matter which API (of_*, devm_*,\netc) they are using.  This change allows users of the optional_* API\nin particular to specify that their request is for a 'shared' line.\n\nSigned-off-by: Lee Jones <lee.jones@linaro.org>\nSigned-off-by: Philipp Zabel <p.zabel@pengutronix.de>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/c33d61a0c400c50f378ef03a386e646abca292ca"},{"sha":"0bcc0eab363aa80f79769324bf3f2ab7781840f2","author":{"name":"Lee Jones","email":"f7fe55ceaf3cc20897deb03f68f7e1efd260e3d6@linaro.org"},"message":"reset: TRIVIAL: Add line break at same place for similar APIs\n\nStandardise the way inline functions:\n\n  devm_reset_control_get_shared_by_index\n  devm_reset_control_get_exclusive_by_index\n\n... are formatted.\n\nSigned-off-by: Lee Jones <lee.jones@linaro.org>\nSigned-off-by: Philipp Zabel <p.zabel@pengutronix.de>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/0bcc0eab363aa80f79769324bf3f2ab7781840f2"},{"sha":"f5ee3f2b5ad6881a8194b9f684ce11640d1062f7","author":{"name":"Lee Jones","email":"f7fe55ceaf3cc20897deb03f68f7e1efd260e3d6@linaro.org"},"message":"usb: host: ohci-st: Inform the reset framework that our reset line may be shared\n\nOn the STiH410 B2120 development board the ST EHCI IP shares its reset\nline with the OHCI IP.  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New functionality in the reset subsystems forces\nconsumers to be explicit when requesting shared/exclusive reset lines.\n\nAcked-by: Peter Griffin <peter.griffin@linaro.org>\nAcked-by: Alan Stern <stern@rowland.harvard.edu>\nSigned-off-by: Lee Jones <lee.jones@linaro.org>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/19599304625b74c95bff318c735928eec668b1ca"},{"sha":"002f17bc54ff4005260d8e6e6700de97f5b25679","author":{"name":"Lee Jones","email":"f7fe55ceaf3cc20897deb03f68f7e1efd260e3d6@linaro.org"},"message":"usb: dwc3: st: Inform the reset framework that our reset line may be shared\n\nOn the STiH410 B2120 development board the MiPHY28lp shares its reset\nline with the Synopsys DWC3 SuperSpeed (SS) USB 3.0 Dual-Role-Device\n(DRD).  New functionality in the reset subsystems forces consumers to\nbe explicit when requesting shared/exclusive reset lines.\n\nAcked-by: Felipe Balbi <felipe.balbi@linux.intel.com>\nSigned-off-by: Lee Jones <lee.jones@linaro.org>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/002f17bc54ff4005260d8e6e6700de97f5b25679"},{"sha":"9278e707f4e187df2b4d9eeb2bc78a1724fbe4ac","author":{"name":"Lee Jones","email":"f7fe55ceaf3cc20897deb03f68f7e1efd260e3d6@linaro.org"},"message":"phy: phy-stih407-usb: Inform the reset framework that our reset line may be shared\n\nOn the STiH410 B2120 development board the ports on the Generic PHY\nshare their reset lines with each other.  New functionality in the\nreset subsystems forces consumers to be explicit when requesting\nshared/exclusive reset lines.\n\nSigned-off-by: Lee Jones <lee.jones@linaro.org>","distinct":false,"url":"https://api.github.com/repos/olivieer/kernel_msm-3.10/commits/9278e707f4e187df2b4d9eeb2bc78a1724fbe4ac"}]}
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