{"push_id":1210948212,"size":13,"distinct_size":13,"ref":"refs/heads/master","head":"66669fcf809c1e3ff644b12e04e625d3737ffd8e","before":"f60d0603edca472c4458b30956f38c6c1a836d66","commits":[{"sha":"e61a7534e33063a76e105d895e5c6317f2d0cd76","author":{"name":"York Sun","email":"fd864fca2d8a2f05385c903b5be14981de83ee5b@nxp.com"},"message":"armv8: Move secure_ram variable out of generic global data\n\nSecure_ram variable was put in generic global data. But only ARMv8\nuses this variable. Move it to ARM specific data structure.\n\nSigned-off-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/e61a7534e33063a76e105d895e5c6317f2d0cd76"},{"sha":"50e93b95653da44b9743357dfa3701e8482fd167","author":{"name":"York Sun","email":"fd864fca2d8a2f05385c903b5be14981de83ee5b@nxp.com"},"message":"armv8: Add tlb_allocated to arch global data\n\nWhen secure ram is used, MMU tables have to be put into secure ram.\nTo use common MMU code, gd->arch.tlb_addr will be used to host TLB\nentry pointer. To save allocated memory for later use, tlb_allocated\nvariable is added to global data structure.\n\nSigned-off-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/50e93b95653da44b9743357dfa3701e8482fd167"},{"sha":"252cdb46ee33ff876823d0ce0a0190c3878c76ff","author":{"name":"York Sun","email":"fd864fca2d8a2f05385c903b5be14981de83ee5b@nxp.com"},"message":"armv8: mmu: house cleaning\n\nMake setup_pgtages() and get_tcr() available for platform code to\ncustomize MMU tables.\nRemove unintentional call of create_table().\n\nSigned-off-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/252cdb46ee33ff876823d0ce0a0190c3878c76ff"},{"sha":"f733d46620d0efb93091f147f81a4bf9588fad3f","author":{"name":"York Sun","email":"fd864fca2d8a2f05385c903b5be14981de83ee5b@nxp.com"},"message":"armv8: mmu: split block if necessary\n\nWhen page tables are created, allow later table to be created on\nprevious block entry. Splitting block feature is already working\nwith current code. This patch only rearranges the code order and\nadds one condition to call split_block().\n\nSigned-off-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/f733d46620d0efb93091f147f81a4bf9588fad3f"},{"sha":"cd4b0c5feaaa524b44889cde8f58d4b121df8fed","author":{"name":"York Sun","email":"fd864fca2d8a2f05385c903b5be14981de83ee5b@nxp.com"},"message":"armv8: mmu: Add support of non-identical mapping\n\nIntroduce virtual and physical addresses in the mapping table. This change\nhave no impact on existing boards because they all use idential mapping.\n\nSigned-off-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/cd4b0c5feaaa524b44889cde8f58d4b121df8fed"},{"sha":"5ad5823d0c71a45f886d0016a74d62a5216abe10","author":{"name":"York Sun","email":"fd864fca2d8a2f05385c903b5be14981de83ee5b@nxp.com"},"message":"armv8: layerscape: Convert to use common MMU framework\n\nDrop platform code to create static MMU tables. Use common framework\nto create MMU tables on the run. Tested on LS2080ARDB with secure and\nnon-secure ram scenarios.\n\nSigned-off-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/5ad5823d0c71a45f886d0016a74d62a5216abe10"},{"sha":"85cdf38e69bbf3b2bb67c8218c8e4cbf28f8759b","author":{"name":"Hou Zhiqiang","email":"2503e5798730b90f3137cadceef911af079156fe@nxp.com"},"message":"armv8: fsl-layerscape: add i/d-cache enable function to enable_caches\n\nThis function assume that the d-cache and MMU has been enabled earlier,\nso it just created MMU table in main memory. But the assumption is not\nalways correct, for example, the early setup is done in EL3, while\nenable_caches() is called when the PE has turned into another EL.\n\nDefine the function mmu_setup() for fsl-layerscape to cover the weak\none.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/85cdf38e69bbf3b2bb67c8218c8e4cbf28f8759b"},{"sha":"b45db3b59035735a0479d8df260d2349cdc3c21c","author":{"name":"Hou Zhiqiang","email":"2503e5798730b90f3137cadceef911af079156fe@nxp.com"},"message":"ARMv8: add the secure monitor firmware framework\n\nThis framework is introduced for ARMv8 secure monitor mode firmware.\nThe main functions of the framework are, on EL3, verify the firmware,\nload it to the secure memory and jump into it, and while it returned\nto U-Boot, do some necessary setups at the 'target exception level'\nthat is determined by the respective secure firmware.\n\nSo far, the framework support only FIT format image, and need to define\nthe name of which config node should be used in 'configurations' and\nthe name of property for the raw secure firmware image in that config.\nThe FIT image should be stored in Byte accessing memory, such as NOR\nFlash, or else it should be copied to main memory to use this framework.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/b45db3b59035735a0479d8df260d2349cdc3c21c"},{"sha":"f1dd4cadd20c3b6b2454b7f293265caa66f27fee","author":{"name":"Hou Zhiqiang","email":"2503e5798730b90f3137cadceef911af079156fe@nxp.com"},"message":"ARMv8/layerscape: Add FSL PPA support\n\nThe FSL Primary Protected Application (PPA) is a software component\nloaded during boot which runs in TrustZone and remains resident\nafter boot.\n\nUse the secure firmware framework to integrate FSL PPA into U-Boot.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/f1dd4cadd20c3b6b2454b7f293265caa66f27fee"},{"sha":"032d5bb4aed40f1d0de0698501fcacee594caabc","author":{"name":"Hou Zhiqiang","email":"2503e5798730b90f3137cadceef911af079156fe@nxp.com"},"message":"ARMv8/Layerscape: switch SMP method accordingly\n\nIf the PSCI and PPA is ready, skip the fixup for spin-table and\nwaking secondary cores. Otherwise, change SMP method to spin-table,\nand the device node of PSCI will be removed.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/032d5bb4aed40f1d0de0698501fcacee594caabc"},{"sha":"45684ae37bf96b455a1d4a957b80551dc2c85959","author":{"name":"Hou Zhiqiang","email":"2503e5798730b90f3137cadceef911af079156fe@nxp.com"},"message":"ARMv8/PSCI: Fixup the device tree for PSCI\n\nSet the enable-method in the cpu node to PSCI, and create device\nnode for PSCI, when PSCI was enabled.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/45684ae37bf96b455a1d4a957b80551dc2c85959"},{"sha":"0e68a3694d1f33c69be7d1cec5a4261aa1d3d01d","author":{"name":"Hou Zhiqiang","email":"2503e5798730b90f3137cadceef911af079156fe@nxp.com"},"message":"ARMv8/ls1043ardb: Integrate FSL PPA\n\nThe PPA use PSCI to make secondary cores bootup. So when PPA was\nenabled, add the CONFIG_ARMV8_PSCI to identify the SMP boot-method\nbetween PSCI and spin-table.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\nReviewed-by: York Sun <york.sun@nxp.com>","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/0e68a3694d1f33c69be7d1cec5a4261aa1d3d01d"},{"sha":"66669fcf809c1e3ff644b12e04e625d3737ffd8e","author":{"name":"Tom Rini","email":"b48d6b6dbb09ca3e1d3496b75a0c8f820fad19c4@konsulko.com"},"message":"Merge git://git.denx.de/u-boot-fsl-qoriq\n\nSigned-off-by: Tom Rini <trini@konsulko.com>\n\nConflicts:\n\tarch/arm/cpu/armv8/Makefile\n\tarch/arm/lib/bootm-fdt.c","distinct":true,"url":"https://api.github.com/repos/hashrabbit/u-boot/commits/66669fcf809c1e3ff644b12e04e625d3737ffd8e"}]}
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