{"push_id":1433116486,"size":2,"distinct_size":2,"ref":"refs/heads/master","head":"91bfa8e7eaf7a91c47a3e86c35ffe2135aa0cd8f","before":"d0a648e18a7162f7361a13296beb0c1293acb16e","commits":[{"sha":"df96a702ba98c1b85e8b4657498e76ec9f543447","author":{"name":"Kyösti Mälkki","email":"b1b20ea397b0294af542f71aaa46c2043ea2f487@gmail.com"},"message":"PCIEXP_ASPM: Unify code with other PCI-e tuning\n\nError reporting can be enabled together with ASPM, there\nis no other use for function return value.\n\nChange-Id: I58081fac0df5205a5aea65d735d34b375c2af9cd\nSigned-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>\nReviewed-on: https://review.coreboot.org/17654\nTested-by: build bot (Jenkins)\nReviewed-by: Nico Huber <nico.h@gmx.de>\nReviewed-by: Aaron Durbin <adurbin@chromium.org>","distinct":true,"url":"https://api.github.com/repos/coreboot/coreboot/commits/df96a702ba98c1b85e8b4657498e76ec9f543447"},{"sha":"91bfa8e7eaf7a91c47a3e86c35ffe2135aa0cd8f","author":{"name":"Kyösti Mälkki","email":"b1b20ea397b0294af542f71aaa46c2043ea2f487@gmail.com"},"message":"PCIEXP_PLUGIN_SUPPORT: Change dependency on PCI access\n\nSome PCI-e capability registers are located starting from\n0x100, these are not accessible using the conventional\nPCI IO config operations at 0xcf8/0xcfc, unless PCI_CFG_EXT_IO\nwas selected.\n\nThus any feature that calls pciexp_find_extended_cap()\ndepends on either MMCONF_SUPPORT_DEFAULT or PCI_CFG_EXT_IO\nbeing enabled on the platform.\n\nIn theory there can be system without MMCONF_SUPPORT, but\nwith complete PCI Express configuration space available\nusing PCI_CFG_EXT_IO. Do not use explicit PCI MMCONF\noperations here, but rely on the default PCI access\nmethod to be able to access all of the configuration space.\n\nWhile at it, convert to IS_ENABLED() everywhere in the source\nand organize Kconfig file better.\n\nChange-Id: Ica6e16d2fb2adc532e644c4b2c47806490235715\nSigned-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>\nReviewed-on: https://review.coreboot.org/17546\nTested-by: build bot (Jenkins)\nReviewed-by: Aaron Durbin <adurbin@chromium.org>","distinct":true,"url":"https://api.github.com/repos/coreboot/coreboot/commits/91bfa8e7eaf7a91c47a3e86c35ffe2135aa0cd8f"}]}
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