{"action":"created","issue":{"url":"https://api.github.com/repos/machinekit/machinekit/issues/865","repository_url":"https://api.github.com/repos/machinekit/machinekit","labels_url":"https://api.github.com/repos/machinekit/machinekit/issues/865/labels{/name}","comments_url":"https://api.github.com/repos/machinekit/machinekit/issues/865/comments","events_url":"https://api.github.com/repos/machinekit/machinekit/issues/865/events","html_url":"https://github.com/machinekit/machinekit/issues/865","id":128753300,"number":865,"title":"mksocfpga hm2 port needs machinekit driver implemention.","user":{"login":"the-snowwhite","id":11050908,"avatar_url":"https://avatars.githubusercontent.com/u/11050908?v=3","gravatar_id":"","url":"https://api.github.com/users/the-snowwhite","html_url":"https://github.com/the-snowwhite","followers_url":"https://api.github.com/users/the-snowwhite/followers","following_url":"https://api.github.com/users/the-snowwhite/following{/other_user}","gists_url":"https://api.github.com/users/the-snowwhite/gists{/gist_id}","starred_url":"https://api.github.com/users/the-snowwhite/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/the-snowwhite/subscriptions","organizations_url":"https://api.github.com/users/the-snowwhite/orgs","repos_url":"https://api.github.com/users/the-snowwhite/repos","events_url":"https://api.github.com/users/the-snowwhite/events{/privacy}","received_events_url":"https://api.github.com/users/the-snowwhite/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":{"login":"cdsteinkuehler","id":1993109,"avatar_url":"https://avatars.githubusercontent.com/u/1993109?v=3","gravatar_id":"","url":"https://api.github.com/users/cdsteinkuehler","html_url":"https://github.com/cdsteinkuehler","followers_url":"https://api.github.com/users/cdsteinkuehler/followers","following_url":"https://api.github.com/users/cdsteinkuehler/following{/other_user}","gists_url":"https://api.github.com/users/cdsteinkuehler/gists{/gist_id}","starred_url":"https://api.github.com/users/cdsteinkuehler/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/cdsteinkuehler/subscriptions","organizations_url":"https://api.github.com/users/cdsteinkuehler/orgs","repos_url":"https://api.github.com/users/cdsteinkuehler/repos","events_url":"https://api.github.com/users/cdsteinkuehler/events{/privacy}","received_events_url":"https://api.github.com/users/cdsteinkuehler/received_events","type":"User","site_admin":false},"milestone":null,"comments":31,"created_at":"2016-01-26T08:13:54Z","updated_at":"2016-02-12T15:47:11Z","closed_at":null,"body":"The new Nano / Atlas Mesa based socfpga port presents itself to machinekit\r\nvia an custom uio_irq driver where the irq part for now is unimplemented / disabled to keep things as simple as possible.\r\n\r\nloading the uio kernel module\r\nhttps://github.com/the-snowwhite/mksoc/tree/master/Software/hm2reg_uio-module\r\n\r\nwill then present a /dev/uio device, that is asscessable from user space via this small procedure:\r\ntaken from:\r\nhttp://blog.idv-tech.com/wp-content/uploads/2014/09/drivers-session3-uio-4public.pdf\r\npage 13.\r\n\r\n    #define UIO_SIZE \"/sys/class/uio/uio0/maps/map0/size\"\r\n\r\n    int main( int argc, char **argv ) {\r\n    int uio_fd;\r\n    unsigned int uio_size;\r\n    FILE *size_fp;\r\n    void *base_address;\r\n    uio_fd = open( “/dev/uio0”, O_RDWR);\r\n    size_fp = fopen(UIO_SIZE, O_RDONLY);\r\n    fscanf(size_fp, “0x%08X”, &uio_size);\r\n    base_address = mmap(NULL, uio_size,\r\n    PROT_READ | PROT_WRITE,\r\n    MAP_SHARED, uio_fd, 0);\r\n\r\n// Access to the hardware can now occur....\r\n\r\n    munmap(base_address, uio_size);\r\n\r\n    }\r\n\r\nThis above is all that is needed to talk to the hostmot2 vhdl ip-core on the fpga part of the Nano-board and allready in place.\r\n\r\n\r\n--------\r\n\r\n\r\nThe Machinekit required parts of the procedure of creating a new hostmot2 driver I so far have been able to decode are this:\r\n\r\nthe driver needs to export at least these functions initially:\r\n\r\n    hm2_cvsoc_read(hm2_lowlevel_io_t *this, u32 addr, void *buffer, int size) {\r\n\r\n    // there are read / write templates with allignment chekking in the current commit and hm2_pci.c\r\n\r\n    }\r\n\r\n    static int hm2_cvsoc_write(hm2_lowlevel_io_t *this, u32 addr, void *buffer, int size) {\r\n    }\r\n\r\n    static void hm2_cvsocfpga_cleanup(void) {\r\n        int i;\r\n        munmap(base_address, uio_size);\r\n        // NOTE: hal_malloc() doesnt have a matching free\r\n    \r\n        for (i = 0; i < num_ipcores; i ++) {\r\n            hm2_lowlevel_io_t *this = &ipcore[i].llio;\r\n            THIS_PRINT(\"releasing ipcore\\n\");\r\n            hm2_unregister(this);\r\n            hal_parport_release(&ipcore[i].port);\r\n        }\r\n    }\r\n\r\n\r\nthese can be added later:\r\n\r\n    static int hm2_cvsoc_program_fpga(hm2_lowlevel_io_t *this, const bitfile_t *bitfile) {\r\n    source code.\r\n    }\r\n\r\n    static int hm2_cvsoc_probe(struct cvsoc_dev *dev, const struct dts_device_id *id) {\r\n    }\r\n\r\n\r\nPlus have these 2 main function(minimal epp driver as example with cvsocfpga names):\r\n\r\n        int rtapi_app_main(void) {\r\n        int r = 0;\r\n    \r\n        comp_id = hal_init(HM2_LLIO_NAME);\r\n        if (comp_id < 0) return comp_id;\r\n    \r\n        r = hm2_cvsocfpga_setup();\r\n        if (r) {\r\n            hm2_cvsocfpga_cleanup();\r\n            hal_exit(comp_id);\r\n        } else {\r\n            hal_ready(comp_id);\r\n        }\r\n    \r\n        return r;\r\n    }\r\n  \r\n\r\n    void rtapi_app_exit(void) {\r\n        hm2_cvsocfpga_cleanup();\r\n        hal_exit(comp_id);\r\n        LL_PRINT(\"driver unloaded\\n\");\r\n    }\r\n\r\nOR:\r\n\r\n    void rtapi_app_exit(void) {\r\n        uio_unregister_driver(&hm2_cvsoc_driver);\r\n        LL_PRINT(\"driver unloaded\\n\");\r\n        hal_exit(comp_id);\r\n    }\r\n\r\n\r\nFollowing new dts data structure can be added for the embedded platforms for probing of hardware capabilities / resources available:\r\n\r\nthis one is loaded with the cvsocfpga hm2 interface info.\r\n\r\n    static struct dts_device_id hm2_cvsoc_tbl[] = {\r\n        \r\n        // 5i25\r\n        {   \r\n            .address_width = 14,        //0x0000000E\r\n            .clocks = 2,                //0x00000002 number of clocks ?\r\n            .compatible {\r\n                .vendor = machkt,       //6D 61 63 68 6B 74 2C\r\n                .name = hm2reg-io,      //68 6D 32 72 65 67 2D 69 6F 2D 31 2E 30 00\r\n            } // (machkt,hm2reg-io-1.0.)\r\n            .data_width = 32,           // 0x00000020\r\n            .name = hm2-socfpga,        //68 6D 32 2D 73 6F 63 66 70 67 61 00 (hm2-socfpga.)\r\n            .reg = 0x00000001, 0x00040000, 0x00010000,// ?, address offset from bridge, address span (= max address +1)\r\n        },\r\n        {0,},\r\n    };\r\n\r\n"},"comment":{"url":"https://api.github.com/repos/machinekit/machinekit/issues/comments/183380788","html_url":"https://github.com/machinekit/machinekit/issues/865#issuecomment-183380788","issue_url":"https://api.github.com/repos/machinekit/machinekit/issues/865","id":183380788,"user":{"login":"the-snowwhite","id":11050908,"avatar_url":"https://avatars.githubusercontent.com/u/11050908?v=3","gravatar_id":"","url":"https://api.github.com/users/the-snowwhite","html_url":"https://github.com/the-snowwhite","followers_url":"https://api.github.com/users/the-snowwhite/followers","following_url":"https://api.github.com/users/the-snowwhite/following{/other_user}","gists_url":"https://api.github.com/users/the-snowwhite/gists{/gist_id}","starred_url":"https://api.github.com/users/the-snowwhite/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/the-snowwhite/subscriptions","organizations_url":"https://api.github.com/users/the-snowwhite/orgs","repos_url":"https://api.github.com/users/the-snowwhite/repos","events_url":"https://api.github.com/users/the-snowwhite/events{/privacy}","received_events_url":"https://api.github.com/users/the-snowwhite/received_events","type":"User","site_admin":false},"created_at":"2016-02-12T15:47:10Z","updated_at":"2016-02-12T15:47:10Z","body":"Thanks\r\nProblem is that I'm in way over my head and I have never been able to fully understand the c++ objects and pointer stuff:\r\nthe seg fault is triggered by this function:\r\n\r\n        r = hm2_register(&board->llio, config[0]);\r\n\r\nWhich I have tried to clone from the hm2_test.c   instead of hm2_pci.c which has way too much pci driver overhead to be in any way compressive for me.\r\n\r\nI have however tried to retain the option for more than 1 board (ip interface core) in the config structure + some uio dts probe config structs. Maybe I should just cut that out.\r\n\r\nIMHO gdb debugging seems a bit overkill for something as easy and simple as @cdsteinkuehler describes it ?\r\n"}}