{"push_id":1011828048,"size":1,"distinct_size":1,"ref":"refs/heads/master","head":"2a08137feebaf0f8f55feeff00096f5a9d03f44c","before":"f5452085979d9031023b1b810abf0493757e6287","commits":[{"sha":"2a08137feebaf0f8f55feeff00096f5a9d03f44c","author":{"email":"af0622ab041e8b0f8e5819838dcc93898196e71f@chromium.org","name":"Aaron Durbin"},"message":"x86 chipsets: utilize x86_setup_mtrrs_with_detect()\n\nFor all the chipsets which were performing the following sequence:\n  x86_setup_fixed_mtrrs();\n  x86_setup_var_mtrrs(cpuid_eax(0x80000008) & 0xff, 2);\n\nReplace that with x86_setup_mtrrs_with_detect() since it is equivalent.\n\nChange-Id: I9f362dbf38942d675f615d22b9e5770ce65e5a08\nSigned-off-by: Aaron Durbin <adurbin@chromium.org>\nReviewed-on: https://review.coreboot.org/13936\nReviewed-by: Furquan Shaikh <furquan@google.com>\nTested-by: build bot (Jenkins)\nReviewed-by: Andrey Petrov <andrey.petrov@intel.com>","distinct":true,"url":"https://api.github.com/repos/coreboot/coreboot/commits/2a08137feebaf0f8f55feeff00096f5a9d03f44c"}]}