{"action":"opened","issue":{"url":"https://api.github.com/repos/avr-llvm/llvm/issues/175","labels_url":"https://api.github.com/repos/avr-llvm/llvm/issues/175/labels{/name}","comments_url":"https://api.github.com/repos/avr-llvm/llvm/issues/175/comments","events_url":"https://api.github.com/repos/avr-llvm/llvm/issues/175/events","html_url":"https://github.com/avr-llvm/llvm/issues/175","id":127326069,"number":175,"title":"Assertion failure: Call result #4 has unhandled type i16 at CallingConvLower.cpp:167","user":{"login":"shepmaster","id":174509,"avatar_url":"https://avatars.githubusercontent.com/u/174509?v=3","gravatar_id":"","url":"https://api.github.com/users/shepmaster","html_url":"https://github.com/shepmaster","followers_url":"https://api.github.com/users/shepmaster/followers","following_url":"https://api.github.com/users/shepmaster/following{/other_user}","gists_url":"https://api.github.com/users/shepmaster/gists{/gist_id}","starred_url":"https://api.github.com/users/shepmaster/starred{/owner}{/repo}","subscriptions_url":"https://api.github.com/users/shepmaster/subscriptions","organizations_url":"https://api.github.com/users/shepmaster/orgs","repos_url":"https://api.github.com/users/shepmaster/repos","events_url":"https://api.github.com/users/shepmaster/events{/privacy}","received_events_url":"https://api.github.com/users/shepmaster/received_events","type":"User","site_admin":false},"labels":[],"state":"open","locked":false,"assignee":null,"milestone":null,"comments":0,"created_at":"2016-01-18T22:49:05Z","updated_at":"2016-01-18T22:49:05Z","closed_at":null,"body":"```\r\nCall result #4 has unhandled type i16\r\nUNREACHABLE executed at avr-rust/src/llvm/lib/CodeGen/CallingConvLower.cpp:167!\r\n```\r\n\r\nRunning `llc -march=avr -mcpu=atmega328p -filetype=obj bugpoint-reduced-simplified.ll` on:\r\n\r\n```llvm\r\n; ModuleID = 'bugpoint-reduced-simplified.bc'\r\ntarget datalayout = \"e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-i64:8:8-f32:8:8-f64:8:8-n8\"\r\ntarget triple = \"avr-atmel-none\"\r\n\r\n; Function Attrs: inlinehint nounwind uwtable\r\ndefine void @_ZN3ops13i64.RemAssign10rem_assign20h23f1175739be271cXrkE(i64* noalias nocapture dereferenceable(8), i64) unnamed_addr #0 {\r\nentry-block:\r\n  %2 = srem i64 0, %1\r\n  store i64 %2, i64* %0, align 1\r\n  ret void\r\n}\r\n\r\nattributes #0 = { inlinehint nounwind uwtable }\r\n```"}}