{"push_id":1364561936,"size":5,"distinct_size":0,"ref":"refs/heads/fixes","head":"09b7e37b18eecc1e347f4b1a3bc863f32801f634","before":"78914ff0843623ee6dbeae92fa0bb8761828684e","commits":[{"sha":"62623d5f918fb1c8ed86b03b9a86cc81f1cb1878","author":{"name":"Michael Ellerman","email":"703f314094b6de2227245178d929368b49dccb12@ellerman.id.au"},"message":"KVM: PPC: Book3S HV: Fix build error when SMP=n\n\nCommit 5d375199ea96 (\"KVM: PPC: Book3S HV: Set server for passed-through\ninterrupts\") broke the SMP=n build:\n\n  arch/powerpc/kvm/book3s_hv_rm_xics.c:758:2: error: implicit declaration of function 'get_hard_smp_processor_id'\n\nThat is because we lost the implicit include of asm/smp.h, so include it\nexplicitly to get the definition for get_hard_smp_processor_id().\n\nFixes: 5d375199ea96 (\"KVM: PPC: Book3S HV: Set server for passed-through interrupts\")\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/linuxppc/linux/commits/62623d5f918fb1c8ed86b03b9a86cc81f1cb1878"},{"sha":"80f23935cadb1c654e81951f5a8b7ceae0acc1b4","author":{"name":"Segher Boessenkool","email":"0a40bbaba6c18bf84c9422b2a556ed6cbf184950@kernel.crashing.org"},"message":"powerpc: Convert cmp to cmpd in idle enter sequence\n\nPowerPC's \"cmp\" instruction has four operands. Normally people write\n\"cmpw\" or \"cmpd\" for the second cmp operand 0 or 1. But, frequently\npeople forget, and write \"cmp\" with just three operands.\n\nWith older binutils this is silently accepted as if this was \"cmpw\",\nwhile often \"cmpd\" is wanted. With newer binutils GAS will complain\nabout this for 64-bit code. For 32-bit code it still silently assumes\n\"cmpw\" is what is meant.\n\nIn this instance the code comes directly from ISA v2.07, including the\ncmp, but cmpd is correct. Backport to stable so that new toolchains can\nbuild old kernels.\n\nFixes: 948cf67c4726 (\"powerpc: Add NAP mode support on Power7 in HV mode\")\nCc: stable@vger.kernel.org # v3.0\nReviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>\nSigned-off-by: Segher Boessenkool <segher@kernel.crashing.org>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/linuxppc/linux/commits/80f23935cadb1c654e81951f5a8b7ceae0acc1b4"},{"sha":"a05b82d5149dfeef05254a11c3636a89a854520a","author":{"name":"Vaibhav Jain","email":"73e733f54aec8147bb41865f6b4b9148827fbae7@linux.vnet.ibm.com"},"message":"cxl: Fix leaking pid refs in some error paths\n\nIn some error paths in functions cxl_start_context and\nafu_ioctl_start_work pid references to the current & group-leader tasks\ncan leak after they are taken. This patch fixes these error paths to\nrelease these pid references before exiting the error path.\n\nFixes: 7b8ad495d592 (\"cxl: Fix DSI misses when the context owning task exits\")\nCc: stable@vger.kernel.org # v4.5+\nReviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>\nReported-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>\nSigned-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>\nAcked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/linuxppc/linux/commits/a05b82d5149dfeef05254a11c3636a89a854520a"},{"sha":"56c46222af0d09149fadec2a3ce9d4889de01cc6","author":{"name":"Paul Mackerras","email":"b848d7d196719b06ca69c3524d28631335b2ab79@ozlabs.org"},"message":"powerpc/64: Re-fix race condition between going idle and entering guest\n\nCommit 8117ac6a6c2f (\"powerpc/powernv: Switch off MMU before entering\nnap/sleep/rvwinkle mode\", 2014-12-10) fixed a race condition where one\nthread entering a KVM guest could switch the MMU context to the guest\nwhile another thread was still in host kernel context with the MMU on.\nThat commit moved the point where a thread entering a power-saving\nmode set its kvm_hstate.hwthread_state field in its PACA to\nKVM_HWTHREAD_IN_IDLE from a point where the MMU was on to after the\nMMU had been switched off.  That commit also added a comment\nexplaining that we have to switch to real mode before setting\nhwthread_state to avoid this race.\n\nNevertheless, commit 4eae2c9ae54a (\"powerpc/powernv: Make\npnv_powersave_common more generic\", 2016-07-08) subsequently moved\nthe setting of hwthread_state back to a point where the MMU is on,\nthus reintroducing the race, despite the comment saying that this\nshould not be done being included in full in the context lines of\nthe patch that did it.\n\nThis fixes the race again and adds a bigger and shoutier comment\nexplaining the potential race condition.\n\nFixes: 4eae2c9ae54a (\"powerpc/powernv: Make pnv_powersave_common more generic\")\nCc: stable@vger.kernel.org # v4.8+\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>\nReviewed-by: Shreyas B. Prabhu <shreyasbp@gmail.com>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/linuxppc/linux/commits/56c46222af0d09149fadec2a3ce9d4889de01cc6"},{"sha":"09b7e37b18eecc1e347f4b1a3bc863f32801f634","author":{"name":"Paul Mackerras","email":"b848d7d196719b06ca69c3524d28631335b2ab79@ozlabs.org"},"message":"powerpc/64: Fix race condition in setting lock bit in idle/wakeup code\n\nThis fixes a race condition where one thread that is entering or\nleaving a power-saving state can inadvertently ignore the lock bit\nthat was set by another thread, and potentially also clear it.\nThe core_idle_lock_held function is called when the lock bit is\nseen to be set.  It polls the lock bit until it is clear, then\ndoes a lwarx to load the word containing the lock bit and thread\nidle bits so it can be updated.  However, it is possible that the\nvalue loaded with the lwarx has the lock bit set, even though an\nimmediately preceding lwz loaded a value with the lock bit clear.\nIf this happens then we go ahead and update the word despite the\nlock bit being set, and when called from pnv_enter_arch207_idle_mode,\nwe will subsequently clear the lock bit.\n\nNo identifiable misbehaviour has been attributed to this race.\n\nThis fixes it by checking the lock bit in the value loaded by the\nlwarx.  If it is set then we just go back and keep on polling.\n\nFixes: b32aadc1a8ed (\"powerpc/powernv: Fix race in updating core_idle_state\")\nCc: stable@vger.kernel.org # v4.2+\nSigned-off-by: Paul Mackerras <paulus@ozlabs.org>\nSigned-off-by: Michael Ellerman <mpe@ellerman.id.au>","distinct":false,"url":"https://api.github.com/repos/linuxppc/linux/commits/09b7e37b18eecc1e347f4b1a3bc863f32801f634"}]}
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