{"push_id":1027414899,"size":3,"distinct_size":3,"ref":"refs/heads/master","head":"a99f51df8168f63164b72d71ac931da710a4b03b","before":"5460c31240bd424fe4b9ec58773b4319b97db935","commits":[{"sha":"71acdb08dbb84892d792ff01e57093487aa174af","author":{"email":"1d0b47a508f04184301062f109cd46e4b3383bfb@gmail.com","name":"Nicolai Haehnle"},"message":"AMDGPU: use ComplexPattern for offsets in llvm.amdgcn.buffer.load/store.format\n\nSummary:\nWe cannot easily deduce that an offset is in an SGPR, but the Mesa frontend\ncannot easily make use of an explicit soffset parameter either. Furthermore,\nit is likely that in the future, LLVM will be in a better position than the\nfrontend to choose an SGPR offset if possible.\n\nSince there aren't any frontend uses of these intrinsics in upstream\nrepositories yet, I would like to take this opportunity to change the\nintrinsic signatures to a single offset parameter, which is then selected\nto immediate offsets or voffsets using a ComplexPattern.\n\nReviewers: arsenm, tstellarAMD, mareko\n\nSubscribers: arsenm, llvm-commits\n\nDifferential Revision: http://reviews.llvm.org/D18218\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263790 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm/commits/71acdb08dbb84892d792ff01e57093487aa174af"},{"sha":"e9f50a4929124878c2741a755780516d809e136f","author":{"email":"1d0b47a508f04184301062f109cd46e4b3383bfb@gmail.com","name":"Nicolai Haehnle"},"message":"AMDGPU/SI: Add llvm.amdgcn.buffer.atomic.* intrinsics\n\nSummary:\nThese intrinsics expose the BUFFER_ATOMIC_* instructions and will be used\nby Mesa to implement atomics with buffer semantics. The intrinsic interface\nmatches that of buffer.load.format and buffer.store.format, except that the\nGLC bit is not exposed (it is automatically deduced based on whether the\nreturn value is used).\n\nThe change of hasSideEffects is required for TableGen to accept the pattern\nthat matches the intrinsic.\n\nReviewers: tstellarAMD, arsenm\n\nSubscribers: arsenm, rivanvx, llvm-commits\n\nDifferential Revision: http://reviews.llvm.org/D18151\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263791 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm/commits/e9f50a4929124878c2741a755780516d809e136f"},{"sha":"a99f51df8168f63164b72d71ac931da710a4b03b","author":{"email":"1d0b47a508f04184301062f109cd46e4b3383bfb@gmail.com","name":"Nicolai Haehnle"},"message":"AMDGPU: Overload return type of llvm.amdgcn.buffer.load.format\n\nSummary:\nAllow the selection of BUFFER_LOAD_FORMAT_x and _XY. Do this now before\nthe frontend patches land in Mesa. Eventually, we may want to automatically\nreduce the size of loads at the LLVM IR level, which requires such overloads,\nand in some cases Mesa can generate them directly.\n\nReviewers: tstellarAMD, arsenm\n\nSubscribers: arsenm, llvm-commits\n\nDifferential Revision: http://reviews.llvm.org/D18255\n\ngit-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263792 91177308-0d34-0410-b5e6-96231b3b80d8","distinct":true,"url":"https://api.github.com/repos/llvm-project/llvm/commits/a99f51df8168f63164b72d71ac931da710a4b03b"}]}