{"push_id":1369505572,"size":121,"distinct_size":37,"ref":"refs/heads/atomic-8","head":"ed2839166c21e001d15868f4d9591a21aaebd547","before":"794e8ee1ce3b0d6664263042dbbaf1d0c1e08f04","commits":[{"sha":"adb65dec4ba80ac6440aa45ca9bf409392c6da63","author":{"name":"Vijaya Kumar K","email":"c29d9cf655fdc0314290d3640f8dee0c5974cea5@caviumnetworks.com"},"message":"migration: Remove static allocation of xzblre cache buffer\n\nAllocate xzblre zero page cache buffer dynamically.\nRemove dependency on TARGET_PAGE_SIZE to make run-time\npage size detection for arm platforms.\n\nSigned-off-by: Vijaya Kumar K <vijayak@cavium.com>\nMessage-id: 1465808915-4887-2-git-send-email-vijayak@caviumnetworks.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Richard Henderson <rth@twiddle.net>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/adb65dec4ba80ac6440aa45ca9bf409392c6da63"},{"sha":"2615fabd42ea0078dd9e659bdb21a5b7a1f87a9a","author":{"name":"Vijaya Kumar K","email":"c29d9cf655fdc0314290d3640f8dee0c5974cea5@caviumnetworks.com"},"message":"exec.c: Remove static allocation of sub_section of sub_page\n\nAllocate sub_section dynamically. Remove dependency\non TARGET_PAGE_SIZE to make run-time page size detection\nfor arm platforms.\n\nSigned-off-by: Vijaya Kumar K <vijayak@cavium.com>\nMessage-id: 1465808915-4887-3-git-send-email-vijayak@caviumnetworks.com\n[PMM: use flexible array member rather than separate malloc\n so we don't need an extra pointer deref when using it]\nReviewed-by: Richard Henderson <rth@twiddle.net>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/2615fabd42ea0078dd9e659bdb21a5b7a1f87a9a"},{"sha":"66ec9f49399f0a9fa13ee77c472caba0de2773fc","author":{"name":"Vijaya Kumar K","email":"c29d9cf655fdc0314290d3640f8dee0c5974cea5@caviumnetworks.com"},"message":"translate-all.c: Compute L1 page table properties at runtime\n\nRemove L1 page mapping table properties computing\nstatically using macros which is dependent on\nTARGET_PAGE_BITS. Drop macros V_L1_SIZE, V_L1_SHIFT,\nV_L1_BITS macros and replace with variables which are\ncomputed at early stage of VM boot.\n\nRemoving dependency can help to make TARGET_PAGE_BITS\ndynamic.\n\nSigned-off-by: Vijaya Kumar K <vijayak@cavium.com>\nMessage-id: 1465808915-4887-4-git-send-email-vijayak@caviumnetworks.com\n[PMM:\n assert(v_l1_shift % V_L2_BITS == 0)\n cache v_l2_levels\n initialize from page_init() rather than vl.c\n minor code style fixes\n put v_l1_size into a local where used as a loop limit]\nReviewed-by: Richard Henderson <rth@twiddle.net>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/66ec9f49399f0a9fa13ee77c472caba0de2773fc"},{"sha":"20bccb82ff3ea09bcb7c4ee226d3160cab15f7da","author":{"name":"Peter Maydell","email":"d4da0cae8bdd6af8ce5950fc7fec7c012df68229@linaro.org"},"message":"cpu: Support a target CPU having a variable page size\n\nSupport target CPUs having a page size which isn't knownn\nat compile time. To use this, the CPU implementation should:\n * define TARGET_PAGE_BITS_VARY\n * not define TARGET_PAGE_BITS\n * define TARGET_PAGE_BITS_MIN to the smallest value it\n   might possibly want for TARGET_PAGE_BITS\n * call set_preferred_target_page_bits() in its realize\n   function to indicate the actual preferred target page\n   size for the CPU (and report any error from it)\n\nIn CONFIG_USER_ONLY, the CPU implementation should continue\nto define TARGET_PAGE_BITS appropriately for the guest\nOS page size.\n\nMachines which want to take advantage of having the page\nsize something larger than TARGET_PAGE_BITS_MIN must\nset the MachineClass minimum_page_bits field to a value\nwhich they guarantee will be no greater than the preferred\npage size for any CPU they create.\n\nNote that changing the target page size by setting\nminimum_page_bits is a migration compatibility break\nfor that machine.\n\nFor debugging purposes, attempts to use TARGET_PAGE_SIZE\nbefore it has been finally confirmed will assert.\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Richard Henderson <rth@twiddle.net>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/20bccb82ff3ea09bcb7c4ee226d3160cab15f7da"},{"sha":"59811a320d6b2a6db2646f908bb016dd8553df27","author":{"name":"Peter Maydell","email":"d4da0cae8bdd6af8ce5950fc7fec7c012df68229@linaro.org"},"message":"migration/savevm.c: migrate non-default page size\n\nAdd a subsection to vmstate_configuration which is present\nonly if the guest is using a target page size which is\ndifferent from the default. This allows us to helpfully\ndiagnose attempts to migrate between machines which\nare using different target page sizes.\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Richard Henderson <rth@twiddle.net>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/59811a320d6b2a6db2646f908bb016dd8553df27"},{"sha":"e97da98f1173c764e8fd8d2c84f84ec3bdc87488","author":{"name":"Peter Maydell","email":"d4da0cae8bdd6af8ce5950fc7fec7c012df68229@linaro.org"},"message":"target-arm: Make page size a runtime setting\n\nRather than defining TARGET_PAGE_BITS to always be 10,\nswitch to using a value picked at runtime. This allows us\nto use 4K pages for modern ARM CPUs (and in particular all\n64-bit CPUs) without having to drop support for the old\nARMv5 CPUs which had 1K pages.\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Richard Henderson <rth@twiddle.net>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/e97da98f1173c764e8fd8d2c84f84ec3bdc87488"},{"sha":"a2519ad1828dd443af9f9c293db18db6d6123762","author":{"name":"Peter Maydell","email":"d4da0cae8bdd6af8ce5950fc7fec7c012df68229@linaro.org"},"message":"hw/arm/virt: Set minimum_page_bits to 12\n\nSince the virt board model will never create a CPU which is\npre-ARMv7, we know that our minimum page size is 4K and can\nset minimum_page_bits accordingly, for improved performance.\n\nNote that this is a migration compatibility break, so\nwe introduce it only for the virt-2.8 machine and onward;\nvirt-2.7 continues using the old 1K pages.\n\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\nReviewed-by: Richard Henderson <rth@twiddle.net>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/a2519ad1828dd443af9f9c293db18db6d6123762"},{"sha":"2b5c0322b7d9d2032578bd1efccf72f4ab1b7074","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"hw/ptimer: Add \"wraparound after one period\" policy\n\nCurrently, periodic counter wraps around immediately once counter reaches\n\"0\", this is wrong behaviour for some of the timers, resulting in one period\nbeing lost. Add new ptimer policy that provides correct behaviour for such\ntimers, so that counter stays with \"0\" for a one period before wrapping\naround.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: f22a670cf1f4be298b31640cb5f4be1df0f20ab6.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/2b5c0322b7d9d2032578bd1efccf72f4ab1b7074"},{"sha":"293130aa91e9fc319beca1d8b1a9ac8c0cb33f75","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"tests: ptimer: Add tests for \"wraparound after one period\" policy\n\nPTIMER_POLICY_WRAP_AFTER_ONE_PERIOD changes ptimer behaviour in a such way,\nthat it would wrap around after one period instead of doing it immediately.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: ce27bb84ed9f2b64300dd4e90f3eff235a7dcedf.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/293130aa91e9fc319beca1d8b1a9ac8c0cb33f75"},{"sha":"ef0a9984aa0c3c8f440bbf488f2c14ccddd241ea","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"hw/ptimer: Add \"continuous trigger\" policy\n\nCurrently, periodic timer that has load = delta = 0 performs trigger\non timer reload and stops, printing a \"period zero\" error message.\nIntroduce new policy that makes periodic timer to continuously trigger\nwith a period interval in case of load = 0.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: 632b23dd11055d9bd5e338d66b38fac0bd51462e.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/ef0a9984aa0c3c8f440bbf488f2c14ccddd241ea"},{"sha":"2e74583b29fff8e0e543898a9c61508a213ad83e","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"tests: ptimer: Add tests for \"continuous trigger\" policy\n\nPTIMER_POLICY_CONTINUOUS_TRIGGER makes periodic ptimer to re-trigger every\nperiod in case of load = delta = 0.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: 7a908ab38b902d521eb959941f9efe2df8ce4297.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/2e74583b29fff8e0e543898a9c61508a213ad83e"},{"sha":"22471b8a0f1262192fb3698bd2ea1080d9176e6a","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"hw/ptimer: Add \"no immediate trigger\" policy\n\nPerforming trigger on setting (or starting to run with) counter = 0 could\nbe a wrong behaviour for some of the timers, provide \"no immediate trigger\"\npolicy to maintain correct behaviour for such timers.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: 72c0319cf2ec599f22397b7da280c06c34dc40dd.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/22471b8a0f1262192fb3698bd2ea1080d9176e6a"},{"sha":"516deb421afc6e4f6073d0de3f33867235eef3fd","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"tests: ptimer: Add tests for \"no immediate trigger\" policy\n\nPTIMER_POLICY_NO_IMMEDIATE_TRIGGER makes ptimer to not to trigger on starting\nto run with / setting counter to \"0\".\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: 12b1e745f90fe2ca3d59197166bc3d379260f912.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/516deb421afc6e4f6073d0de3f33867235eef3fd"},{"sha":"3f6e6a13c1a059d44b9a55ec7af8c01ef096ff7e","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"hw/ptimer: Add \"no immediate reload\" policy\n\nImmediate counter re-load on setting (or on starting to run with)\ncounter = 0 is a wrong behaviour for some of the timers. Add \"no\nimmediate reload\" policy that provides correct behaviour for such timers.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: bf9385cd2550ca451d564fa46007688cee3f3d9d.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/3f6e6a13c1a059d44b9a55ec7af8c01ef096ff7e"},{"sha":"56700e1aa6959c082a839285022fa4e48d5cf512","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"tests: ptimer: Add tests for \"no immediate reload\" policy\n\nPTIMER_POLICY_NO_IMMEDIATE_RELOAD makes ptimer to not to re-load\ncounter on setting counter value to \"0\" or starting to run with \"0\".\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: a7acf805e447cc7f637ecacbd45cca34ea3bf425.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/56700e1aa6959c082a839285022fa4e48d5cf512"},{"sha":"5580ea4576b60a4fa615c85e254fab1401149b45","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"hw/ptimer: Add \"no counter round down\" policy\n\nFor most of the timers counter starts to decrement after first period\nexpires. Due to rounding down performed by the ptimer_get_count, it returns\ncounter - 1 for the running timer, so that for the ptimer user it looks\nlike counter gets decremented immediately after running the timer. Add \"no\ncounter round down\" policy that provides correct behaviour for those timers.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: ef39622d0ebfdc32a0877e59ffdf6910dc3db688.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/5580ea4576b60a4fa615c85e254fab1401149b45"},{"sha":"057516fe2cd6bcc71fd66564d108d708a6b395b6","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"tests: ptimer: Add tests for \"no counter round down\" policy\n\nPTIMER_POLICY_NO_COUNTER_ROUND_DOWN makes ptimer_get_count() return the\nactual counter value and not the one less.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: 0082889309b3dc66c03c8de00b8c1ef40c1e3955.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/057516fe2cd6bcc71fd66564d108d708a6b395b6"},{"sha":"673c7e8968771dd3ecde8ee50c704d2cb42a71fa","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"tests: ptimer: Change the copyright comment\n\nEric Blake suggested that use of \"Author:\" in the copyright text of the\nfiles created by individuals is incorrect, replace it with \"Copyright\".\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: 9d8b626f462d4a5094b1945fbd763b8a2e28dd86.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/673c7e8968771dd3ecde8ee50c704d2cb42a71fa"},{"sha":"33d44cdf00f5e2520c2ff3ece162a317f408cefb","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"tests: ptimer: Replace 10000 with 1\n\nThe 10000 is an arbitrarily chosen value used for advancing the QEMU\ntime, so that ptimer's now != last. Change it to 1 to make code a bit\nmore readable.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nMessage-id: 63256eaac54c84dac7c797f41296cc49e751d09d.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/33d44cdf00f5e2520c2ff3ece162a317f408cefb"},{"sha":"226fb5aaff8157472f97c63193660732a215d87f","author":{"name":"Dmitry Osipenko","email":"5bf7a4a791201970b511516ad3e2765c4d6300f2@gmail.com"},"message":"arm_mptimer: Convert to use ptimer\n\nCurrent ARM MPTimer implementation uses QEMUTimer for the actual timer,\nthis implementation isn't complete and mostly tries to duplicate of what\ngeneric ptimer is already doing fine.\n\nConversion to ptimer brings the following benefits and fixes:\n\t- Simple timer pausing implementation\n\t- Fixes counter value preservation after stopping the timer\n\t- Properly handles prescaler != 0 / counter = 0 / load = 0 cases\n\t- Code simplification and reduction\n\nBump VMSD to version 3, since VMState is changed and is not compatible\nwith the previous implementation.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\nReviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>\nMessage-id: 37f378c33bb5a28d5cd71167a6bd5bff5e59cbc3.1475421224.git.digetx@gmail.com\nReviewed-by: Peter Maydell <peter.maydell@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>","distinct":false,"url":"https://api.github.com/repos/rth7680/qemu/commits/226fb5aaff8157472f97c63193660732a215d87f"}]}
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