{"repository":{"description":"6.111 bitfile","watchers":0,"stargazers":0,"forks":0,"fork":false,"size":45588,"owner":"dkang9322","private":false,"open_issues":0,"has_issues":true,"has_downloads":true,"has_wiki":true,"language":"Verilog","created_at":"2013-12-03T16:08:40-08:00","pushed_at":"2013-12-04T16:12:53-08:00","master_branch":"master"},"actor_attributes":{"type":"User","email":"da39a3ee5e6b4b0d3255bfef95601890afd80709"},"url":"https://github.com/dkang9322/bitfile/compare/88d0fe8763...6ec696850f"}